SEMI MEMS Tech Seminar (Sept 26, Cornaredo, Italy)

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1 SEMI MEMS Tech Seminar (Sept 26, Cornaredo, Italy) Opportunities of Wafer Level Embedded Technologies for MEMS Devices T. Braun ( 1 ), K.-F. Becker ( 1 ), R. Kahle ( 2 ), V. Bader ( 1 ), S. Voges ( 2 ), T. Thomas ( 2 ), R. Aschenbrenner ( 1 ), K.-D. Lang ( 2 ) ( 1 ) Fraunhofer Institute for Reliability and Microintegration Gustav-Meyer-Allee 25, Berlin, Germany tanja.braun@izm.fraunhofer.de phone: / fax.: / ( 2 ) Technical University Berlin, Microperipheric Center

2 Outline SEMI MEMS Tech Seminar (Sept 26, Cornaredo, Italy) Introduction FOWLP Application Examples MST SmartSense Multi-Sensor Package Sensor Integration into Microfluidics

3 Fan-out Wafer Level Packaging (FOWLP) SEMI MEMS Tech Seminar (Sept 26, Cornaredo, Italy) Die assembly on carrier with release tape Carrier overmolding Carrier release RDL (e.g. thinfilm, RCC, inkjetting), balling, singulation Molded Reconfigured Wafer, Infineon Wafer-Level Fan-Out Packaging, WFOP, J-Devices Fan-Out Wafer-Level Packaging, Renesas Electronics Corporation Redistributed Chip Package, Freescale

4 From Wafer to Panel Level Packaging SEMI MEMS Tech Seminar (Sept 26, Cornaredo, Italy) PCB Technologies Based on standard thin film technology equipment Tightest tolerances for fine pitch line/space (5/5 µm) Sensitive to substrate warpage Currently limited to mm Based on standard PCB manufacturing equipment Intrinsic warpage compensation by lamination 3D and double sided routing are standard features for PCBs Line/space down to 20/20 µm Full format/large area is standard x18 Thin Film Technologies

5 SEMI MEMS Tech Seminar (Sept 26, Cornaredo, Italy) Chip Embedding - IZM Embedding & Substrate Line from Wafer Scale to Panel Scale 610 x 456 mm² Datacon evo/ Siplace CA3 Mahr OMS 600 WL: Towa 120t PL: NN Q Lauffer/ Bürkle Siemens Microbeam Schmoll MX1 Ramgraber automatic plating line Orbotech Paragon 9000 Schmid

6 SEMI MEMS Tech Seminar (Sept 26, Cornaredo, Italy) FOWLP with PCB based RDL and Through Mold Vias (TMV) Process Flow Precision die placement on intermediate carrier Cleaning, Pd activation und Cu plating µvias and TMVs Large area compression molding Molded wafer release from carrier Laser direct imaging (LDI) and Cu layer etching Lamination of RCC both wafer sides UV-laser drilling through RCC to open die pad and through molded wafer for TMVs Soldermask, UBM, package singulation by sawing 3D module assembly

7 SEMI MEMS Tech Seminar (Sept 26, Cornaredo, Italy) Motivation SiP Wafer Level Fan-Out Embedding MS-ASIC µc Roadmap source: Yole

8 SEMI MEMS Tech Seminar (Sept 26, Cornaredo, Italy) Application Example MST SmartSense - Intelligent 3D MEMS Compass

9 SEMI MEMS Tech Seminar (Sept 26, Cornaredo, Italy) MST SmartSense - Intelligent 3D MEMS Compass Technology Demonstrator Commercial Product Advanced Technology MS-ASIC µc TMV ASIC LGA pad sensor Heterogeneous Integration BGA Multi-Sensor Package Evaluation of Material Combinations Reliability Investigations Chip on Board technology Transfer molded LGA housing PoP approach using embedding as a basis Thin film & PCB based RDL Product well within specs!

10 FOWLP Multi-Sensor Stack SEMI MEMS Tech Seminar (Sept 26, Cornaredo, Italy) Manufacturing of functional demonstrators FOWLP Multi-Sensor Stack consisting of Pressure Sensor/ASIC package with thin film RDL and RDL opening above sensor membrane Acceleration sensor/asic package with PCB based RDL and Through Mold Vias (TMV) for package stacking thin film RDL ASIC MEMS pressure sensor molding compound ASIC Through Mold Via (TMV) PCB based RDL MEMS acceleration sensor substrate

11 FOWLP Pressure Sensor-ASIC Package SEMI MEMS Tech Seminar (Sept 26, Cornaredo, Italy) pressure sensor packages after wafer level molding and redistribution Thin film redistribution Open RDL layer above pressure sensor membrane Comparable sensor performance over the entire wafer M. Bründel, U. Scholz, F. Haag, E. Graf, T. Braun, K.-F. Becker; Substrateless sensor packaging using wafer level fan-out technology; Proc. of EPTC 2012; Singapore.

12 Through Mold Via - Reliability Laser drilled Through Mold Vias: 100 up to 150 vias/s Direct metallization by Cu plating Investigations of 5 different epoxy molding compounds with max. filler sizes from 24 µm to 75 µm 4 different via diameters/pitches (200 µm/400 µm, 150 µm 350 µm, 100 µm/300 µm, 50 µm/250 µm) SEMI MEMS Tech Seminar (Sept 26, Cornaredo, Italy) TMV test vehicle All samples passed: MSL temperature cycles -55 C/125 C 5000 h humidity storage 85 C/85 % r.h. without any electrical failures EMC with max. 24 µm filler size 50 µm via and 250 µm pitch EMC with max. 75 µm filler size 50 µm via and 250 µm pitch

13 Sensor Package - Through Mold Via (TMV) SEMI MEMS Tech Seminar (Sept 26, Cornaredo, Italy) RCC Sensor ASIC EMC Cross section Through mold via interconnection between ASIC and sensor with PCB based RDL technology X-Ray image acceleration sensor-asic package with through mold vias (red arrows) Cross section Through mold via Precisely laser drilled and homogeneously metalized through mold vias Well aligned and void-free Cu filled µvia with 110 µm pitch and structured conductor lines with 55 µm lines and spaces

14 FOWLP Multi-Sensor Stack SEMI MEMS Tech Seminar (Sept 26, Cornaredo, Italy) TMV ASIC LGA pad sensor pressure sensor/asic package with thin film RDL Acceleration sensor/asic package with PCB based RDL and Through Mold Vias (TMV) for package stacking assembled sensor stack on test board Functional tests show sensor performance in specs

15 SEMI MEMS Tech Seminar (Sept 26, Cornaredo, Italy) Application Example Sensor Integration into Microfluidics ENIAC Cajal4EU

16 Sensor Integration into Microfluidics SEMI MEMS Tech Seminar (Sept 26, Cornaredo, Italy) System design / simulation Fluidics World to chip interface Concept and CAD-Design POI0 LOI0 POI Eval. C Fabrication Polymer / PDMS structuring & Bonding Surface modification Integration of Microelectronics /MEMS / MOEMS Fusion of components to functional demonstrator Fluidic characterization Functional experiments System validation Characterization

17 SEMI MEMS Tech Seminar (Sept 26, Cornaredo, Italy) Example: Sensors and Actuators for Automated Cell-free Protein Production Process automation: Phase interface and bubble detectors Micro actuators / pumps / valves Control and regulation: Electrochemical ph-sensing Optical Mg-sensing by color change reaction Temperature spot control with micro peltiers Glucose measurement for energy regeneration system Yield measurement: Fluorescence measurement with µpmt RNA purity control by UV-absorbance measurement Integrated RGB- Sensor with LED µpmt (Hamamatsu) Micro glucose sensor (Fh ISIT) Bubble detector Integrated glass fiber Integrated ph-sensor (Fh ISIT)

18 SEMI MEMS Tech Seminar (Sept 26, Cornaredo, Italy) Cajal4U: Integration of CMOS Biosensor into a Polymeric Lab-on-a-Chip Systems CMOS sensor die reconfigured wafer Feasibility of packaging approach for silicon-into-polymer suitable for mass fabrication successfully shown Protection of sensing area during packaging allows application to wide range of biosensors Tightness high enough for most microfluidic applications T. Brettschneider, C. Dorrer, H. Suy, T. Braun, E. Jung, R. Hoofman, M. Bründel, R. Zengerle and F. Lärmer, Integration of CMOS biosensor into a polymeric lab-on-a-chip systems, International Conference on Microfluidics and Nanofluidics, 2013, Venice, Italy. reconfigured wafer with RDL singulated FOWLP module FOWLP module in microfluidics

19 Cajal4U: Integration of CMOS Biosensor SEMI MEMS Tech Seminar (Sept 26, Cornaredo, Italy) Photography of FOWLP Cross section of connected TSV die Separation of wet microfluidics from dry electrical connection Use of TSV dies for 3D routing Backside TSV die connection by blind µvias through molding compound X-ray CT image of FOWLP X-ray image of connected TSV die

20 Conclusion SEMI MEMS Tech Seminar (Sept 26, Cornaredo, Italy) A technology has been successfully developed for stacking wafer level embedded packages by Through Mold Vias (TMV) Technology based on large area compression molding and PCB based redistribution technology with potential to full PCB format (610 x 457 mm²) or Standard thin film redistribution technology Laser drilled TMV technology has very high reliability potential samples passed MSL1, 5000 TC -55 C/125 C and 5000 h 85 C/85 % r.h. without failure Technology was successfully demonstrated for a functional ASIC- MEMS acceleration sensor package on which an ASIC MEMS pressure sensor package is assembled Sensor integration into microfluidics

21 SEMI MEMS Tech Seminar (Sept 26, Cornaredo, Italy) Outlook - Fan-out Panel Level Packaging (FOPLP) Continuous manufacturing line for FOPLP up to 24 x 18 / 610 x 457 mm²

22 SEMI MEMS Tech Seminar (Sept 26, Cornaredo, Italy) Thank you for your attention