Pad Crater Project Definition Stage. Joe Smetana Alcatel-Lucent For Member Meeting 2/9/2011 San Jose, CA
|
|
- Hubert Chandler
- 6 years ago
- Views:
Transcription
1 Pad Crater Project Definition Stage Joe Smetana Alcatel-Lucent For Member Meeting 2/9/2011 San Jose, CA
2 The issue(s) Pad Cratering defects are a significant challenge with Pb-free PCB materials and/or Pb-free solders, particularly associated with large BGA devices Pad Pull or Ball shear testing has not shown to consistently represent the actual propensity for pad cratering of a material and in some cases can give misleading and/or opposite results from what actually occurs in real assemblies A way is needed to rank order materials that is directly related to actual pad cratering
3 Project Overview Create a relatively simple test vehicle with a single large BGA assembled in the middle 6 or 8 layers, thickness.093 Fabricate the bare boards from multiple different materials Include a significant variety of materials, filled and unfilled Include materials that have also done well in HDPUG Pb-free materials projects Don t test materials that have done poorly in HDPUG Pb-free materials projects Other materials as suggested by members Perform bend to break testing to rank order the materials Design TV to virtually ensure trace breaks simultaneous with laminate. Spherical bend testing preferred or 4-point bend? Other Will need to include some amount of strain gage measurements Both Single Bend to Break and Repeated Load to Break On the same boards ALSO perform HPP testing for a correlation to actual pad cratering. How valuable is it? No support for this so far
4 What this Project will Provide Rank order of materials to Pad Cratering in mechanical bend testing At selected strain rate uε/sec (sweet spot) At single bend to break At repeated load to break 60-70%? (TBD) lowest single bend to break load Correlation or lack thereof of HPP testing to mechanical bend to break testing Currently no support for this
5 Bend to Break Testing Meadville to support Bend to Break testing Need to better define this uε/sec is the sweet spot to minimize scatter in the results and lower introduces a different failure mode, exhibits twice the scatter in the results... this is typical of behavior seen in a brittle material.
6 Simplified Bend to Break Test This will not necessarily catch the first break point, but should correlate to it and should properly rank order the materials.
7 Key Issues Define the test component Practical Components A-PBGA mm-35mm-DC-LF-305 PBGA x35mm Perimeter+ BGA, 1mm pitch 689 x 689 mil die size Quote of 1000 for $10, Define the materials to be tested Compare filled vs. unfilled, FR4 brominated and HF, Selected High speed materials Look at cap technologies such as Zeta Select good materials (HDPUG Pb-free Materials 1 and 2) Material suppliers need to supply the materials at no cost First Draft/Proposed Material List follows Define/Design the Test Board (ALU/Meadville) Define the required sample size 10? Single Bend to Break 20? Repeated Bend to Break
8 Proposed Component
9 Rough Proposed Stackup 6 layer board - rough stackup L1 1/2 ounce Cu.093" over laminate Prepreg or 2113 (Hi vs. Low Resin)- Cap for those specific constructions L2 1/2 ounce Cu Laminate L3 1 ounce Cu Plane Prepreg L4 1 ounce Cu Plane Laminate L5 1/2 ounce Cu Prepreg or 2113 (Hi vs. Low Resin)- Cap for those specific constructions L6 1/2 ounce Cu
10 Design Rough Header for event detector attach BGA at 45 degrees to allow for either spherical or 4 point bend Need the following specifics defined: Minimum distance from component to board edges? What type of header or board connector is needed the event detector? BGA pattern duplicated on bottom side using either VIP or SMD pads for comparison
11 Considerations for Pad Cratering Test Materials Filled vs Unfilled Hi Tg Phenolic Resin Halogen Free Dicy Mid Tg High Speed Cap Layers Resin Content/Glass style effect on outer layers 106 vs between L1-2 and N-N-1 Pad Size Normal vs. enlarged solder mask defined pads, Enlarged pads at corners Microvia in Pad vs. No Microvia in pad (including Dogbone Microvia vs Dogbone Through Via), Conformal Microvia vs Filled Micro via Note - With a single design can only do 1 of the options
12 Preliminary Material List (part 1) High Tg Filled Phenolic FR4s Isola 370HR EMC EM-827 Panasonic R1755V Shenzen Pacific (PIC) FL-170 ITEQ IT-180i Panasonic R2125 Grace GA-170LE High Tg Non-filled Phenolic FR4s Isola 370 Turbo Shengyi S1170 TUC TU-722 High Tg Halogen Free FR4s Grace GA-HF-17 ITEQ IT-170GRA EMC EM-370(D) or EMC-370 (one but not both) Panasonic R1577 (Megtron 2) Shengyi S1165 Ventec VT-447 TUC TU-862HF Hitachi MCL-HE-679G
13 Preliminary Material List (part 2) Mid-Tg FR4s ITEQ IT-158 EMC EM-825 Isola This a dicy FR4 -OK in low layer count Pb-free High Speed Materials Isola FR-408HR Panasonic Megtron 4 TUC TU-872L or SLK EMC EM-828 MGC FL-700 Panasonic Megtron 6 Nelco Mercurywave 9350 Cap Materials (over what material?) Zeta Shengyi S1160F Hitachi KS-6600 Hitachi CUTE
14 What this Project WILL NOT DO (as currently planned) It will not provide data that necessarily correlates to pad cratering occurring by thermo-mechanical stresses such in reflow/cooldown as material properties above Tg will be very different from those at room temperature. If someone has an idea of how to test this speak up! It is a critical issue.
15 Where are we on this Project? We have held a few preliminary meetings and some off-line discussions with key players Everything is currently draft and subject to change Delayed active pursuit of this project while we finished the Pb-free materials project Ready for regular meetings to resolve open issues and move forward
16 Project Milestones Define the full extent of the Project - Team Define the test vehicle - Team Component Board (layers, thickness, size, etc.) Design the Test Vehicle - ALU Determine materials to test - Team Determine the required sample sizes - Team Material suppliers provide materials at no cost in return for rank ordering (coded) Fabricators to build the test vehicle - TBD Procure components Sun +? Assemble Test vehicles Celestica/Flextronics? Bend to break testing- Meadville Hot Pin Pull testing (assuming we include this) Data analysis and reporting
Characterizing the Lead-Free Impact on PCB Pad Craters
Characterizing the Lead-Free Impact on PCB Pad Craters Brian Roggeman and Wayne Jones Advanced Process Lab Universal Instruments Corp. Binghamton, NY 13902 Abstract Pad cratering in Printed Circuit Boards
More informationFuture HDI An HDPUG project Proposal
Future HDI An HDPUG project Proposal Joe Smetana, Alcatel-Lucent Bill Birch, PWB Interconnect Ivan Straznicky, Curtiss-Wright David Gorden Viasystems Chris Katzko TTM Doug Thomas, John Bourke, & Dale Kersten
More informationPb-free Challenges for High Complexity Products. inemi Jan 16 th 2008
Pb-free Challenges for High Complexity Products inemi Jan 16 th 2008 All Rights Reserved Alcatel-Lucent 2007 Agenda RoHS 101 Typical complex of telecom products (different from consumable) Pb-free Concerns
More informationLow Loss Laminate Trends and Performance - Taiwan Supply Perspective. IBM Symposium GCE November 2011
Low Loss Laminate Trends and Performance - Taiwan Supply Perspective IBM Symposium GCE November 2011 1 Overview of Discussion Introduction Low Loss Material Development, Taiwan region Status of Supply
More informationFreescale Semiconductor Tape Ball Grid Array (TBGA) Overview
Freescale Semiconductor Tape Ball Grid Array (TBGA) Overview Revision 0 2006 Freescale and the Freescale logo are trademarks of Freescale Semiconductor, Inc. All other product or service names are the
More informationIPC -7095C Design and Assembly Process Implementation For BGAs
IPC -7095C Design and Assembly Process Implementation For BGAs 1 Overview With the introduction of BGA components, things had to change: New design New assembly process New repair process New inspection
More informationVT-45PP VT-47PP VT-447PP
& Prepreg General Information Ventec provides a series of and Prepregs with different glass style and resin content. These products have good bonding and thermal performance in applications of heat sink
More informationMaterial Testing & Mitigation Techniques for Pad Crater Defects. John McMahon P.Eng.
1 Material Testing & Mitigation Techniques for Pad Crater Defects John McMahon P.Eng. Agenda Introduction Pad Crater Defects Bend Test Methods Process Strain Limits Laminate Susceptibility Package Compliance
More informationValidated Test Method to Characterize and Quantify Pad Cratering Under Bga Pads on Printed Circuit Boards
Validated Test Method to Characterize and Quantify Pad Cratering Under Bga Pads on Printed Circuit Boards Mudasir Ahmad, Jennifer Burlingame, Cherif Guirguis Technology and Quality Group Cisco Systems,
More informationSystem Level Effects on Solder Joint Reliability
System Level Effects on Solder Joint Reliability Maxim Serebreni 2004 2010 Outline Thermo-mechanical Fatigue of solder interconnects Shear and tensile effects on Solder Fatigue Effect of Glass Style on
More informationBare Board Material Performance after Pb-Free Reflow
Bare Board Material Performance after Pb-Free Reflow Joe Smetana, Alcatel-Lucent Thilo Sack, Celestica Wayne Rothschild, IBM Bill Birch, PWB Interconnect Solutions Kim Morton, Viasystems Abstract: The
More informationWelcome to Streamline Circuits Lunch & Learn. Design for Reliability & Cost Reduction of Advanced Rigid-Flex/Flex PCB Technology
Welcome to Streamline Circuits Lunch & Learn Design for Reliability & Cost Reduction of Advanced Rigid-Flex/Flex PCB Technology Accurate PCB data is critical to the tooling process. Here are some key items
More informationDesigning With High-Density BGA Packages for Altera Devices. Introduction. Overview of BGA Packages
Designing With High-Density BGA Packages for Altera Devices December 2007, ver. 5.1 Application Note 114 Introduction As programmable logic devices (PLDs) increase in density and I/O pins, the demand for
More information14. Designing with FineLine BGA Packages
14. Designing with FineLine BGA Packages S51014-1.0 Chapter 14, Designing with FineLine BGA Packages, replaces AN 114: Designing with FineLine BGA Packages. Introduction As programmable logic devices (PLDs)
More informationBare Board Material Performance after Pb-Free Reflow
Bare Board Material Performance after Pb-Free Reflow Joe Smetana, Alcatel-Lucent Thilo Sack, Celestica Wayne Rothschild, IBM Bill Birch, PWB Interconnect Solutions Kim Morton, Viasystems Abstract: The
More informationInvestigation of Pad Cratering in Large Flip-Chip BGA using Acoustic Emission
Investigation of Pad Cratering in Large Flip-Chip BGA using Acoustic Emission Anurag Bansal, Cherif Guirguis and Kuo-Chuan Liu Cisco Systems, Inc., San Jose, CA anurbans@cisco.com Abstract Electronics
More informationIMPACT OF MICROVIA-IN-PAD DESIGN ON VOID FORMATION
IMPACT OF MICROVIA-IN-PAD DESIGN ON VOID FORMATION Frank Grano, Felix Bruno Huntsville, AL Dana Korf, Eamon O Keeffe San Jose, CA Cheryl Kelley Salem, NH Joint Paper by Sanmina-SCI Corporation EMS, GTS
More informationChapter 14. Designing with FineLine BGA Packages
Chapter 14. Designing with FineLine BGA Packages S53009-1.3 Chapter 14, Designing with FineLine BGA Packages, replaces AN 114: Designing with FineLine BGA Packages. Introduction As programmable logic devices
More informationLead-Free HASL: Balancing Benefits and Risks for IBM Server and Storage Hardware
Lead-Free HASL: Balancing Benefits and Risks for IBM Server and Storage Hardware November 19, 2009 M.Kelly, P.Eng, MBA Senior Engineer, ECAT Interconnect Technology Lead-Free Server Development Core Team
More informationLead Free Assembly: A Practical Tool For Laminate Materials Selection
Lead Free Assembly: A Practical Tool For Laminate Materials Selection Erik J. Bergum David Humby Isola Abstract: The impending European RoHS legislation, restricting the use of lead containing solders,
More informationHigh Frequency Test Methods Project Phase II
High Frequency Test Methods Project Phase II Project Lead: Karl Sauter, Oracle HDPug Facilitator: Jack Fisher Updated: April 20, 2015 Problem Statement Some high frequency test methods (1 GHz up to at
More informationReliability of Lead-Free Solder Connections for Area-Array Packages
Presented at IPC SMEMA Council APEX SM 2001 For additional information, please email marketing@amkor.com Reliability of Lead-Free Solder Connections for Area-Array Packages Ahmer Syed Amkor Technology,
More informationQualification of Thin Form Factor PWBs for Handset Assembly
Qualification of Thin Form Factor PWBs for Handset Assembly Mumtaz Y. Bora Kyocera Wireless Corporation San Diego, Ca. 92121 mbora@kyocera-wreless.com Abstract: The handheld wireless product market place
More informationStackup Planning, Part 1
by Barry Olney coulmn BEYOND DESIGN Stackup Planning, Part 1 The PCB substrate that physically supports the components, links them together via highspeed interconnects and also distributes highcurrent
More informationSimulation of Embedded Components in PCB Environment and Verification of Board Reliability
Simulation of Embedded Components in PCB Environment and Verification of Board Reliability J. Stahr, M. Morianz AT&S Leoben, Austria M. Brizoux, A. Grivon, W. Maia Thales Global Services Meudon-la-Forêt,
More informationIBM Laminate Study Group
IBM Laminate Study Group Lead-Free Laminate Robustness Brett Krull, Dept FM2 Nov 18, 2009 Agenda Introductions Laminate Robustness Background Qualification Methods Contributing Factors Past Work on Laminate
More informationGRAPHIC MANUFACTURING CAPABILITY Q217-18
All features are design dependent and may not be achievable in combination Reduced Yield / Special values up ( or down ) to the standard limit are design and application dependent Standard features only
More informationFlex and Rigid flex boards. 02/2013 Written by Zreik Anan
Flex and Rigid flex boards 02/2013 Written by Zreik Anan Advantages Better Reliability Dynamic flexing Replace cables (Static Flexing) Simplify assembly process Less rework Saves money Materials Flex clad
More informationinemi Halogen-Free PCB Follow-On Project Proposal Stephen Tisdale Intel Corporation April 2, 2008
inemi Halogen-Free PCB Follow-On Project Proposal Stephen Tisdale Intel Corporation April 2, 2008 0 Project Management Project Formation Project Formation The development of a new project and its Statement
More informationMultek s lead free compatible and compliant material selection February 01, 2006
Multek s lead free compatible and compliant material selection Helmut.Kroener@de.multek.com +49 7 463 543 February 0, 2006 Overview I. Introduction II. Project setup III. Tested materials IV. Test vehicle
More informationOrganic Flip Chip Packages for Use in Military and Aerospace Applications. David Alcoe, Kim Blackwell and Irving Memis, Endicott NY
Organic Flip Chip Packages for Use in Military and Aerospace Applications David Alcoe, Kim Blackwell and Irving Memis, Endicott NY 1 Contents 1. Bridge from Commercial Reliability 2. Existing PBGA use
More informationManufacturing Capacity
Capability List Manufacturing Capacity QTA & Prototype Layer : 1L ~32 L Impedance Board Ball Grid Array ( BGA ) Blind/ Buried Via Micro Via ( Laser Drilling) Flex /Rigid Flexible PCB Series Orders Layer
More informationMechanical Reliability A New Method to Forecast Drop Shock Performance
Mechanical Reliability A New Method to Forecast Drop Shock Performance Ronald Frosch Guenther Mayr, Manfred Riedler AT&S Shanghai, China Abstract In light of the recent technological trends within PCB
More information: GA-170-LE/ GA-170B-LE
Grace Electron Corp. Processing Guide Phenolic Cured Material Laminate/ Prepreg : GA-170-LE/ GA-170B-LE Grace Electron Corp. Tech. & QA Dept. Revision 2010/3/30 Page 1 of 7 @2010Grace Group Grace Declaration:
More informationinemi Statement of Work (SOW) inemi Packaging TIG Impact of Low CTE Mold Compound on 2nd Level Solder Joint Reliability Phase 1 & Phase 2
inemi Statement of Work (SOW) inemi Packaging TIG Impact of Low CTE Mold Compound on 2nd Level Solder Joint Reliability Phase 1 & Phase 2 Version: 4.1 Date: March 26, 2014 Project Leader: Bart Vandevelde
More information: GA-HF-14/ GA-HFB-14
Grace Electron Corp. Processing Guide Halogen Free Material Laminate/ Prepreg : GA-HF-14/ GA-HFB-14 Grace Electron Corp. Tech. & QA Dept. Revision 2009/5/18 Page 1 of 7 @2009Grace Group Grace Declaration:
More informationWhite Paper 0.3mm Pitch Chip Scale Packages: Changes and Challenges
White Paper 0.3mm Pitch Chip Scale Packages: Changes and Challenges 0.3mm Pitch Chip Scale Packages: Changes and Challenges Industry Trend The movement to 0.3mm pitch in chip scale packages (CSPs) can
More informationENHANCING MECHANICAL SHOCK PERFORMANCE USING EDGEBOND TECHNOLOGY
ENHANCING MECHANICAL SHOCK PERFORMANCE USING EDGEBOND TECHNOLOGY Steven Perng, Tae-Kyu Lee, and Cherif Guirguis Cisco Systems, Inc. San Jose, CA, USA sperng@cisco.com Edward S. Ibe Zymet, Inc. East Hanover,
More information2009 Technical Plan. TIG Chair: John Davignon T.C. / TIG Meeting Las Vegas, Nevada April 3, 2009
2009 Technical Plan TIG Chair: John Davignon T.C. / TIG Meeting Las Vegas, Nevada April 3, 2009 Technical Plan Agenda Introduction What has changed Preliminary Gap Chart Preliminary Five-year plan Preliminary
More informationEffect of Chip Dimension and Substrate Thickness on the Solder Joint Reliability of Plastic Ball Grid Array Packages* S.-W. Lee, J.H.
Page 1 of 9 Effect of Chip Dimension and Substrate Thickness on the Solder Joint Reliability of Plastic Ball Grid Array Packages* The Authors S.-W. Lee, J.H. Lau** S.-W. Lee, Center for Advanced Engineering
More information100 WAYS TO REDUCE COST
OPTIMUM DESIGN S 100 WAYS TO REDUCE COST COST SAVING TIPS FOR PCB ASSEMBLY 1 100 Ways to Reduce Cost SUMMARY 57 Ideas For Engineers 16 Things Buyers Can Do Now 32 Ways MFG Can Cut Cost CONTENTS Design...
More informationFABRICATING HIGH CURRENT, HEAVY COPPER PCBS
Royal Circuit Solutions 21 Hamilton Ct, Hollister, CA 95023 (831) 636-7728 www.royalcircuits.com FABRICATING HIGH CURRENT, HEAVY COPPER PCBS INTRODUCTION All printed circuit boards (PCBs) carry current
More informationNine Dot Connects. DFM Stackup Considerations Part 4 Webinar August The following questions were asked during the webinar.
DFM Stackup Considerations Part 4 Webinar August 2015 The following questions were asked during the webinar. Question / Comment Aren't the inner signal layer traces classified as embedded micro-strips
More informationBasic Project Information. Background. Version: 2.0 Date: June 29, Project Leader: Bart Vandevelde (imec) inemi Staff: Grace O Malley
inemi Statement of Work (SOW) Packaging TIG Impact of Low CTE Mold Compound on 2nd Level Solder Joint Reliability Project, Phase 2 (Experimental build and testing) Version: 2.0 Date: June 29, 2015 Project
More informationLow CTE / High Tg FR-4 with High Heat Resistance
Low CTE / High Tg FR-4 with High Heat Resistance Laminate: EM-827 Prepreg: EM-827B 1 Features Tg(DSC) > 170 Z direction CTE < 3.0% (50~260 ) High thermal degradation temperature: Td > 340 Excellent thermal
More informationLow/No Silver Alloy Solder Paste
Low/No Silver Alloy Solder Paste Definition Stage : Phase 1 Process Feasibility Study Project Leader: Jennifer Nguyen, Flextronics Project Facilitator: John Davignon HDP User Group Member Meeting Feb 26,
More informationStatement of Work (SOW) inemi Board Assembly TIG BiSn-Based Low-Temperature Soldering Process and Reliability Project
Statement of Work (SOW) inemi Board Assembly TIG BiSn-Based Low-Temperature Soldering Process and Reliability Project Version 1.4 Date: December 1, 2015 Project Leader: Raiyo Aspandiar, Intel Corporation
More informationS/C Packaging Assembly Challenges Using Organic Substrate Technology
S/C Packaging Assembly Challenges Using Organic Substrate Technology Presented by Bernd Appelt ASE Group Nov. 17, 2009 Overview The Packaging Challenge Chip Substrate Interactions Stiffeners for FC-BGA
More informationDesign for Plastic Ball Grid Array Solder Joint Reliability. S.-W. R. Lee, J. H. Lau*
Page 1 of 9 Design for Plastic Ball Grid Array Solder Joint Reliability The Authors S.-W. R. Lee, J. H. Lau* S.-W. R. Lee, Department of Mechanical Engineering, The Hong Kong University of Science and
More informationPAD CRATERING. Chris Hunrath VP of Technology Integral Technology Lake Forest, California THE INVISIBLE THREAT TO THE ELECTRONICS INDUSTRY
PAD CRATERING THE INVISIBLE THREAT TO THE ELECTRONICS INDUSTRY Presented by Chris Hunrath VP of Technology Integral Technology Lake Forest, California IPC-9708 What is Pad Cratering? 1.2.4 Pad Cratering
More informationWelcome to SMTA Brazil Chapter Brook Sandy-Smith Dr. Ron Lasky Tim Jensen
Welcome to SMTA Brazil Chapter 2013 Presented by Authors Ivan Castellanos Edward Briggs Brook Sandy-Smith Dr. Ron Lasky Tim Jensen Advantages / Concerns HP testing Mechanical properties New work Area ratio
More informationMATERIALS. September Construction Profiles and Material Decomposition p.18. Improved Thin-Film Resistor Material p.24
September 2013 Construction Profiles and Material Decomposition p.18 MATERIALS Improved Thin-Film Resistor Material p.24 High-Frequency Laminates for Hybrid Multilayer PCBs p.30 Material Selection for
More informationThermal Fatigue Result for Low and No-Ag Alloys - Pb-Free Alloy Characterization Speaker: William Chao, Cisco Chair: Elizabeth Benedetto, HP
Thermal Fatigue Result for Low and No-Ag Alloys - Pb-Free Alloy Characterization Speaker: William Chao, Cisco Chair: Elizabeth Benedetto, HP October 26, 2012 inemi Session, IMPACT Project Team Members
More informationALTIUMLIVE 2018: NAVIGATING THE COMPLEXITIES OF PCB MATERIAL SELECTION
ALTIUMLIVE 2018: NAVIGATING THE COMPLEXITIES OF PCB MATERIAL SELECTION Chris Hunrath Insulectro, VP of Technology San Diego October 4 Outline 1 PCB Material Overview 2 What is the Dielectric Constant of
More informationIPC-6012DA with Amendment 1. Automotive Applications Addendum to IPC-6012D Qualification and Performance Specification for Rigid Printed Boards
A with Amendment 1 Automotive Applications Addendum to Qualification and Performance Specification for Rigid s FINAL DRAFT FOR INDUSTRY REVIEW MAY 2018 0.1 Scope This addendum provides requirements to
More informationHOW THE MOLD COMPOUND THERMAL EXPANSION OVERRULES THE SOLDER COMPOSITION CHOICE IN BOARD LEVEL RELIABILITY PERFORMANCE
HOW THE MOLD COMPOUND THERMAL EXPANSION OVERRULES THE SOLDER COMPOSITION CHOICE IN BOARD LEVEL RELIABILITY PERFORMANCE AUTHORS: B. VANDEVELDE, L. DEGRENDELE, M. CAUWE, B. ALLAERT, R. LAUWAERT, G. WILLEMS
More informationSITV s Stack-ups and Loss. Add a subtitle
SITV s Stack-ups and Loss Add a subtitle SITV Stack-ups General Signal Integrity TV s are often used to characterize material performance There are a variety of TV s that use differing approaches and measurement
More informationGold Circuit Electronics
Gold Circuit Electronics Materials Development Focus November 19th, 2009 IBM Symposium Effective characterization and introduction of new printed circuit board materials into mass production is a need.
More informationActive Projects and Research Review
Active Projects and Research Review Denis Barbini, Ph.D., Vitronics Soltec Productronica Munich, Germany November 17, 2005 1 Overview 2 Pb-Free BGAs in SnPb Process Study Chair: Robert Kinyanjui, Sanmina-SCI
More informationModeling Printed Circuit Boards with Sherlock 3.2
Modeling Printed Circuit Boards with Sherlock 3.2 DfR Solutions September 23, 2014 Presented by: Dr. Nathan Blattau Senior Vice President 9000 Virginia Manor Rd Ste 290, Beltsville MD 20705 301-474-0607
More informationHigh Layer Count PCB. Technology Trends in KOREA ISUPETASYS
High Layer Count PCB Technology Trends in KOREA April, 21 2011 Sang Soo LEE ISUPETASYS Contents 2 Definition of High Layer Count PCB Core Technology Trends High Layer Count PCB Technology Drivers Interconnection
More informationinemi BFR-Free Free PCB Material Evaluation Project Chair : Stephen Tisdale Intel Corporation SMTAi Presentation August 21, 2008
inemi BFR-Free Free PCB Material Evaluation Project Chair : Stephen Tisdale Intel Corporation SMTAi Presentation August 21, 2008 0 Co-Authors Gary B. Long Intel Corporation Hillsboro, OR Gary.B.Long@Intel.com
More informationALPHA SACX Plus Product Guide
the product: Delivering the confidence you need to move to a lower silver alloy without sacrificing soldering performance or reliability ALPHA SACX Plus 0807 Product Guide the accuracy of this data. Liability
More informationEVALUATION OF HIGH RELIABILITY REWORKABLE EDGE BOND ADHESIVES FOR BGA APPLICATIONS
As originally published in the SMTA Proceedings. EVALUATION OF HIGH RELIABILITY REWORKABLE EDGE BOND ADHESIVES FOR BGA APPLICATIONS Fei Xie, Ph.D., Han Wu, Daniel F. Baldwin, Ph.D., Swapan Bhattacharya,
More informationActive Sales Associates
1. Introduction Active Sales Associates The combined PCB technologies of Kunshan APEX Electronics of China and Century PCB located in Taiwan 1.1. Purpose The purpose of this specification is to set a basis
More informationRO4835T Core/RO4450T Bonding Layers Multi-Layer Board Processing Guidelines
Fabrication Technical Articles Notes RO4835T Core/RO4450T Bonding Layers Multi-Layer Board Processing Guidelines These guidelines were developed to provide fabricators basic information on processing core
More informationINEMI Packaging Substrate Workshop, Toyama, Japan, 2014 Challenges of Organic Substrates from EMS Perspective Weifeng Liu, Ph. D.
INEMI Packaging Substrate Workshop, Toyama, Japan, 2014 Challenges of Organic Substrates from EMS Perspective Weifeng Liu, Ph. D. Date (4/10/2014) AEG - WW Microelectronics and Packaging OUTLINE Overview
More informationHow Printed Circuit Boards are Made. Todd Henninger Field Applications Engineer Midwest Region
PCB 101: How Printed Circuit Boards are Made Todd Henninger Field Applications Engineer Midwest Region Tooling PRE-PRODUCTION ENGINEERING (Tooling) Design Data Package CAD Data (ODB++ or Gerber 274x format)
More informationA New Approach for Early Detection of PCB Pad Cratering Failures
A New Approach for Early Detection of PCB Pad Cratering Failures Anurag Bansal, Gnyaneshwar Ramakrishna and Kuo-Chuan Liu Cisco Systems, Inc., San Jose, CA anurbans@cisco.com Abstract Pad cratering refers
More informationTMS320C6000 BGA Manufacturing Considerations
TMS320C6000 BGA Manufacturing Considerations David Bell C6000 Applications Team Abstract When designing with a high-density BGA package, it is important to be aware of different techniques that aid in
More informationMaterial Selection and Parameter Optimization for Reliable TMV Pop Assembly
Selection and Parameter Optimization for Reliable TMV Pop Assembly Brian Roggeman, David Vicari Universal Instruments Corp. Binghamton, NY, USA Roggeman@uic.com Martin Anselm, Ph.D. - S09_02.doc Lee Smith,
More information: GA-170-LL/ GA-170B-LL
Grace Electron Corp. Processing Guide Phenolic Cured Material Laminate/ Prepreg : GA-170-LL/ GA-170B-LL Grace Electron Corp. Tech. & QA Dept. Revision 2010/6/14 Page 1 of 6 @2010Grace Group Grace Declaration:
More informationThermal Cycling Reliability Screening of Multiple Pb-free Solder Ball Alloys
Thermal Cycling Reliability Screening of Multiple Pb-free Solder Ball Alloys Joe Smetana 1, Richard Coyle 1, and Peter Read 1 Thomas Koshmeider 2, Dave Love 3, Mark Kolenik 4, and Jennifer Nguyen 5 1 Alcatel-Lucent,
More informationLow-Silver BGA Assembly Phase II Reliability Assessment Fifth Report: Preliminary Thermal Cycling Results
Low-Silver BGA Assembly Phase II Reliability Assessment Fifth Report: Preliminary Thermal Cycling Results Gregory Henshall 1 Michael Fehrenbach 2 Hewlett-Packard Co. 1 Palo Alto, CA USA 2 Houston, TX USA
More informationPretreatment for Innerlayers. V-Bond BO-7770V. R&D Center
Pretreatment for Innerlayers V-Bond BO-7770V PCB Manufacturing Process Innerlayer Patterning Multilayer Board Pretreatment for Innerlayer Laminate and Press Outer Layer Patterning Solder Mask Final Surface
More informationHybrid Materials Alternatives for Optimum Assembly. PTFE Based. Epoxy Hydrocarbon. Modified Epoxy
Hybrid Materials Alternatives for Optimum Assembly by Alan Cochrane Multilayer Technology, Irving Texas The use of hybrid technology (mixing of dissimilar materials in a multilayer package) has been done
More informationGreen IC packaging: A threath to electronics reliability
Green IC packaging: A threath to electronics reliability Geert Willems Steven Thijs, Bart Vandevelde imec 13 juni 2012 Bits & Chips Hardware Conference Content 1. Plastic Molding Compounds 2. Towards Green,
More informationALTIUMLIVE 2018: FLEX: SOMETHING NEW FOR EVERYONE
ALTIUMLIVE 2018: FLEX: SOMETHING NEW FOR EVERYONE Tara Dunn Omni PCB President San Diego October 5, 2018 Applications That Span Technology Today s Discussion: 1. Basic processing steps for both subtractive
More informationLEAD-FREE ASSEMBLY COMPATIBLE PWB FABRICATION AND ASSEMBLY PROCESSING GUIDELINES.
LEAD-FREE ASSEMBLY COMPATIBLE PWB FABRICATION AND ASSEMBLY PROCESSING GUIDELINES. TECHNICAL BULLETIN As the industry has moved to lead-free assembly processing, the performance demands on the lead free
More informationTEMPERATURE CYCLING AND FATIGUE IN ELECTRONICS
TEMPERATURE CYCLING AND FATIGUE IN ELECTRONICS Gilad Sharon, Ph.D. DfR Solutions Beltsville, MD, USA gsharon@dfrsolutions.com Greg Caswell DfR Solutions Liberty Hill, TX, USA gcaswell@dfrsolutions.com
More informationENHANCING WLCSP RELIABILITY THROUGH BUILD-UP STRUCTURE IMPROVEMENTS AND NEW SOLDER ALLOYS
ENHANCING WLCSP RELIABILITY THROUGH BUILD-UP STRUCTURE IMPROVEMENTS AND NEW SOLDER ALLOYS B. Rogers, M. Melgo, M. Almonte, S. Jayaraman, C. Scanlan, and T. Olson Deca Technologies, Inc 7855 S. River Parkway,
More informationAssembly and Rework of Lead Free Package on Package Technology By: Raymond G. Clark and Joseph D. Poole TT Electronics - IMS Perry, Ohio
Assembly and Rework of Lead Free Package on Package Technology By: Raymond G. Clark and Joseph D. Poole TT Electronics - IMS Perry, Ohio Abstract: Miniaturization continues to be a driving force in both
More informationIntroduction Conductors. Supply Planes. Dielectric. Vias PCB Manufacturing Process Electronic Assembly Manufacturing Process
PCBs/Overview Printed Circuit Boards (PCB) Introduction Conductors. Supply Planes. Dielectric. Vias PCB Manufacturing Process Electronic Assembly Manufacturing Process 29/09/2005 EE6471 (KR) 263 PCBs/Overview
More informationSherlock 4.0 and Printed Circuit Boards
Sherlock 4.0 and Printed Circuit Boards DfR Solutions January 22, 2015 Presented by: Dr. Nathan Blattau Senior Vice President 9000 Virginia Manor Rd Ste 290, Beltsville MD 20705 301-474-0607 www.dfrsolutions.com
More informationHigh Density PoP (Package-on-Package) and Package Stacking Development
High Density PoP (Package-on-Package) and Package Stacking Development Moody Dreiza, Akito Yoshida, *Kazuo Ishibashi, **Tadashi Maeda, Amkor Technology Inc. 1900 South Price Road, Chandler, AZ 85248, U.S.A.
More informationinemi Statement of Work (SOW) Board Assembly TIG Strain Guidance for PCBAs
inemi Statement of Work (SOW) Board Assembly TIG Strain Guidance for PCBAs Version #1.7 Date: March 7, Project Leader: Jagadeesh Radhakrishnan (Intel) Co-Project Leaders: Anurag Bansal (Cisco), Matt Kelly
More informationDiscrete Capacitor & Resistor Issues. Anthony Primavera Boston Scientific CRM 11/13/06
Discrete Capacitor & Resistor Issues Anthony Primavera Boston Scientific CRM 11/13/06 Goal: Drive the Industry towards common test methods and best practices in manufacturing to reduce and or eliminate
More informationVOIDS IN SOLDER JOINTS. Raiyo Aspandiar Intel Corporation
VOIDS IN SOLDER JOINTS Raiyo Aspandiar Intel Corporation raiyo.f.aspandiar@intel.com Presented at SMTA Boise Expo and Tech Forum, March 20, 2018 Contents Introduction to Solder Voids Various Types of Voids
More informationTrends and Developments
Trends and Developments Monique Mayr Monique.Mayr@eu.panasonic.com European R&M Group Panasonic Corporation Electronic Material Business Division Weitere Informationen finden Sie auch auf: http://www3.panasonic.biz/em/pcbm/en/index.html
More informationAccurate Predictions of Flip Chip BGA Warpage
Accurate Predictions of Flip Chip BGA Warpage Yuan Li Altera Corporation 11 Innovation Dr, M/S 422 San Jose, CA 95134 ysli@altera.com, (48)544-758 Abstract Organic flip chip BGA has been quickly adopted
More informationAssembly Reliability of TSOP/DFN PoP Stack Package
As originally published in the IPC APEX EXPO Proceedings. Assembly Reliability of TSOP/DFN PoP Stack Package Reza Ghaffarian, Ph.D. Jet Propulsion Laboratory, California Institute of Technology Pasadena,
More informationAdvanced Material Selection IPC Designers Council. Michael J. Gay February 8 th 2017
Advanced Material Selection IPC Designers Council Michael J. Gay February 8 th 2017 Michael.gay@isola-group.com Laminate Material Components Resin, Glass, Copper Resin Glass Copper Prepreg or B-Stage B-Stage
More informationThunderClad 2. TU-883 HF Very Low Loss Material. Laminates & Prepregs Mass Lamination Service Insulated Metal Substrate Materials
ThunderClad 2 TU-883 HF Very Low Loss Material Laminates & Prepregs Mass Lamination Service Insulated Metal Substrate Materials TUC Product Roadmap 2 ULVP VLP HCF Ultra Low Void Prepreg Very Low Profile
More informationOptimizing Immersion Silver Chemistries For Copper
Optimizing Immersion Silver Chemistries For Copper Ms Dagmara Charyk, Mr. Tom Tyson, Mr. Eric Stafstrom, Dr. Ron Morrissey, Technic Inc Cranston RI Abstract: Immersion silver chemistry has been promoted
More informationPress Fit Rework Project. Project Update HDPUG Meeting Düren, Germany 06/05/14
Press Fit Rework Project Project Update HDPUG Meeting Düren, Germany 06/05/14 Background Since late 60 s or early 70 s First press fit was a square peg into a round hole using a fixed geometry solid pin
More informationBuilding HDI Structures using Thin Films and Low Temperature Sintering Paste
Building HDI Structures using Thin Films and Low Temperature Sintering Paste Catherine Shearer, James Haley and Chris Hunrath Ormet Circuits Inc. - Integral Technology California, USA chunrath@integral-hdi.com
More informationCompany Overview Markets Products- Capabilities
Company Overview Markets Products- Capabilities A Simpler way for PCB production. www.purepcb.co.uk What can Pure do for you? From 1 off Circuit upward, No MOQ/MOV High Mix Production Focus. Fast Turn
More informationMinimizing Voiding. Cristian Tudor Applications Engineer Eastern Europe
Minimizing Voiding Cristian Tudor Applications Engineer Eastern Europe ctudor@indium.com INDIUM CORPORATION 1 Indium Corporation s Business We develop, manufacture, market and support solders, electronics
More information