TEST REPORT ISL70002SEH. Introduction. Product Description. Related Literature. Total Dose Testing

Transcription

1 TST RPORT ISL70002SH TR047 Rev.0.00 Introduction This report provides the final results of a low and high dose rate total dose test of the ISL70002SH point-of-load regulator. The test was conducted to determine the sensitivity of the part to the total dose environment and to determine if the part is low dose rate sensitive. This report summarizes 150krad(Si) and subsequent anneal results for the high and low dose rate tests. Product Description The ISL70002SH is a total dose and S hardened, high efficiency, monolithic, synchronous buck regulator with integrated MOSFTs. This single chip power solution operates across an input voltage range of 3V to 5.5V and provides a tightly regulated output voltage that is externally adjustable from 0.8V to ~85% of the input voltage. Output load current capacity is 12A for T J +150ºC. Two ISL70002SH devices configured to current share can provide 19A total output current, assuming ±27% worst-case current share accuracy. The ISL70002SH uses peak current-mode control with integrated error amp compensation and pin selectable slope compensation. Switching frequency is also pin selectable to either 1MHz or 500kHz. Two devices can be synchronized 180º out of phase to reduce input RMS ripple current. A high level of integration makes the ISL70002SH an ideal choice to power small form factor applications. Two devices can be synchronized to provide a complete power solution for large scale digital ICs, like field programmable gate arrays (FPGAs) that require separate core and I/O voltages. The ISL70002SH is hardened to achieve a Total Ionizing Dose (TID) rating of 100krad(Si) at both high (50-300rad(Si)/s) and low (<0.01rad(Si)/s) dose rate as specified in MIL-STD-883 Test Method The part is acceptance tested on a wafer by wafer basis at low dose rate to 50krad(Si) and at high dose rate to 100krad(Si). The ISL70002SH is also S hardened to an LT of 86.4MeV cm 2 /mg. The part is implemented in a submicron BiCMOS process optimized for power management applications. The process is in volume production under MIL-PRF certification and is used for a wide range of commercial power management devices. The block diagram for the ISL70002SH is shown in Figure 1. Specifications for radiation hardened QML devices are controlled by the Defense Logistics Agency (DLA) in Columbus, OH. The DSCC Standard Microcircuit Drawing (SMD) is the controlling document and must be cited when ordering. Related Literature For a full list of related documents, visit our website ISL70002SH product page TR047 Rev.0.00 Page 1 of 21

2 AVDD DVDD N ISHRFA ISHRFB ISHRFC ISHA ISHB ISHC PORSL SC0 SC1 POWR-ON RST (POR) CURRNT SHAR ISHN ISHSL ISHCOM PVINx SS SOFT- START SLOP COMPNSATION CURRNT SNS FB A GM PWM CONTROL LOGIC GAT DRIV LXx COMPNSATION GND PGNDx PGOOD UV POWR-GOOD OVRCURRNT ADJUST OCA OCB OCSSA OCSSB RF PWM RFRNC 0.6V BIT TDI TDO FSL SYNC TRIM TPGM M/S PGNDx PGNDx AGND DGND Figure 1. ISL70002SH Block Diagram TR047 Rev.0.00 Page 2 of 21

3 2 ISL70002SH R K C7 6800PF R K C6 6800PF +5.6V -0.0V, +0.1V VIN R11 10K R9 10K GND 1 JP1 C1 10UF 3 M/S OUT R3 10 R4 1 C2 1UF C3 0.1UF R2 R1 47K 100K C4 0.1UF R5 10K C5 0.22UF FB ISHA ISHB ISHC AGND DVDD TDO OCA TDI OCSSA ZAP OCB GND OCSSB SYNC N PVIN10 PVIN LX10 LX PGND10 PGND PGND9 PGND2 27 LX2 54 LX PVIN9 PVIN M/S SC FSL SC NC NC ISHRFA ISHRFB ISHRFC AVDD DGND SS RF PGOOD U1 ISL ISHCOM PGND7 ISHSL ISHN PORSL PVIN3 LX3 PGND3 PGND4 LX4 PVIN4 PVIN5 LX5 PGND5 PGND6 LX6 PVIN6 PVIN7 LX7 PGND8 LX8 PVIN TP1 JUMPR STUP JP1 RAD TYP R6 10K R7 10K M/S IN R8 10K 1-2 BIAS 2-3 NGINRING ONLY Figure 2. Irradiation Bias Configuration for the ISL70002SH, per SMD TITL: ISL70002 DA TR047 Rev.0.00 Page 3 of 21

4 1. Test Description 1.1 Irradiation Facilities High dose rate testing was performed using a Gammacell Co irradiator located in the Palm Bay, Florida Intersil facility. Low dose rate testing used a Hopewell Designs N40 vault-type low dose rate irradiator located in the same facility. The high dose rate irradiations were done at 82.1rad(Si)/s and the low dose rate work was performed at 0.010rad(Si)/s, both per MIL-STD-883 Method A PbAl box was used to shield the test fixture and devices under test against low energy, secondary gamma radiation. Post-irradiation anneals were performed under bias in a small temperature chamber. 1.2 Test Fixturing Figure 2 shows the configurations used for biased low and high dose rate testing and for the subsequent biased anneals. 1.3 Characterization quipment and Procedures All electrical testing was performed outside the irradiator using the production Automated Test quipment (AT) with datalogging at each downpoint. Downpoint electrical testing was performed at room temperature. Post-irradiation anneals were performed using a small temperature chamber. 1.4 xperimental Matrix Testing proceeded in accordance with the low dose rate sensitivity diagnostic protocol outlined in MIL-STD-883 Test Method The experimental matrix consisted of six samples irradiated at high dose rate with all pins grounded, six samples irradiated at high dose rate under bias, five samples irradiated at low dose rate with all pins grounded, and five samples irradiated at low dose rate under bias. One control unit was used. A biased, high temperature anneal at 100ºC for 168 hours was performed following the high dose rate test to evaluate the accelerated aging characteristics of the process. The low dose rate samples were annealed under bias for 24 hours at room temperature followed by a second biased anneal for 168 hours at 100ºC. Samples of the ISL70002SH were drawn from lot WPW4J and were packaged in the standard, hermetic, 64 Ld Ceramic Quad Flatpack (CQFP) package; the date code was X1135ABBD. Samples were processed through the standard QML-V burnin screens of 180 hours dynamic and 72 hours static burn-in before irradiation, as required by MIL-STD-883, and were screened to the SMD SMD limits at room, low, and high temperatures before the start of total dose testing. 1.5 Downpoints Planned irradiation downpoints for both dose rates were 0krad(Si), 15krad(Si), 50krad(Si), 100krad(Si), and 150krad(Si). The high dose rate irradiations were followed by a biased anneal at 100ºC for 168 hours. The low dose rate irradiations were followed by a 24-hour room temperature anneal and a 168-hour high temperature anneal at 100ºC, both under bias. TR047 Rev.0.00 Page 4 of 21

5 2. Results 2.1 Attributes Data 2.2 Variables Data Table 1. ISL70002SH Total Dose Test Attributes Data Part Dose Rate, Rad(Si)/s Bias Sample Size Downpoint Pass (Note 1) Fail ISL70002SH 82.1rad(Si)/s Figure 1 6 Pre-irradiation krad(Si) krad(Si) krad(Si) krad(Si) 6 0 HT anneal 6 0 ISL70002SH 82.1rad(Si)/s Grounded 6 Pre-irradiation krad(Si) krad(Si) krad(Si) krad(Si) 6 0 HT anneal 6 0 ISL70002SH 0.01rad(Si)/s Figure 1 5 Pre-irradiation krad(Si) krad(Si) krad(Si) krad(Si) 5 0 RT anneal 5 0 HT anneal 5 0 ISL70002SH 0.01rad(Si)/s Grounded 5 Pre-irradiation krad(Si) krad(Si) krad(Si) krad(Si) 5 0 RT anneal 5 0 HT anneal 5 0 Note: 1. Pass indicates a sample that passes all post-irradiation SMD limits. The ISL70002SH is a complex part and plotting all parameters would be a lengthy undertaking. The plots in Figures 3 through 25 show data for representative parameters at all downpoints. The plots show the median as a function of total dose for each of the irradiation conditions. We chose to use the median because of the relatively small sample sizes involved. All parts showed excellent stability over irradiation, with no observed low dose rate sensitivity. Most data is shown for an input (supply) voltage of 5.5V; the corresponding 3.6V data displayed equal stability and is not plotted. Several parameters (Figures 24 and 25) are informational and are not specified in either the datasheet or the SMD, and do not have formal parametric limits. TR047 Rev.0.00 Page 5 of 21

6 2.3 Variables Data Plots 120 OPRATING CURRNT (ma) Ioper3p6V HDR Biased Ioper3p6V LDR Biased IoperVmax HDR Biased IoperVmax LDR Biased Ioper3p6V Ioper3p6V HDR Grounded Ioper3p6V LDR Grounded IoperVmax HDR Grounded IoperVmax LDR Grounded IoperVmax 20 0 Figure 3. ISL70002SH operating current, current share disabled, 5.5V supply, as a function of total dose cells was six for each cell, while the low dose rate cells were five samples each. The SMD limit is 105mA maximum. 7 6 IssIshDis HDR Biased STANDBY CURRNT (ma) IssIshDis HDR Grounded IssIshDis LDR Biased IssIshDis LDR Grounded, IssIshDis 1 0 Figure 4. ISL70002SH standby supply current, current share disabled, 5.5V supply, as a function of total dose cells was six for each cell, while the low dose rate cells were five samples each. The SMD limit is 6mA maximum. TR047 Rev.0.00 Page 6 of 21

7 8 7 IssIshSlv_nL HDR Biased STANDBY CURRNT (ma) IssIshSlv_nL HDR Grounded IssIshSlv_nL LDR Biased IssIshSlv_nL LDR Grounded, IssIshDis 1 0 Figure 5. ISL70002SH standby supply current, current share enabled, 5.5V supply, master/slave and enable at ground, as a function of total dose irradiation at low and high dose rate for the unbiased (all pins grounded) and the biased (per Figure 2) cases. The low dose rate was 0.01rad(Si)/s and the high dose rate was 82.1rad(Si)/s. The high dose rate irradiations were followed by a high temperature biased anneal at 100ºC for 168 hours. The low dose rate irradiations were followed by a 24-hour room temperature and a 168-hour 100ºC anneal, both under bias. Sample size for the high dose rate cells was six for each cell, while the low dose rate cells were five samples each. The SMD limit is 7mA maximum STANDBY CURRNT (ma) IssIshSlv_IcomL HDR Biased IssIshSlv_IcomL HDR Grounded IssIshSlv_IcomL LDR Biased IssIshSlv_IcomL LDR Grounded, IssIshDis 0 Figure 6. ISL70002SH standby supply current, current share enabled, 5.5V supply, master/slave at ground, as a function of total dose irradiation at low and high dose rate for the unbiased (all pins grounded) and the biased (per Figure 2) cases. The low dose rate was 0.01rad(Si)/s and the high dose rate was 82.1rad(Si)/s. The high dose rate irradiations were followed by a high temperature biased anneal at 100ºC for 168 hours. The low dose rate irradiations were followed by a 24-hour room temperature and a 168-hour 100ºC anneal, both under bias. Sample size for the high dose rate cells was six for each cell, while the low dose rate cells were five samples each. The SMD limit is 11mA maximum. TR047 Rev.0.00 Page 7 of 21

8 RFRNC VOLTAG (V) VrefVmin HDR Biased VrefVmin LDR Biased VrefVmax HDR Biased VrefVmax LDR Biased VrefVmin HDR Grounded VrefVmin LDR Grounded VrefVmax HDR Grounded VrefVmax LDR Grounded Figure 7. ISL70002SH reference voltage for supply voltages of 3.6V (Vmin) and 5.5V (Vmax) as a function of total dose irradiation at low and high dose rate for the unbiased (all pins grounded) and the biased (per Figure 2) cases. The low dose rate was 0.01rad(Si)/s and the high dose rate was 82.1rad(Si)/s. The high dose rate irradiations were followed by a high temperature biased anneal at 100ºC for 168 hours. The low dose rate irradiations were followed by a 24-hour room temperature and a 168-hour 100ºC anneal, both under bias. Sample size for the high dose rate cells was six for each cell, while the low dose rate cells were five samples each. The SMD post-irradiation limits are 0.594V to 0.604V. 3.5 rrampviocha HDR Biased rrampviocha HDR Grounded RROR AMP INPUT OFFST VOLTAG (mv) rrampviocha LDR Biased rrampviochb HDR Biased rrampviochb LDR Biased rrampviochc HDR Biased rrampviochc LDR Biased rrampviocha LDR Grounded rrampviochb HDR Grounded rrampviochb LDR Grounded rrampviochc HDR Grounded rrampviochc LDR Grounded Figure 8. ISL70002SH error amplifier input offset voltage, 5.5V supply, each channel, as a function of total dose cells was six for each cell, while the low dose rate cells were five samples each. The SMD limits are -1mV to 3mV. TR047 Rev.0.00 Page 8 of 21

9 1200 OSCILLATOR FRQUNCY (khz) OscVmin HDR Biased OscVmin LDR Biased OscVmax HDR Biased OscVmax LDR Biased OscVmin HDR Grounded OscVmin LDR Grounded OscVmax HDR Grounded OscVmax LDR Grounded 800 Figure 9. ISL70002SH internal oscillator tolerance as a function of total dose irradiation, 5.5V supply, at low and high dose rate for the unbiased (all pins grounded) and the biased (per Figure 2) cases. The low dose rate was 0.01rad(Si)/s and the high dose rate was 82.1rad(Si)/s. The high dose rate irradiations were followed by a high temperature biased anneal at 100ºC for 168 hours. The low dose rate irradiations were followed by a 24-hour room temperature and a 168-hour 100ºC anneal, both under bias. Sample size for the high dose rate cells was six for each cell, while the low dose rate cells were five samples each. The SMD limits are -15% to 15%; for a nominal frequency of 1MHz this translates to a frequency range of 850kHz to 1150kHz MINIMUM ON AND OFF TIM (ns) MinTimeOn HDR Biased MinTimeOn LDR Biased MinTimeOff HDR Biased MinTimeOff LDR Biased MinTimeOn MinTimeOn HDR Grounded MinTimeOn LDR Grounded MinTimeOff HDR Grounded MinTimeOff LDR Grounded MinTimeOff 50 0 Figure 10. ISL70002SH minimum LXx ON and OFF time, 5.5V supply, as a function of total dose irradiation at low and high dose rate for the unbiased (all pins grounded) and the biased (per Figure 2) cases. The low dose rate was 0.01rad(Si)/s and the high dose rate was 82.1rad(Si)/s. The high dose rate irradiations were followed by a high temperature biased anneal at 100ºC for 168 hours. The low dose rate irradiations were followed by a 24-hour room temperature and a 168-hour 100ºC anneal, both under bias. Sample size for the high dose rate cells was six for each cell, while the low dose rate cells were five samples each. The SMD limits are 275ns maximum (ON time) and 50ns maximum (OFF time). TR047 Rev.0.00 Page 9 of 21

10 2.5 SYNC THRSHOLD VOLTAG (V) SyncVIH HDR Biased SyncVIH LDR Biased SyncVIL HDR Biased SyncVIL LDR Biased SyncVIH HDR Grounded SyncVIH LDR Grounded SyncVIL HDR Grounded SyncVIL LDR Grounded 0.0 Figure 11. ISL70002SH sync input HIGH and LOW threshold voltage, 5.5V supply, as a function of total dose cells was six for each cell, while the low dose rate cells were five samples each. The SMD limits are 2.3V maximum (HIGH) and 1V minimum (LOW) r DS(ON) (mω) RdsUpperAvg HDR Biased RdsUpperAvg LDR Biased RdsUpperParallel HDR Biased RdsUpperParallel LDR Biased RdsUpperAvg HDR Grounded RdsUpperAvg LDR Grounded RdsUpperParallel HDR Grounded RdsUpperParallel LDR Grounded 50 0 Figure 12. ISL70002SH average upper device drain-to-source ON resistance (r DS(ON) ) and parallel (all ten power blocks) r DS(ON), 5.5V supply, as a function of total dose irradiation at low and high dose rate for the unbiased (all pins grounded) and the biased (per Figure 2) cases. The low dose rate was 0.01rad(Si)/s and the high dose rate was 82.1rad(Si)/s. The high dose rate irradiations were followed by a high temperature biased anneal at 100ºC for 168 hours. The low dose rate irradiations were followed by a 24-hour room temperature and a 168-hour 100ºC anneal, both under bias. Sample size for the high dose rate cells was six for each cell, while the low dose rate cells were five samples each. The SMD parallel r DS(ON) limit is 40mΩ maximum; the average r DS(ON) is not specified. TR047 Rev.0.00 Page 10 of 21

11 r DS(ON) (mω) RdsLowerAvg HDR Biased RdsLowerAvg LDR Biased RdsLowerParallel HDR Biased RdsLowerParallel LDR Biased RdsLowerAvg HDR Grounded RdsLowerAvg LDR Grounded RdsLowerParallel HDR Grounded RdsLowerParallel LDR Grounded Figure 13. ISL70002SH average lower device drain-to-source ON resistance (r DS(ON) ) and parallel (all ten power blocks) r DS(ON) as a function of total dose irradiation at low and high dose rate for the unbiased (all pins grounded) and the biased (per Figure 2) cases. The low dose rate was 0.01rad(Si)/s and the high dose rate was 82.1rad(Si)/s. The high dose rate irradiations were followed by a high temperature biased anneal at 100ºC for 168 hours. The low dose rate irradiations were followed by a 24-hour room temperature and a 168-hour 100ºC anneal, both under bias. Sample size for the high dose rate cells was six for each cell, while the low dose rate cells were five samples each. The SMD parallel r DS(ON) limit is 30mΩ maximum; the average r DS(ON) is not specified POR HIGH POR RISING THRSHOLD (V) PWRIN_Vstart_POR_Hi HDR Biased PWRIN_Vstart_POR_Hi LDR Biased PWRIN_Vstart_POR_Hi HDR Grounded PWRIN_Vstart_POR_Hi LDR Grounded Figure 14. ISL70002SH Power-On-Reset (POR) rising threshold, POR select at input voltage, 5.5V supply, as a function of total dose irradiation at low and high dose rate for the unbiased (all pins grounded) and the biased (per Figure 2) cases. The low dose rate was 0.01rad(Si)/s and the high dose rate was 82.1rad(Si)/s. The high dose rate irradiations were followed by a high temperature biased anneal at 100ºC for 168 hours. The low dose rate irradiations were followed by a 24-hour room temperature and a 168-hour 100ºC anneal, both under bias. Sample size for the high dose rate cells was six for each cell, while the low dose rate cells were five samples each. The SMD limits are 4.10V to 4.45V. TR047 Rev.0.00 Page 11 of 21

12 450 POR HIGH 400 POR HYSTRSIS (mv) PWRIN_Vhys_POR_Hi HDR Biased PWRIN_Vhys_POR_Hi HDR grounded PWRIN_Vhys_POR_Hi LDR Biased PWRIN_Vhys_POR_Hi LDR Grounded 200 Figure 15. ISL70002SH POR hysteresis, POR select at input voltage, 5.5V supply, as a function of total dose cells was six for each cell, while the low dose rate cells were five samples each. The SMD limits are 225mV to 425mV POR LOW POR RISING THRSHOLD (V) PWRIN_Vstart_POR_gnd HDR Biased PWRIN_Vstart_POR_gnd HDR Grounded PWRIN_Vstart_POR_gnd LDR Biased PWRIN_Vstart_POR_gnd LDR Grounded Figure 16. ISL70002SH POR rising threshold, POR select at ground, 5.5V supply, as a function of total dose cells was six for each cell, while the low dose rate cells were five samples each. The SMD limits are 2.65V to 2.95V. TR047 Rev.0.00 Page 12 of 21

13 300 POR LOW 250 POR HYSTRSIS (mv) PWRIN_Vhys_POR_gnd HDR Biased PWRIN_Vhys_POR_gnd HDR Grounded PWRIN_Vhys_POR_gnd LDR Biased PWRIN_Vhys_POR_gnd LDR Grounded Figure 17. ISL70002SH POR hysteresis voltage, POR select at ground, 5.5V supply, as a function of total dose cells was six for each cell, while the low dose rate cells were five samples each. The SMD limits are 70mV to 240mV NABL THRSHOLD (V) N_Thr HDR Biased N_Thr HDR Grounded N_Thr LDR Biased N_Thr LDR Grounded Figure 18. ISL70002SH enable rising and falling threshold voltage, 5.5V supply, as a function of total dose cells was six for each cell, while the low dose rate cells were five samples each. The SMD limits are 0.56V to 0.64V. TR047 Rev.0.00 Page 13 of 21

14 PGOOD_Lkg HDR Biased PGOOD LAKAG (µa) PGOOD_Lkg HDR Grounded PGOOD_Lkg LDR Biased PGOOD_Lkg LDR Grounded HDR RT ANNAL Figure 19. ISL70002SH Power-Good (PGOOD) leakage, 5.5V supply, as a function of total dose irradiation at low and high dose rate for the unbiased (all pins grounded) and the biased (per Figure 2) cases. The low dose rate was 0.01rad(Si)/s and the high dose rate was 82.1rad(Si)/s. The high dose rate irradiations were followed by a high temperature biased anneal at 100ºC for 168 hours. The low dose rate irradiations were followed by a 24-hour room temperature and a 168-hour 100ºC anneal, both under bias. Sample size for the high dose rate cells was six for each cell, while the low dose rate cells were five samples each. The SMD limit is 1µA maximum. 100 UNDRVOLTAG THRSHOLD (%) UV_TripThres HDR Biased UV_TripThres HDR Grounded UV_TripThres LDR Biased UV_TripThres LDR Grounded UV_RecvThres HDR Biased UV_RecvThres HDR Grounded UV_RecvThres LDR Biased UV_RecvThres LDR Grounded UV_TripThres UV_TripThres 60 UV_RecvThres UV_RecvThres Figure 20. ISL70002SH Undervoltage (UV) trip threshold and recovery threshold, 5.5V supply, as a function of total dose irradiation at low and high dose rate for the unbiased (all pins grounded) and the biased (per Figure 2) cases. The low dose rate was 0.01rad(Si)/s and the high dose rate was 82.1rad(Si)/s. The high dose rate irradiations were followed by a high temperature biased anneal at 100ºC for 168 hours. The low dose rate irradiations were followed by a 24-hour room temperature and a 168-hour 100ºC anneal, both under bias. Sample size for the high dose rate cells was six for each cell, while the low dose rate cells were five samples each. The SMD limits are 71% to 79% (UV trip threshold) and 84% to 92% (UV recovery threshold). TR047 Rev.0.00 Page 14 of 21

15 7.5 OVRCURRNT TRIP LVL (A) OverIA_6A HDR Biased OverIA_6A HDR Grounded OverIA_6A LDR Biased OverIA_6A LDR Grounded OverIA_6B HDR Biased OverIA_6B HDR Grounded OverIA_6B LDR Biased OverIA_6B LDR Grounded 5.0 Figure 21. ISL70002SH Overcurrent (OC) trip threshold, 6A case, 5.5V supply, as a function of total dose cells was six for each cell, while the low dose rate cells were five samples each. The SMD limits are 5.75A to 7.35A OVRCURRNT TRIP LVL (A) OverIA_24A HDR Biased OverIA_24A LDR Biased OverIA_24B HDR Biased OverIA_24B LDR Biased OverIA_24A HDR Grounded OverIA_24A LDR Grounded OverIA_24B HDR Grounded OverIA_24B LDR Grounded Figure 22. ISL70002SH OC trip threshold, 24A case, as a function of total dose irradiation at low and high dose rate for the unbiased (all pins grounded) and the biased (per Figure 2) cases. The low dose rate was 0.01rad(Si)/s and the high dose rate was 82.1rad(Si)/s. The high dose rate irradiations were followed by a high temperature biased anneal at 100ºC for 168 hours. The low dose rate irradiations were followed by a 24-hour room temperature and a 168-hour 100ºC anneal, both under bias. Sample size for the high dose rate cells was six for each cell, while the low dose rate cells were five samples each. The SMD limits are 23A to 26A. TR047 Rev.0.00 Page 15 of 21

16 20 18 SLOP COMPNSATION (A/µs) SC11FS1 HDR Biased SC11FS1 HDR Grounded SC11FS1 LDR Biased SC11FS1 LDR Grounded 6 4 Figure 23. ISL70002SH slope compensation referred to V OUT, SC1 = SC0 = V IN, as a function of total dose cells was six for each cell, while the low dose rate cells were five samples each. The SMD limits are 5.9A/µs to 17.7A/µs. 320 OUTPUT TO PILOT CURRNT RATIO/ IoutIpilotRatioC HDR Biased IoutIpilotRatioC HDR Grounded IoutIpilotRatioC LDR Biased IoutIpilotRatioC LDR Grounded 240 Figure 24. ISL70002SH output current to pilot current ratio divided by 1000 as a function of total dose cells was six for each cell, while the low dose rate cells were five samples each. The parameter is not specified in the SMD; the AT limits are to This ratio is a dimensionless value. TR047 Rev.0.00 Page 16 of 21

17 14 ADJUST MARGIN (mv) AdjMargin_Vmin HDR Biased AdjMargin_Vmin HDR Grounded AdjMargin_Vmin LDR Biased AdjMargin_Vmin LDR Grounded 4 2 Figure 25. ISL70002SH adjust margin at 3.6V supply as a function of total dose irradiation at low and high dose rate for the unbiased (all pins grounded) and the biased (per Figure 2) cases. The low dose rate was 0.01rad(Si)/s and the high dose rate was 82.1rad(Si)/s. The high dose rate irradiations were followed by a high temperature biased anneal at 100ºC for 168 hours. The low dose rate irradiations were followed by a 24-hour room temperature and a 168-hour 100ºC anneal, both under bias. Sample size for the high dose rate cells was six for each cell, while the low dose rate cells were five samples each. This parameter is not specified in the SMD; the AT limits are 4mV to 12.5mV. TR047 Rev.0.00 Page 17 of 21

18 3. Conclusions This document reports the results of total dose testing of the ISL70002SH hardened POL regulator. Parts were tested at low and high dose rates under biased and unbiased conditions as outlined in MIL-STD-883 Test Method , to a total dose of 150krad(Si) at each dose rate. A biased, high temperature anneal at 100ºC for 168 hours was performed following the high dose rate test to evaluate the accelerated aging characteristics of the process. The low dose rate samples were annealed under bias for 24 hours at room temperature followed by a second biased anneal for 168 hours at 100ºC. AT characterization testing at all downpoints showed no rejects to the datasheet limits. Variables data for selected parameters is presented in Figures 3 through 25. No low dose rate sensitivity was noted and all parameters showed excellent stability. No differences between biased and unbiased irradiation were noted. The part is not considered dose rate or bias sensitive. The anneals had little effect at either dose rate. TR047 Rev.0.00 Page 18 of 21

19 4. Appendix Table 2. Reported Parameters Figure Parameter Limit, Low Limit, High Units Notes 3 Operating Current ma I share disabled, 5.5V supply 4 Standby Supply Current - 6 ma I share enabled, 5.5V supply 5 Standby Supply Current - 7 ma I share disabled, 5.5V supply 6 Standby Supply Current - 11 ma 5.5V supply 7 Reference Voltage V 3.6 and 5.5V supply 8 rror Amplifier Input Offset Voltage -1 3 mv 5.5V supply 9 Internal Oscillator Tolerance MHz 5.5V supply 10 Minimum LXx On and Off Time ns 5.5V supply Sync Input High and Low Threshold Voltage V 5.5V supply 1 - V 12 Average and Parallel Upper Device r DS(ON) - - mω 40 - mω 13 Average and Parallel Lower Device r DS(ON) - - mω 30 - mω 14 POR Rising Threshold V POR select at supply 15 POR Hysteresis Voltage mv POR select at supply 16 POR Rising Threshold V POR select at ground 17 POR Hysteresis Voltage mv POR select at ground 18 nable Rising and Falling Threshold Voltage V 5.5V supply 19 PGOOD Leakage - 1 µa 5.5V supply 20 Undervoltage and Recovery Threshold Voltage % Overcurrent Trip Threshold A 6A case 22 Overcurrent Trip Threshold A 24A case 23 Slope Compensation A/µs SC1 = SC0 = V IN 24 Output to Pilot Current Ratio AT limit 25 Adjust Margin mv AT limit TR047 Rev.0.00 Page 19 of 21

20 5. Revision History Rev. Date Page 0.00 Initial release Description Summary TR047 Rev.0.00 Page 20 of 21

21 Notice 1. Descriptions of circuits, software and other related information in this document are provided only to illustrate the operation of semiconductor products and application examples. You are fully responsible for the incorporation or any other use of the circuits, software, and information in the design of your product or system. Renesas lectronics disclaims any and all liability for any losses and damages incurred by you or third parties arising from the use of these circuits, software, or information. 2. Renesas lectronics hereby expressly disclaims any warranties against and liability for infringement or any other claims involving patents, copyrights, or other intellectual property rights of third parties, by or arising from the use of Renesas lectronics products or technical information described in this document, including but not limited to, the product data, drawings, charts, programs, algorithms, and application examples. 3. No license, express, implied or otherwise, is granted hereby under any patents, copyrights or other intellectual property rights of Renesas lectronics or others. 4. You shall not alter, modify, copy, or reverse engineer any Renesas lectronics product, whether in whole or in part. Renesas lectronics disclaims any and all liability for any losses or damages incurred by you or third parties arising from such alteration, modification, copying or reverse engineering. 5. Renesas lectronics products are classified according to the following two quality grades: Standard and High Quality. The intended applications for each Renesas lectronics product depends on the product s quality grade, as indicated below. "Standard": Computers; office equipment; communications equipment; test and measurement equipment; audio and visual equipment; home electronic appliances; machine tools; personal electronic equipment; industrial robots; etc. "High Quality": Transportation equipment (automobiles, trains, ships, etc.); traffic control (traffic lights); large-scale communication equipment; key financial terminal systems; safety control equipment; etc. Unless expressly designated as a high reliability product or a product for harsh environments in a Renesas lectronics data sheet or other Renesas lectronics document, Renesas lectronics products are not intended or authorized for use in products or systems that may pose a direct threat to human life or bodily injury (artificial life support devices or systems; surgical implantations; etc.), or may cause serious property damage (space system; undersea repeaters; nuclear power control systems; aircraft control systems; key plant systems; military equipment; etc.). Renesas lectronics disclaims any and all liability for any damages or losses incurred by you or any third parties arising from the use of any Renesas lectronics product that is inconsistent with any Renesas lectronics data sheet, user s manual or other Renesas lectronics document. 6. When using Renesas lectronics products, refer to the latest product information (data sheets, user s manuals, application notes, General Notes for Handling and Using Semiconductor Devices in the reliability handbook, etc.), and ensure that usage conditions are within the ranges specified by Renesas lectronics with respect to maximum ratings, operating power supply voltage range, heat dissipation characteristics, installation, etc. Renesas lectronics disclaims any and all liability for any malfunctions, failure or accident arising out of the use of Renesas lectronics products outside of such specified ranges. 7. Although Renesas lectronics endeavors to improve the quality and reliability of Renesas lectronics products, semiconductor products have specific characteristics, such as the occurrence of failure at a certain rate and malfunctions under certain use conditions. Unless designated as a high reliability product or a product for harsh environments in a Renesas lectronics data sheet or other Renesas lectronics document, Renesas lectronics products are not subject to radiation resistance design. You are responsible for implementing safety measures to guard against the possibility of bodily injury, injury or damage caused by fire, and/or danger to the public in the event of a failure or malfunction of Renesas lectronics products, such as safety design for hardware and software, including but not limited to redundancy, fire control and malfunction prevention, appropriate treatment for aging degradation or any other appropriate measures. Because the evaluation of microcomputer software alone is very difficult and impractical, you are responsible for evaluating the safety of the final products or systems manufactured by you. 8. Please contact a Renesas lectronics sales office for details as to environmental matters such as the environmental compatibility of each Renesas lectronics product. You are responsible for carefully and sufficiently investigating applicable laws and regulations that regulate the inclusion or use of controlled substances, including without limitation, the U RoHS Directive, and using Renesas lectronics products in compliance with all these applicable laws and regulations. Renesas lectronics disclaims any and all liability for damages or losses occurring as a result of your noncompliance with applicable laws and regulations. 9. Renesas lectronics products and technologies shall not be used for or incorporated into any products or systems whose manufacture, use, or sale is prohibited under any applicable domestic or foreign laws or regulations. You shall comply with any applicable export control laws and regulations promulgated and administered by the governments of any countries asserting jurisdiction over the parties or transactions. 10. It is the responsibility of the buyer or distributor of Renesas lectronics products, or any other party who distributes, disposes of, or otherwise sells or transfers the product to a third party, to notify such third party in advance of the contents and conditions set forth in this document. 11. This document shall not be reprinted, reproduced or duplicated in any form, in whole or in part, without prior written consent of Renesas lectronics. 12. Please contact a Renesas lectronics sales office if you have any questions regarding the information contained in this document or Renesas lectronics products. (Note 1) Renesas lectronics as used in this document means Renesas lectronics Corporation and also includes its directly or indirectly controlled subsidiaries. (Note 2) Renesas lectronics product(s) means any product developed or manufactured by or for Renesas lectronics. (Rev November 2017) SALS OFFICS Refer to " for the latest and detailed information. Renesas lectronics America Inc Murphy Ranch Road, Milpitas, CA 95035, U.S.A. Tel: , Fax: Renesas lectronics Canada Limited 9251 Yonge Street, Suite 8309 Richmond Hill, Ontario Canada L4C 9T3 Tel: Renesas lectronics urope Limited Dukes Meadow, Millboard Road, Bourne nd, Buckinghamshire, SL8 5FH, U.K Tel: , Fax: Renesas lectronics urope GmbH Arcadiastrasse 10, Düsseldorf, Germany Tel: , Fax: Renesas lectronics (China) Co., Ltd. Room 1709 Quantum Plaza, No.27 ZhichunLu, Haidian District, Beijing, P. R. China Tel: , Fax: Renesas lectronics (Shanghai) Co., Ltd. Unit 301, Tower A, Central Towers, 555 Langao Road, Putuo District, Shanghai, P. R. China Tel: , Fax: Renesas lectronics Hong Kong Limited Unit , 16/F., Tower 2, Grand Century Place, 193 Prince dward Road West, Mongkok, Kowloon, Hong Kong Tel: , Fax: Renesas lectronics Taiwan Co., Ltd. 13F, No. 363, Fu Shing North Road, Taipei 10543, Taiwan Tel: , Fax: Renesas lectronics Singapore Pte. Ltd. 80 Bendemeer Road, Unit #06-02 Hyflux Innovation Centre, Singapore Tel: , Fax: Renesas lectronics Malaysia Sdn.Bhd. Unit 1207, Block B, Menara Amcorp, Amcorp Trade Centre, No. 18, Jln Persiaran Barat, Petaling Jaya, Selangor Darul hsan, Malaysia Tel: , Fax: Renesas lectronics India Pvt. Ltd. No.777C, 100 Feet Road, HAL 2nd Stage, Indiranagar, Bangalore , India Tel: , Fax: Renesas lectronics Korea Co., Ltd. 17F, KAMCO Yangjae Tower, 262, Gangnam-daero, Gangnam-gu, Seoul, Korea Tel: , Fax: Renesas lectronics Corporation. All rights reserved. Colophon 7.0