Computing with Emerging Non- Volatile Memory Devices. Omid Kavehei 2013JULY11

Transcription

1 Computing with Emerging Non- Volatile Memory Devices Omid Kavehei 2013JULY11 1

2 History of Non-volatile Memory Technology Large operational current (~100mA) Slow programming (~10ms) Technological advancement Remarkable reduction in device dimensions Improvement in phase-change materials (~50uA, ~100ns) Ovonyx was founded in 1999 Active research by Samsung, Micron, IBM etc. SR Ovshinsky, The ovonic cognitive computer: A new paradigm

3 Emerging Non-Volatile Memory Technologies Magneto-resistive random access memory (MRAM) Metal-oxide redox memory (RRAM) CBRAM, conductive bridge RAM PMC, programmable metallization cell Phase change memory (PCM or PCRAM) 3

4 Memristor 4

5 The 4 th fundamental element! 5

6 Technologies 6

7 Crossbar switch O. Kavehei, 2011 Adelaide Microscopy 7

8 Current-Voltage Characteristics digital RRAM O. Kavehei, MWSCAS

9 Analog RRAM K. Eshraghian, Proc. of the IEEE

10 Current-voltage characteristics 10

11 Switching mechanisms 11

12 VCM Systems 12

13 ECM cathode Ag Ag + Ag Ag Ag Pt Pt Pt Pt Oxidation of top electrode Ion migration Reduction at bottom electrode Electrodeposit formation Non-volatile conductive connection Dissolution of the conductive path under reverse bias R. Waser

14 RRAM is not memristor! I. Valov et al. Nature Communications, 2013 O. Kavehei et al., Memristive Networks,

15 Digital RRAM O. Kavehei et al., Memristive Networks,

16 Modelling (1) 16

17 Modelling (2) 17

18 Requirements: Universal NVM and Voltage-Time dilemma! retention: C write operation and read operation V wr /V rd =10 (max) to have t ret /t wr ~10 16!!! There are only a few physical mechanisms which show such a huge non-linearity Possible solution: Exponential relationship between voltage and time in ECM and VCM systems R. Waser, Adv. Mat

19 Devices... P. Wong, Proc. of the IEEE

20 ON, OFF Resistances and Read Voltage/Current O. Kavehei, et al., Nanoscale,

21 Architectural Issues 21

22 Why switch element, rectifier? 22

23 Why switch element, rectifier? Avoid read sneak current The diode must: Isolate the unselected cells low leakage current Sustain reset current high forward current 23 D. Ielmini, Nano Giga Challenges 2011

24 Memory Cell Selection (1) P. Wong, Proc. of the IEEE

25 Memory Cell Selection (2) 25

26 less current requirement smaller selection element Magnetoresistive RAM (MeRAM) Prof Kang Wang (UCLA) July 16, 09:00 10:00 ultra-low power nanometer scale two terminal switch, MeRAM Prof. Kang Wang has been with the Electrical Engineering Department at UCLA since He was Chair of the department from 1993 to He is a Fellow of the IEEE, and a member of the American Physical Society, the Materials Research Society, the Eta Kappa Nu Society, the Sigma Xi Society and the Phi Tau Phi Honor Society. He is the director of the Western Institute of Nanoelectronics (WIN), associate director of California NanoSystems Institute (CNSI) and the director of Marco Focus Center on Functional Engineered Nano Architectonics (FENA), and Editor-in-Chief for the IEEE Transactions on Nanotechnology. 26

27 Analytical Model of Crossbars (1) 27

28 Analytical Model of Crossbars (2) 28

29 CRS 29

30 Analytical Model of Crossbars (3) 30

31 Analytical Model of Crossbars (4) 31

32 CRS Measurement O. Kavehei et al., Nanoscale

33 CRS non-destructive readout S Tappertzhofen, Nanotechnology

34 V-Freq and C-V O. Kavehei et al., Nanoscale

35 CRS CAM 35

36 HD vs Output Voltage 36

37 RRAM Logic (1) If p=0 unconditional SET for q If p=1 no change in q J. Borghetti et al., Nature,

38 RRAM Logic (2) 38

39 Quest for Multi-bit Memory Cell 39

40 Multi-Level Cell (1) Multi-level phase change memory 40 (PCM) IBM, 2012

41 Multi-Level Cell (2) MCL by controlling the I set P. Wong, Proc. of the IEEE

42 Multi-Level Cell (3) - verification Proc. of the IEEE 2012 ISSCC

43 Multi-Level Cell (4) To achieve different resistance levels reliably iterative programming is essential An integral feedback controller is most widely used Nirschl et al., IEDM, 2007 Papandreou et al., ISCAS, (PCM) IBM, 2012

44 Multi-Level Cell (5) not anymore! R vs T Retention 500 HRS IRS LRS

45 Array of MLCs 0.1, 0.5, 1, and 5 MΩ 45 University of Michigan and HRL, 2012

46 Cognitive Computing and Redox-based RAMs 46

47 Computing with RRAMs 47

48 Plastic weights... O. Kavehei et al., ISSNIP

49 Challenges and opportunities of ReRAM for neuromorphic engineering Dr Themis Prodromakis (University of Southampton) July 17, 09:00 10:00 co-existence of unipolar/bipolar switching volatility effects Dr Themis Prodromakis is a Reader in Nanoelectronics within the Nano Research Group, ECS department at University of Southampton. He previously held a Corrigan Fellowship in Nanoscale Technogy and Science, funded by the Corrigan Foundation and LSI Inc., within the Centre for Bio-inspired Technology at Imperial College London and a Lindemann Trust Visiting Fellowship in EECS UC Berkeley. Dr. Prodromakis is a Senior Member of the IEEE, and a member of the INE, the IET, and of the BioCAS, Nano-Giga, and Sensory Systems Technical Committees of the IEEE Circuits & Systems Society. 49

50 Cognitive Computing with Emerging Nanodevices: Material Point of View Dr Doo Seok Jeong (KIST) July 18, 09:00 10:00 nanoionics thin film materials for artificial neurons and chemical synapses spike firing, short- and long-term memories at the single nerve cell level by means of point-defectmigration-dynamics in nanoionic systems Dr Doo Seok Jeong, He is a senior scientist at the Korea Institute of Science and Technology (KIST), South Korea. He received his BE and ME in materials science and engineering from Seoul National University in 2002 and 2005, respectively. He received his PhD degree in materials science from RWTH Aachen University, Germany, in Since 2008, he has worked for KIST. His research interests are nanoionics-based electronic transport behaviour and related electronic devices. 50

51 Integration 51

52 Example (1) 52 HP

53 Example (2) 53 HP, PNAS 2009

54 Example (3) 5 μm 54 University of Michigan and HRL, 2012

55 TSV RRAM 55 EPFL, TNANO 2012

56 A review... 56

57 Spike Shape (1) 57 Serrano-Gotarredona et al. Frontiers in Neuroscience 2013

58 Spike Shape (2) S. Yu, et al., IEEE Trans. Electron Devices (2011) 58

59 Additive or Quadratic STDP If the synaptic weight update is proportional to the square of actual synaptic strength, we call it quadratic STDP Serrano-Gotarredona et al. Frontiers in Neuroscience Zamarreño-Ramos et al., 2011

60 Neuromorphic System 60 S. Park et al., IEDM 2012

61 Shimeng Yu Tutorials Brain-inspired computing with solid-state devices Sat, July 13, 14:00 14:45 Jens Bürger Introducing memristors to the SKIM architecture and potentials for harnessing memristor device variation for computing Sat, July 13, 14:45 15:00 61

62 Stochastic Computing Voltage, V Time, t P. Sheridan et al., Nanoscale

63 Acknowledgment... Prof Stan Skafidas (Centre for Neural Engineering) Prof Kamran Eshraghian, (idatamap Corporation Pty Ltd, Australia) Prof Rainer Waser, Dr Eike Linn, Dr Stefan Tappertzhofen, Mr Nielen Lutz, and Ilia Valov (RWTH Aachen University and Peter Grunberg Institut 7, Julich) Prof Sean Li, Dr Dewei Chu and Mr Adnan Younis (University of New South Wales) A/Prof Ray Dagastine (Melbourne Centre for Nanofabrication) 63

64 Projects P1 P2 P3 64

65 Thank you 65