PCN Number: PCN Date: Nov 27, 2017 LMV84x Die Revision Change and Datasheet Updates Customer Contact: PCN Manager Dept: Quality Services

Transcription

1 PCN Number: PCN Date: Nov 27, 2017 Title: LMV84x Die Revision Change and Datasheet Updates Customer Contact: PCN Manager Dept: Quality Services Proposed 1 st Estimated Sample Date provided at sample Ship Date: Feb 27, 2018 vailability: request. Change Type: ssembly Site ssembly Process ssembly Materials Design Electrical Specification Mechanical Specification Test Site Packing/Shipping/Labeling Test Process Wafer ump Site Wafer ump Material Wafer ump Process Wafer Fab Site Wafer Fab Materials Wafer Fab Process Part number change PCN Details Description of Change: This notification is to inform of a design change to the LMV841, LMV842 and LMV844 family of devices. The design change is a die enhancement which removes the 12V capacitor and utilizes only 7V capacitors. The Die Revision and the datasheet number will be changing: Current New Die Revision Datasheet Number Die Revision Datasheet Number SNOST1H SNOST1I The product datasheet(s) is updated as seen in the change revision history below: These changes may be reviewed at the datasheet links provided: Reason for Change: Improved product performance nticipated impact on Form, Fit, Function, Quality or Reliability (positive / negative): None

2 Changes to product identification resulting from this PCN: Die Rev designator will change as shown in the table and sample label below: Current Die Rev [2P] New Die Rev [2P] Sample product shipping label (not actual product label) Product ffected: LMV841MG/NOP LMV842MX/NOP LMV844M/NOP LMV844MTX/NOP LMV841MGX/NOP LMV842MM/NOP LMV844MX/NOP LMV842M/NOP LMV842MMX/NOP LMV844MT/NOP Qualification Report LMV841 - Grade 1 ll Layer Change, Elimination of 12V Capacitor pprove Date 08-Nov-2017 LMV841MG/NOP Product LMV841QMG/NOP Rev (Old Design) QS LM94022MG QS Product LMV844M New Design (all Layer TIEM- MLCC ssembly Site TIEM-MLCC TIEM-MLCC TIEM- TIEM- MLCC MLCC Family SC70 SC70 SOIC SC70 SOIC Flammability Rating UL 94 V-0 UL 94 V-0 UL 94 V-0 UL 94 V-0 UL 94 V-0 Wafer Fab Supplier MF MF MF MF MF Wafer Fab Process VIP50CLZ3 VIP50CLZ3 VIP50CLZ3 CMOS7 VIP50CLZ3 - Qual Device LMV841MG/NOP is qualified at LEVEL1-260CG

3 Type C ED Test Name / Condition utoclave 121C Electrical Characterizati on Duration Qualification Results LMV841MG/NOP LMV841QMG/NOP Rev (Old Design) QS Product LMV844M New Design (all Layer QS LM94022M G LMP8601QM 96-1/77/0-3/231/0 - Per Datasheet Parameter s 1/30/0 - - Pass - HST iased HST, 130C/85%RH 96-3/231/ Temperature, THT Humidity ias Test C, /231/0-85%RH HM ESD - HM 2500 V 1/3/ CDM ESD - CDM 1000 V 1/3/ HTOL Life Test, C 1/77/0-1/77/0-3/231/0 HTSL High Temp Storage ake, 150C - 1/45/0-3/231/0 LU Latch-up (per JESD78) 1/6/ TC Temperature Cycle, - 65/150C 500 Cycles 1/77/0 1/77/0-3/231/0 - Preconditioning was performed for utoclave, Unbiased HST, TH/iased HST, Temperature Cycle, Thermal Shock, and HTSL, as applicable LMV842 - ll Layer Change, Elimination of 12V Capacitor pprove Date 10-Nov-2017 Product LMV842M/NOP X ssembly Site TIEM-MLCC TIEM-MLCC Family SOIC SOIC Flammability Rating UL 94 V-0 UL 94 V-0 Wafer Fab Supplier MF MF Wafer Fab Process VIP50CLZ3 VIP50CLZ3 - Qual Device LMV842M/NOP is qualified at LEVEL1-260CG

4 Qualification Results Type Test Name / Condition Duration LMV842M/NOP C utoclave 121C 96-3/231/0 ED Electrical Characterization Per Datasheet Parameters 3/90/0 - HST iased HST, 130C/85%RH 96-3/231/0 THT Temperature, Humidity ias Test 85 C, 85%RH HM ESD - HM 2500 V 1/3/0 - CDM ESD - CDM 1000 V 1/3/0 - HTOL Life Test, 125C /231/0 3/231/0 ELFR Early Life Failure Rate, 125C 48 3/2400/0 - HTSL High Temp. Storage ake, 150C /77/0 LU Latch-up (per JESD78) 1/6/0 - TC Temperature Cycle, -65/150C 500 Cycles - 3/231/0 - Preconditioning was performed for utoclave, Unbiased HST, TH/iased HST, Temperature Cycle, Thermal Shock, and HTSL, as applicable LMV844 ll Layer Change, Elimination of 12V Capacitor pprove Date 10-Nov-2017 Product LMV844M/NOP (all Layer QS Product LMV842QM/NOP X ssembly Site TIEM-MLCC TIEM-MLCC TIEM-MLCC Family SOIC SOIC SOIC Flammability Rating UL 94 V-0 UL 94 V-0 UL 94 V-0 Wafer Fab Supplier MF MF MF Wafer Fab Process VIP50CLZ3 VIP50CLZ3 VIP50CLZ3 - Qual Device LMV844MX/NOP is qualified at LEVEL1-260CG Qualification Results Type Test Name / Condition Duration LMV844M/NOP QS Product LMV842QM/NOP C utoclave 121C /231/0 ED Electrical Characterization Per Datasheet Parameters 3/90/0 - - HST iased HST, 130C/85%RH /231/0 THT Temperature, Humidity ias Test 85 C, 85%RH HM ESD - HM 2500 V 1/3/0 - - CDM ESD - CDM 1000 V 1/3/0 - - HTOL Life Test, 125C /154/0 3/231/0 3/231/0 ELFR Early Life Failure Rate, 125C 48-3/2400/0 - HTSL High Temp. Storage ake, 150C /77/0 LU Latch-up (per JESD78) 1/6/0 - - TC Temperature Cycle, -65/150C 500 Cycles - - 3/231/0

5 - Preconditioning was performed for utoclave, Unbiased HST, TH/iased HST, Temperature Cycle, Thermal Shock, and HTSL, as applicable For questions regarding this notice, s can be sent to the regional contacts shown below, or you can contact your local Field Sales Representative. Location US Europe sia Pacific Japan