Tokyo Electron Corporate Update

Transcription

1 Tokyo Electron Corporate Update August 3,

2 Contents 1. TEL Overview 2. Medium-term Management Plan TEL Initiatives and Progress 3. FY2019 Business Environment and Financial Estimates Appendix 1: Effects of EUV Lithography Adoption Appendix 2: Diversity of Semiconductor Technology Appendix 3: Deposition System Appendix 4: Etch System Appendix 5: FPD Production Equipment Appendix 6: Financial Data

3 TEL Overview 3

4 TEL is Innovative and Flexible to Market Change (Billion Yen) 1,500 1,200 Distributor of other suppliers products TEL consolidated net sales Established development/ manufacturing functions Globalization Production reform Striving for new growth (FY) (E) Established first manufacturing JV (TEL-Thermco) Discontinued export business of consumer products Listed on TSE #2 in1980 and #1 in 1984 Began overseas direct operations Strengthened corporate governance Semiconductor applications Mainframe computer PC Mobile phone Consumer electronics, etc. 4

5 Financial Performance: Sales and Operating Margin (Billion Yen) 1,500 TEL Net sales 1, % 1,200 Operating income Operating margin 1, % % % % 26.1% % % % 17.6% 30% 20% % 2.5% 10% % -4.4% -0.5% -10% (FY) (E) 4M DRAM oversupply Financial crisis in Asia 64M DRAM oversupply IT bubble crash Excessive logic foundry investment World financial crisis Memory oversupply Effects of European debt crisis, slowdown in emerging markets Weak demand for PC, mobile 5

6 The Market TEL Participates in Electronic System CY2017 World Market US$ 1,887B FPD Production Equipment (FPD) FY2018 TEL Sales (April 2017-March 2018) 75.0B, 7% Others 0.4B, 0% Semiconductor US$ 420B 1,130.7B WFE * CAPEX US$ 51B 1,055.2B, 93% Semiconductor Production Equipment (SPE) *The semiconductor production process can be divided into two sequential subprocesses: front-end (wafer fabrication) and back-end (assembly and test) production. WFE is used in the front-end production process. Front-end production equipment includes equipment for wafer level packaging. Source: Gartner, Forecast: Semiconductor Wafer Fab Equipment (Including Wafer- Level Packaging), Worldwide, 1Q18 Update 8 May 2018 Charts/graphics created by Tokyo Electron based on Gartner research. 6

7 TEL Main Products World Market Share (CY2017) Semiconductor Production Equipment 26% 36% 25% 87% Coater/Developer Dry Etch System Deposition System Cleaning System FPD Production Equipment (FY2018) 31% 38% 42% 19% 71% ALD CVD Oxidation/Diffusion FPD Coater/Developer Source (FPD): TEL survey FPD Etcher/Asher Source (SPE): Gartner, Market Share: Semiconductor Wafer Fab Equipment, Worldwide, 2017, 18 April 2018, Charts/graphics created by Tokyo Electron based on Gartner research. Coater/Developer: Photoresist processing (Track), Dry Etch System: Dry etch, Deposition System: Tube CVD + Atomic layer deposition tools + Oxidation/diffusion furnaces + Nontube LPCVD, ALD: Atomic layer deposition tools, CVD: Tube CVD + Nontube LPCVD, Oxidation/Diffusion: Oxidation/diffusion, Cleaning System: Wet stations + Spray processors + Other clean process 7

8 World Top 10 SPE Makers CY2017 Revenue Ranking Applied Materials (Billions of US$) Lam Research 8.13 Tokyo Electron ASML KLA-Tencor Screen Semiconductor SCREEN Semiconductor Solutions Solutions Teradyne Advantest Hitachi High-Tech Hitachi Kokusai Source; The Chip Insider Equipment & Emerging Markets (VLSI Research, June 2018) 8

9 TEL s Sustainability (economic value social value = corporate value creation) Going forward, continue to work to resolve social issues and contribute to the achievement of sustainable development goals (SDGs) through our business activities in accordance with the Ten Principles of the UN Global Compact and RBA * code of conduct Environment Social Governance Climate change, water, biodiversity, environmental management Human rights, employment and labor, health and safety, supply chain, local communities Corporate governance, compliance, risk management Continue to be a company trusted by all stakeholders * RBA: Responsible business alliance 9

10 Contributing to the Environment is a Key Strategy Lower energy consumption of TEL products + Manufactured devices realize low power consumption Raises TEL s value Technological proposals that reduce environmental impact create significant value 10

11 Medium-term Management Plan TEL Initiatives and Progress 11

12 Wafer Fab Equipment (WFE) Market Outlook Future growth drivers PC, internet, mobile + VR/AR/MR *, IoT, AI, RPA **, machine learning, big data, autonomous driving, blockchain * VR/AR/MR: Virtual reality/augmented reality/mixed reality ** RPA: Robotic process automation $37B $51B $56B-$58B $61B $62B $63B CY'16 CY'17 CY'18* CY'19* CY'20* CY'21* WFE market growth accelerating. Investment expanding to $60B+ * TEL estimate Equipment market is moving to the next phase amid expanding applications for semiconductors 12 WLP DRAM Non-volatile memory Logic foundry Logic & others (MPU, AP, others)

13 Rising Added-value in SPE WFE investment (100k WSPM *, greenfield/tel estimate) DRAM 3D NAND Logic ~$18B ~$7B ~$7B 2Z 1X 1Y 4X 6/7X 9X 14/16nm 10nm 7nm Expanded business opportunities for SPE manufacturers on arrival of new applications and rising level of technological difficulty * WSPM: Wafer starts per month 13

14 Response to Growth in China Business Expect China to comprise 30% of WFE (CY 20) Customers planning new plants (CY 18-CY 20) Capture high share and service business through high value added products and comprehensive support Build solid business base Hiring of engineers going well (3x vs CY 16) Enhance training centers (Employees) 1, Employees in China FY'15 FY'16 FY'17 FY'18 FY'19 Business development in China Opened Shanghai Office in 1998 Head Office 14 Branch Manufacture Service Site Chengdu Steadily build business base in growing market Xi'an Wuhan Beijing Nanjing Hefei Dalian Wuxi Kunshan Xiamen Shenzhen Shanghai

15 SPE Business Strategy: Etching System Achieving success in DRAM as planned. Continue to Focus on 3D NAND and Logic DRAM Capacitor processes (HARC) Interconnects Interconnects Capacitor 3D NAND HARC * processes Improve our position in 9X/12X through our clear lead in productivity and etch profile CY 18 CY 19 CY 20 6X/9X 9X 9X/12X Logic Maintain high interconnecting dielectric process market share Enhance our position in 7nm and finer advanced patterning Lower customer patterning costs through combining multiple steps into one Simplify processes Word line isolation (Slit) Channel (Memory hole) Multi-level contact Interconnects FinFET Market share CY 15 (Actual) CY 16 (Actual) CY 17 (Actual) CY 20 (Target) Etching System 21% 23% 26% >30% * HARC (High aspect ratio contact) process: a process for forming holes that requires advanced processing technology 15

16 SPE Business Strategy: Deposition System Aim to expand earnings based on new technologies for further miniaturization and next-generation semiconductors ALD system Achieve both high quality film formation and high productivity needed for miniaturization and for 3D structure with semi-batch system ALD system market CAGR >15% 210.0B CVD system Differentiate in memory through our clear lead in batch system productivity Achieve high quality metallization to enable further miniaturization 90.0B Semi-batch ALD system NT333 CY'14 CY'15 CY'16 CY'17 CY'18 CY'19 CY'20 TEL estimate Batch system TELINDY PLUS Metallization system Triase+ Market share CY 15 (Actual) CY 16 (Actual) CY 17 (Actual) CY 20 (Target) Deposition system 38% 37% 36% >40% Source: Gartner, Market Share: Semiconductor Wafer Fab Equipment, Worldwide, 2016, 30 March 2017, Charts/graphics created by Tokyo Electron based on Gartner research. Deposition System: Tube CVD + Atomic layer deposition tools + Oxidation/diffusion furnaces + Nontube LPCVD 16

17 SPE Business Strategy: Cleaning Systems Expand sales of CELLESTA single wafer cleaning system Expand applications based on backside and bevel cleaning * and drying technology that prevents pattern collapse during the post-etch cleaning processes Secure key 3D NAND processes through batch cleaning Provide high quality and productivity in the metal etching, polysilicon etching, and nitride film removal processes required for precise controllability Apply best known coater/developers methods to cleaning system business Share leading-edge technology and expertise by unifying R&D Single wafer cleaning system CELLESTA Batch cleaning system EXPEDIUS TM Market share CY 15 (Actual) CY 16 (Actual) CY 17 (Actual) CY 20 (Target) Cleaning system 18% 20% 25% >27% * Bevel cleaning: process for removing film from the outer part of the wafer 17

18 Field Solutions (FS) Field Solutions sales FY'15 FY'16 FY'17 FY'18 FY'19(E) WFE$62B 340.0B FY 21 (Target) Used equipment and modification Parts and services Business strategy Respond to new customer needs driven by IoT Provide upgrades and remanufactured equipment that handle new applications Contribute to improving customer productivity Provide added-value services using remote connections (Installed base of 66,000 units) Leverage our strengths as an equipment manufacturer to increase earnings in both the used equipment/modification and part/service segments 18

19 New Financial Model (FY2021) FY2018 (Actual) $51B 14% FY2019 (Estimates) FY2021 (Plan) (Billion yen) Net sales 1, , , ,700.0 SPE 1, , , ,600.0 FPD Gross profit Gross profit margin WFE market Market share SG&A expenses SG&A expenses to sales ratio Operating income Operating margin Net income attributable to owners of parent Net profit margin % % % % 19 $58B 15% % % % % $55B 18% % % % % $62B 18% % % % % Increase corporate value through innovative technologies and groundbreaking proactive solutions, raise efficiency and secure even higher profitability and resistance to market shifts

20 Gross Profit, SG&A Expenses (Sales 1,700.0B Model) Gross profit Gross profit margin FY2018 (Actual) % FY2019 (Estimates) % FY2021 (Plan) % (Billion yen) Growth rate (FY 18-FY 21) +57% +1.8pts Raise gross profit margin of core SPE, FPD products Timely introduction of new products to an expanding market Lower cost ratio through product quality improvements SG&A expenses SG&A expenses to sales ratio FY2018 (Actual) % FY2019 (Estimates) % FY2021 (Plan) % (Billion yen) Growth rate (FY 18-FY 21) +39% -1.3pts Proactively invest in growth areas while planning appropriate SG&A and R&D expenses 20

21 R&D Expenses, Capex Plan (Billion Yen) R&D expenses FY'12 FY'13 FY'14 FY'15 FY'16 FY'17 FY'18 FY'19 (E) FY'21 (Plan) (Billion Yen) Capex Depreciation FY 12 FY 13 FY 14 FY 15 FY 16 FY 17 FY 18 FY 19 (E) FY 21 (Plan) Conduct proactive investment towards further growth 21

22 Assets and Capital Efficiency (Sales 1,700.0B Model) Accounts receivable turnover Current: 52 days Achieved target Inventory turnover Current: 111 days Target: 95 days ROE Current: 29% Target: 30-35% (Yen) 2,500 2,000 1,500 1, % 461 EPS EPS and ROE ROE 19.1% % 1, % FY'16 FY'17 FY'18 FY'21 (Target) ROE = (Net income attributable to owners of parent/average total equity) x 100 Maintain focus on assets and capital efficiency 22

23 FY2019 Business Environment and Financial Estimates (FY2019: April 1, 2018-March 31, 2019) 23

24 FY2018 (April 2017-March 2018) Highlights 1, % Net Sales and Gross Profit Margin Net sales ( B) Gross profit margin 42.0% 39.6% 40.2% 40.3% ,130.7 FY'14 FY'15 FY'16 FY'17 FY' Operating Income and Operating Margin 5.3% 32.2 Operating income ( B) Operating margin 14.4% % 19.5% Net sales +41% YoY driven by increase in SPE* demand and expansion of market share in focus areas Operating income and net income attributable to owners of parent reached new record highs * SPE: Semiconductor production equipment % FY'14 FY'15 FY'16 FY'17 FY' % 25.0% 20.0% 15.0% 10.0% 5.0% 0.0% Net Income Attributable to Owners of Parent and ROE 29.0% -3.3% Net income attributable to owners of parent ( B) ROE % 13.0% % FY'14 FY'15 FY'16 FY'17 FY'18

25 Business Environment (Outlook as of July 2018) WFE * capex CY2018 investment driven by buoyant demand for memory, expect YoY growth of approx % FPD production equipment capex for TFT array process ** We expect CY2018 demand for investment in production equipment to continue at a high level comparable with CY2017 despite adjustment in investment in small/medium panels for mobile, and significantly expanded investment in G10.5 Accelerating growth in the equipment market on active investment in IoT and next generation technologies * WFE (Wafer fab equipment): The semiconductor production process is divided into front-end production, in which circuits are formed on wafers and inspected, and back-end production, in which wafers are cut into chips, assembled and inspected again. Wafer fab equipment refers to the production equipment used in front-end production and in wafer-level packaging production. ** TFT array process: The processes of manufacturing the substrates with the electric circuit functions that drive displays 25

26 CY 18 WFE Market Growth and Business Opportunities by Application DRAM: Market growth of 60-65% YoY forecast Capex: 70% of investment amount to be for new factories, and 1X/1Ynm generation to comprise 80% Driving force: Average server capacity up 35% Opportunities: Differentiation through combined patterning and our strength in interconnects Non-volatile memory: Unchanged to 5% increase YoY Capex: 9X generations to comprise 50% Driving force: Growth in SSD demand for data centers and PCs Opportunities: Differentiation through high value-added etch and clean WFE market by application $51B $56B-$58B WLP DRAM Logic/Foundry: 10% decrease to unchanged YoY Capex: 10nm and beyond generation to comprise 50% Driving force: Demand for higher performance, lower power consumption Opportunities: Business expansion in more complex patterning processes CY'17 CY'18* Non-volatile memory Logic foundry Logic & others * TEL estimate 26

27 FY2019 (April 2018-March 2019) Financial Estimates FY2018 (Actual) FY2019 (Estimates) H1 H2 Full year (Billion yen) Full year YoY change Net sales 1, , % SPE 1, , % FPD % Gross profit Gross profit margin % % % % pts SG&A expenses Operating income Operating margin % % % % pts Income before income taxes Net income attributable to owners of parent Net income per share (Yen) 1, , Expect sales growth to exceed market growth, generating record high profits for third consecutive year SPE: Semiconductor production equipment, FPD: Flat panel display production equipment 27

28 FY2019 SPE Division New Equipment Sales Forecast (Billion yen) DRAM Non-volatile memory % % 37% 43% 42% 11% 10% 9% 30% 22% 16% FY'18 H1 (Actual) Sales by application Logic foundry Logic & others FY'18 H2 (Actual) % 33% FY'19 H1 (Estimates) 37% 7% 23% FY'19 H2 (Estimates) Percentages on the graph show the composition ratio of new equipment sales. Field solutions sales are not included. (Billion yen) % 49% % 37% 12% 4% 17% 15% FY'19 Q1 (Actual) FY'19 Q2 (Estimates) Q1 sales were in-line with plan, and more than 60% of Q2 sales target has been shipped. High level of memory investment to continue 28

29 FY2019 Dividend Forecast (Yen) 900 Dividend per share 823 yen yen 352 yen 624 yen Year-end 433 yen 237 yen Interim 390 yen TEL shareholder return policy Dividend payout ratio: 50% Annual DPS of not less than 150 yen We will review our dividend policy if the company does not generate net income for two consecutive fiscal years We will flexibly consider share buybacks 0 FY'15 FY'16 FY'17 FY'18 FY'19 (E) Expect to raise DPS 32% YoY 29

30 Appendix 1: Effects of EUV Lithography Adoption 30

31 Effects of EUV Lithography Adoption EUV adoption will solve sophisticated technological hurdles our customers face (i.e. placement errors), bringing about quite positive effects on semiconductor and SPE industries Advance miniaturization Accelerate customers investment in next generation technologies by enhancing the yield Further miniaturization led by EUV will create more differentiation of our products and business opportunities Increase our coater/developer market share even further Expand demand for etch, deposition and cleaning equipment Differentiate our product through advancing self-aligned patterning technology Expand business with process integration, leveraging our robust product lineup 31

32 Edge Placement Error Improvement by EUV Step1: Line/Space Line (Litho-Etch) 3 with 193i 2 1 Fluctuation can be cumulated after each litho-etch step Edge placement error Too close Space Step2: Cut Self-aligned multiple patterning (SAMP) requires a lot of etch and dep equipment Cut EUV introduction 1 3 Too far Closer 3 masks 3 masks : (Litho + Etch) x 3 Yield degradation Single exposure by EUV Minimum fluctions 1 1 Schematic of logic device LELELE = (Litho-Etch) 3 requires 1 mask many lithography tools but does not require many etch and dep equipment Yield improvement 1 mask : (Litho + Etch) x

33 (Litho-etch) n Patterning for Logic MOL Contact/Cut Module PMD dep Hard mask1 dep Hard mask2 dep Lithography1 Contact HM2 etch1 short etch time Lithography2 Contact HM2 etch2 short etch time Lithography3 Contact HM2 etch3 short etch time Contact HM1 etch short etch time Contact PMD etch long etch time Post etch clean Barrier metal Ti/TiN dep Contact plug W dep Contact plug W CMP (Litho-etch) n patterning Thicker layer Higher etch selectivity Lithography1 Lithography2 Lithgraphy3 Contact HM2 etch1 Contact HM1 etch (Litho-etch) 3 patterning Contact HM2 etch2 Contact PMD etch Contact HM2 etch3 or Contact plug W CMP EUV lithography Contact HM2 etch 33

34 Self-aligned Multiple Patterning for Line/Space Had mask1 dep Hard mask2 dep Mandrel1 dep Hard mask3 dep Hard mask4 dep Mandrel2 dep Hard mask5 dep Lithography Hard mask5 etch Mandrel2 etch Sidewall1 dep Sidewall1 etch back Mandrel2 pull Hard mask4 etch Hard mask3 etch Mandrel1 etch Sidewall2 dep Sidewall2 etch back Hard mask5 Mandrel2 Hard mask4 Hard mask3 Mandrel1 Hard mask2 Hard mask1 p 1 SADP 2 p Mandrel2 etch Sidewall1 dep Sidewall etch back1 1 4 p SAQP Lithography Deposition Etch Hard mask3 etch Mandrel1 etch Sidewall2 dep Sidewall etch back2 SADP: Self-aligned double patterning SAQP: Self-aligned quadruple patterning 34

35 Appendix 2: Diversity of Semiconductor Technology 35

36 CMOS scaling Summary Diversity of Semiconductor Technology Functional diversification Wire-bonding Homogeneous Heterogeneous DRAM 3DI Flip-Chip KrF 2.5D NAND InFO Cu/ULK ArF Strained Si 3D NAND Si photonics High-k metal Arf-immersion gate ReRAM FinFET STT-MRAM More than Moore Advanced packaging (3DI/WLP) Now DP/MP Cu/ELK Nanowire FET 2017~ More Moore EUV NIL, EBDW DSA, Patterning CFET Logic with new material new structure Neuromorphic Emerging memory 36

37 Logic FEOL/MOL Technology Roadmap Node nm 10 nm 7 nm 5 nm < 3.5 nm FinFET Nanowire/Nanosheet FET Transistor Contact Diamond shaped Epi Wrap around contact W Co and other materials Scaling and performance enhancement concurrently requires structure, design and material changes, which makes integration challenging 37

38 New Opportunities through Integration Sp Dp Sn Sn Dn Source: imec Dn CFET (new structure) Sp Dp Cleaning CELLESTA -i EXPEDIUS -i Tactras Vigus Etch Certas Lithography EXIM Buried power rail (new material) Source: Imec presentation at ISPD 2016 CLEAN TRACK LITHIUS Pro Z TELINDY PLUS NT333 Close integration between process equipment is a must in order to propose solutions to realize further scaling through new materials and structural solutions Triase + Deposition 38

39 Appendix 3: Deposition System 39

40 Deposition System Market Outlook ($B) TEL s deposition SAM in WFE market* 37 8% % 9% 9% % 10% CY CY CY CY CY CY % Composition ratio 10% Deposition SAM 0% 0 CY'15 CY'16 CY'17 CY'18 CY'19 CY'20 CY'21 Miniaturization and evolving device structure are driving growth of the high value-added deposition market * TEL estimate 40 ($B) NT333 TELINDY PLUS Deposition SAM by application* Triase+ NAND DRAM Logic/Foundry

41 Deposition Systems: Striving for Further Growth New platform Next generation thermal processing system Introduce SLB* product with high productivity and efficiency Adoption of new, high precision controller will contribute to enhance tool matching and increasing uptime New single wafer platform Smaller footprint, higher productivity Enables diverse cluster processes * SLB: Super large batch Tool Matching Diagnostic Optimum Control New platform Expand market share in areas where we already participate in by increasing productivity and responding to diverse process needs 41

42 Resistivity[u ohm cm] Deposition Systems: Initiatives Towards New Materials andapplications Evaluation of new materials for metal deposition systems Achieve low resistance with thin wire Excellent gap fill capabilities Resistivity ratio at thin film TiN/Convetional W TiN/ FFW TiN/New Material Develop anisotropic deposition and selective deposition Achieving gap fill and bottom up processes by using TEL s unique deposition technique Thickness[nm] TEL/TEL SiO2 AR: 8:1 CD: 43nm Depth 331nm Film formation in processing Ge(SiGe) AR: ~ 5:1 CD: 40nm Depth 200nm After formation TEL/TEL Gap fill Expanding SAM through the development of new applications for miniaturization Bottom up 42

43 Appendix 4: Etch System 43

44 Etch System Market Outlook ($B) TEL s etch SAM in WFE market * 20% * TEL estimate % 22% 22% 23% 23% CY CY CY CY CY CY % Composition ratio 20% 10% Etch SAM 0% Tactras Vigus Trends in etch technology Miniaturization of DRAM Increases in patterning and copper interconnect processes Multi-layering of 3D NAND Higher ratio of HARC * process Certas LEAGA Miniaturization and greater structural complexity of logic Increases in patterning processes, isotropic etch * HARC (High aspect ratio contact) process: a process for forming deep holes that requires advanced processing technology Growth in etch system market due to increase in patterning processes and greater structural complexity 44

45 Logic: Focus Processes and Key Points Logic Transistor periphery 3D structures FinFET Nanowire Nanosheet Interconnects Miniature contact process SAC (Self-aligned contact) Contact Fin STI Gate Contact/interconnect process; more complex patterning Leverage technological advantage in increasingly complex etch processes, respond to new needs Key requirement 1. High SiN selectivity (less SiN loss) 2. Narrow slit etch capability 45

46 Process Performance Leading-edge Logic Initiative 1: Silicon Etch Superior aspects of RLSA plasma etcher in silicon etch Typical ICP etcher Faceting RLSA plasma etcher プラズマエッチング装置 Tactras RLSA Rectangle Fin Gate Transistor periphery 3D structures RLSA plasma BB Optimized Microwave Conventional Microwave Adoption of new technology Depth variation Non-vertical form Equal depth Vertical shape Stability and Productivity In silicon etch, differentiate through processing performance and productivity 46

47 Leading-edge Logic Initiative 2: Highly Selective Etch Conventional etch Quasi-ALE* Concept of Quasi-ALE Self-aligned contact Si-ARC etch SiO2 SiN Si -ARC SiN SiO 2 Initial Activation Ar FC film Adsorption Desorption *ALE (Atomic layer etch): Highly selective etch technology at the atomic level Aim to win share through rising demand for highly selective etch 47

48 Leading-edge Logic Initiative 3: Gas Chemical Etch Broadening of applications for gas chemical etch N+1 N+2 Min. Fin pitch Si SiGe Min. Fin pitch Si SiGe Min. Fin pitch N+3 Nanowire Nanosheet Wet etch Post dummy Si removal Post gate oxide removal Post SiGe removal Footing Isotropic Ox etch Isotropic SiGe etch Gas chemical etch No footing Si/SiGe layer stack Si nanowire Differentiate through isotropic selective etch technology needed for 3D transistors 48

49 Appendix 5: FPD Production Equipment 49

50 FPD Medium-term Plan ($B) 25 FPD equipment market (Billion yen) 120 Sales and operating margin 25% Strong TFT equipment market CY'15 CY'16 CY'17 CY'18 CY'19 CY'20 Coater/developer Dry etch TFT others AMOLED CF, Cell, Others Data based on IHS Markit, Technology Group, Display Supply Demand Equipment Tracker Q Results are not an endorsement of Tokyo Electron Limited. Any reliance on these results is at the third party s own risk. Visit technology.ihs.com for more details FY'15 FY'16 FY'17 FY'18 FY'19 FY'21 Sales Operating margin Progressing according to plan towards achieving 20% operating margin target in medium-term plan 20% 15% 10% 5% 0% -5% -10%

51 Display Trends Increasing screen size OLED Color filter LCD TFT Backlight Emissive layer TFT LCD OLED Increasing resolution Design flexibility TV FHD 4K 8K Mobile, VR 300 ppi 1000 ppi Flexible, edge bent, free format Technological change in displays increasing business opportunities 51

52 3,370 mm Business Opportunity: G10.5 Equipment Market Greater-than-expected growth in investment Maintain high market share through technological differentiation (large area plasma control, air floating coater) G10.5 TFT array equipment market ($B) 20 Eight 65 inch TV panel substrate possible CY'16 CY'17 CY'18 CY'19 CY'20 Data based on IHS Markit, Technology Group, Display Supply Demand Equipment Tracker Q Results are not an endorsement of Tokyo Electron Limited. Any reliance on these results is at the third party s own risk. Visit technology.ihs.com for more details. 2,940 mm Increased sales far beyond market growth by meeting customers technological needs 52

53 Business Opportunity: Metal Oxide/LTPS TFT array a-si Metal Oxide LTPS Representation of structure Further new needs Application Number of masks Dry etch processes LCD TV Monitor OLED TV Tablet Smartphone (LCD/OLED) a-si, SiNx 3 SiO, SiNx 53 ~11 SiO, metal Number of etch processes increased as more advanced technology sought Flexible displays +2 processes OLED process (G6 Half Size) +3-4 processes

54 Business Opportunity: Growth of OLED TV Market Material utilization significantly more efficient than current evaporation method Companies improving functionality of ink (K units) 8,000 OLED TV 6,000 4,000 2,000 0 CY'16 CY'17 CY'18 CY'19 CY'20 CY'21 Data based on IHS Markit, Technology Group, Display Long-Term Demand Forecast Tracker Q Results are not an endorsement of Tokyo Electron Limited. Any reliance on these results is at the third party s own risk. Visit technology.ihs.com for more details. Inkjet printing system for manufacturing OLED planes Elius TM 2500 Differentiate with inkjet printing system towards growth in the OLED TV market 54

55 Appendix 6: Financial Data 55

56 Financial Summary FY2017 FY2018 YoY Change (Billion yen) Net sales , % SPE , % FPD % Gross profit Gross profit margin % % +47.4% +1.7pts SG&A expenses % Operating income Operating margin % % +80.6% +5.4pts Income before income taxes % Net income attributable to owners of parent % EPS (Yen) , % R&D expenses % Capital expenditures % Depreciation and amortization % 1. In principle, export sales of Tokyo Electron s mainstay semiconductor and FPD production equipment are denominated in yen. While some settlements are denominated in dollars, exchange risk is hedged as forward exchange contracts are made individually at the time of booking. 2. Profit ratios are calculated using full amounts, before rounding. 56

57 Segment Information SPE (Semiconductor Production Equipment) (Billion Yen) 1, Sales Segment income Segment profit margin 1, % 50% FPD (Flat Panel Display Production Equipment) (Billion Yen) 100 Sales Segment income Segment profit margin % 50% 100% Composition of Net Sales 6 7 FPD % 40% % 30% % 50% SPE % % 10% % 17.7% % 10% 0 FY'17 FY'18 0% 0 FY' Significantly raised profitability in both SPE and FPD 1. Segment income is based on income before income taxes. 2. R&D expenses such as fundamental research and element research are not included in above reportable segments. 3. Composition of net sales figures is based on the sales to customers. 57 FY'18 0% 0% FY'17 FY'18

58 SPE Division: New Equipment Sales by Application (Billion Yen) 900 DRAM Non-volatile memory Logic foundry Logic & others (MPU, AP, Others) % FY2018 results % 40% 30% 28% 20% 11% 31% 25% 25% 25% 24% FY'16 FY'17 FY'18 Sales of DRAM and non-volatile memory more than doubled YoY driven by increase in demand for servers and proactive investment in next-generation technology In foundry/logic, investment in cutting-edge generations and 28nm and above continued 58

59 SPE Division: New Equipment Sales by Product (Billion Yen) 900 Coater/Developer Etch system Deposition system Cleaning system Wafer prober Others % FY2018 results % 40% Sales expanded in focus areas (etch, deposition, cleaning) driven by investment % 29% 34% 23% in non-volatile memory and miniaturization enabled by multiple patterning 0 22% 26% 10% 11% 10% 4% 6% 6% 3% 2% 1% FY'16 FY'17 FY'18 59

60 Field Solutions Sales (Billion Yen) Used equipment and modification Parts and services FY2018 results Sales growth of +21% YoY, full-year sales reached 251.0B Parts sales increased strongly, especially in South Korea, due to rise in customers equipment utilization 0 FY'16 FY'17 FY'18 * FY2016 and FY2017 sales figures have been rounded. 60

61 Financial Summary (Quarterly) FY2018 FY2019 Q1 Q2 Q3 Q4 Q1 vs. Q4 FY2018 Net sales % SPE % FPD % Gross profit Gross profit margin % % % % % -20.2% -1.7pts SG&A expenses % Operating income Operating margin % % SPE: Semiconductor production equipment, FPD: Flat panel display production equipment % % % (Billion yen) -27.4% -3.5pts Income before income taxes % Net income attributable to owners of parent % R&D expenses % Capital expenditures % Depreciation and amortization % 1. In principle, export sales of Tokyo Electron s mainstay semiconductor and FPD production equipment are denominated in yen. While some settlements are denominated in dollars, exchange risk is hedged as forward exchange contracts are made individually at the time of booking. 2. Profit ratios are calculated using full amounts, before rounding.

62 Segment Information (Quarterly) SPE (Semiconductor production equipment) (Billion Yen) 350 Sales Segment income Segment profit margin % 50% 40% 28 FPD (Flat panel display production equipment) (Billion Yen) 35 Sales Segment income Segment profit margin % 50% 40% 100% Composition of Net Sales FPD % 29.6% 28.6% 30.9% 66.1 Q1 FY' % 78.3 Q2 Q3 Q4 Q1 FY'19 30% 20% 10% 0% % 0.4 Q1 FY' % % % % 2.4 Q2 Q3 Q4 Q1 FY'19 30% 20% 10% 0% 50% 0% Q1 FY'18 Q2 Q3 Q4 Q1 FY'19 SPE 1. Segment income is based on income before income taxes. 2. R&D expenses such as fundamental research and element research, etc. and other general and administrative expenses are not included in the above reportable segments. 3. Composition of net sales figures is based on the sales to customers. 62

63 SPE Division: Sales by Region (Quarterly) (Billion Yen) Q1 FY 17 Q2 Q3 Q4 Q1 FY 18 Q2 Q3 Q4 Q1 FY 19 Japan North America Europe South Korea Taiwan China S. E. Asia, Others

64 SPE Division: New Equipment Sales by Application (Quarterly) (Billion Yen) DRAM Non-volatile memory Logic foundry Logic & others (MPU, AP, Others) % 20% 25% % 31% 23% 30% 27% 32% 25% 21% 19% Q1 FY' % 25% 31% 38% 23% 17% 27% 22% 23% 25% % 16% 18% 17% 31% 22% 32% 23% 19% 24% 32% 34% % 12% 31% 18% 27% 31% 32% 27% 32% 25% 19% 12% % 16% 17% 24% 40% 32% 34% 16% 26% 25% 25% 26% 24% 27% Q2 Q3 Q4 Q1 FY' % 16% 25% 27% 24% 35% 27% 34% 8% 32% 24% 26% 22% % 27% 21% 40% 41% 27% 16% 17% 28% 25% 40% 35% 43% 16% 8% % 49% 12% 10% 27% 24% 26% 32% 4% 27% 19% 17% Q2 Q3 Q4 Q1 FY'19 Percentages on the graph show the composition ratio of new equipment sales. Field solutions sales are not included. 64

65 Field Solutions Sales (Quarterly) (Billion Yen) Q1 FY 17 Q2 Q3 Q4 Q1 FY 18 Q2 Q3 Q4 Q1 FY 19 SPE Sales FPD Sales

66 Balance Sheet (Quarterly) Assets (Billion Yen) Liabilities & Net Assets (Billion Yen) 1, , , , , , Cash & cash equivalents* Trade notes, accounts receivables Inventories Other current assets Tangible assets Intangible assets Investment & other assets , , Liabilities Net assets Q1 FY'18 Q2 Q3 Q4 Q1 FY'19 Q1 FY'18 Q2 Q3 Q4 Q1 FY'19 * Cash and cash equivalents: Cash and deposits + Short-term investments, etc. (Securities in B/S). From the beginning of the FY2019 Q1 accounting period the Accounting Standards Board of Japan s Partial Amendments to Accounting Standard for Tax Effect Accounting, etc. (ASBJ Statement No. 28, revision on February 16, 2018) has been applied. FY2018 results have been restated in the graphs in a ccordance with the revised accounting standards. 66

67 Consolidated 10-year Financial Summary (Million Yen) FY2009 FY2010 FY2011 FY2012 FY2013 FY2014 FY2015 FY2016 FY2017 FY2018 Net Sales 508, , , , , , , , ,719 1,130,728 Semiconductor production equipment 325, , , , , , , , ,893 1,055,234 FPD production equipment 88,107 71,361 66,721 69,888 20,160 28,317 32,709 44,687 49,387 75,068 PV production equipment 3,805 3,617 Computer network 94,207 84,473 90,216 84,867 84, ,726 Electronic components Other , Gross profit 137, , , , , , , , , ,032 Gross profit margin 27.0% 25.9% 35.1% 33.4% 31.9% 33.0% 39.6% 40.2% 40.3% 42.0% SG&A expenses 122, , , , , , , , , ,860 Operating income 14,710-2,180 97,870 60,443 12,548 32,204 88, , , ,172 Operating margin 2.9% -0.5% 14.6% 9.5% 2.5% 5.3% 14.4% 17.6% 19.5% 24.9% Ordinary income 20,555 2, ,919 64,046 16,696 35,487 92, , , ,737 Income before income taxes 9,636-7,767 99,579 60,602 17,766-11,756 86, , , ,242 Net income attributable to owners of parent 7,543-9,033 71,924 36,725 6,076-19,408 71,888 77, , ,371 Depreciation and amortization 23,068 20,001 17,707 24,197 26,630 24,888 20,878 19,257 17,872 20,619 Capital expenditures 18,107 14,918 39,140 39,541 21,773 12,799 13,183 13,341 20,697 45,603 R&D expenses 60,987 54,074 70,568 81,506 73,248 78,663 71,349 76,286 83,800 97,103 Interest-bearing debt 3,806 5,105 7,996 4,402 3,756 13,531 Equity 518, , , , , , , , , ,146 Total assets 668, , , , , , , , ,447 1,208,705 Debt-to-equity ratio 0.7% 1.0% 1.4% 0.8% 0.6% 2.3% Equity ratio 77.5% 73.5% 70.8% 74.9% 76.5% 69.8% 73.0% 70.9% 67.2% 63.5% ROE 1.4% -1.8% 13.3% 6.3% 1.0% -3.3% 11.8% 13.0% 19.1% 29.0% Cash flow from operating activities Cash flow from investing activities Cash flow from financing activities Net income per share Cash dividends per share 81,030 48,284 83,238 29,712 84,266 44,449 71,806 69, , , ,621 9,613-35,881-8, ,769-19, , ,013-28,893-11,833-46, ,236-27,334-10, , ,600-39,380-82, , Number of employees 10,391 10,068 10,343 10,684 12,201 12,304 10,844 10,629 11,241 11,946 67

68 Disclaimer regarding forward-looking statement Forecast of TEL s performance and future prospects and other sort of information published are made based on information available at the time of publication. Actual performance and results may differ significantly from the forecast described here due to changes in various external and internal factors, including the economic situation, semiconductor/fpd market conditions, intensification of sales competition, safety and product quality management, and intellectual property-related risks. Processing of numbers For the amount listed, because fractions are rounded down, there may be the cases where the total for certain account titles does not correspond to the sum of the respective figures for account titles. Percentages are calculated using full amounts, before rounding. Exchange risk In principle, export sales of Tokyo Electron s mainstay semiconductor and FPD panel production equipment are denominated in yen. While some settlements are denominated in dollars, exchange risk is hedged as forward exchange contracts are made individually at the time of booking. Accordingly, the effect of exchange rates on profits is negligible. Disclaimer regarding IHS Markit data (Page 50, 52, 54) The IHS Markit reports and information referenced herein (the "IHS Markit Materials") are the copyrighted property of IHS Markit Ltd. ( IHS Markit ) and represent data, research, opinions or viewpoints published by IHS Markit, and are not representations of fact. The IHS Markit Materials speak as of the original publication date thereof (and not as of the date of this offering document). The information and opinions expressed in the IHS Markit Materials are subject to change without notice and IHS Markit has no duty or responsibility to update the IHS Markit Materials. Moreover, while the IHS Markit Materials reproduced herein are from sources considered reliable, the accuracy and completeness thereof are not warranted, nor are the opinions and analyses which are based upon it. To the extent permitted by law, IHS Markit shall not be liable for any errors or omissions or any loss, damage or expense incurred by reliance on the IHS Markit Materials or any statement contained herein, or resulting from any omission. No portion of the IHS Markit Materials may be reproduced, reused, or otherwise distributed in any form without the prior written consent of IHS Markit. Content reproduced or redistributed with IHS Markit s permission must display IHS Markit s legal notices and attributions of authorship. IHS Markit and the IHS Markit globe design are trademarks of IHS Markit. Other trademarks appearing in the IHS Markit Materials are the property of IHS Markit or their respective owners. Disclaimer regarding Gartner data (Page 6, 7, 16) All statements in this presentation attributable to Gartner represent Tokyo Electron s interpretation of data, research opinion or viewpoints published as part of a syndicated subscription service by Gartner, Inc., and have not been reviewed by Gartner. Each Gartner publication speaks as of its original publication date (and not as of the date of this presentation). The opinions expressed in Gartner publications are not representations of fact, and are subject to change without notice. FPD: Flat panel display 68