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1 9 rue Alfred Kastler - BP Nantes Cedex 3 - France Phone : +33 (0) info@systemplus.fr - website : February Version 1 Written by: Romain FRAUX DISCLAIMER : System Plus Consulting provides cost studies based on its knowledge of the manufacturing and selling prices of electronic components and systems. The given values are realistic estimates which do not bind System Plus Consulting nor the manufacturers quoted in the report. System Plus Consulting is in no case responsible for the consequences related to the use which is made of the contents of this report. The quoted trademarks are property of their owners by SYSTEM PLUS CONSULTING, all rights reserved. TI MicroSiP Module Using AT&S ECP Process 1
2 Table of Contents Glossary 1. Overview / Introduction Executive Summary Reverse Costing Methodology 2. Companies Profile Texas Instruments Profil AT&S Profil 3. Physical Analysis Synthesis of the Physical Analysis Physical Analysis Methodology Module Views & Dimensions Module Marking Module Passives Components Assembly Module X-Ray Module Delamination Embedded IC Die IC Die Views & Dimensions IC Die Markings IC Die Delayering IC Die Process Module Cross-sections Overview Via Cross-Section Laminate Cross-Section IC Die Cross-Section IC Adhesive Cross-Section IC Metal Layers & RDL Cross-Section Copper Interconnection Cross-Section Solder Bump Cross-Section Physical Data Summary 4. Manufacturing Process Flow Global Overview IC Process Flow Description of the IC Wafer Fabrication Unit ECP Packaging Process Flow Description of the Packaging Panel Fabrication Unit 5. Cost Analysis Synthesis of the Cost Analysis Main Steps of Economic Analysis Yields Explanation Yields Hypotheses IC Front-End : Hypotheses IC Front-End Cost IC Back-End 0: Probe Test, Thinning & Dicing Cost IC Back-End 0: RDL Cost IC Die Cost Back-End: ECP Packaging Hypotheses Back-End: ECP Panel Cost Back-End: ECP Panel Cost per Process Steps Back-End: ECP Panel Equipment Cost per Family Back-End: ECP Panel Material Cost per Family Back-End: Passives Components Assembly Cost Back-End: Packaging Price Back-End: Final Test MicroSiP Module Cost 6. Estimated Price Analysis Definition of Prices Manufacturer Financial Ratios MicroSiP Module estimated Manufacturer Price MicroSiP Module Estimated Selling Price 2012 by SYSTEM PLUS CONSULTING, all rights reserved. TI MicroSiP Module Using AT&S ECP Process 2
3 Physical Analysis Methodology Package is analyzed and measured. X-ray pictures are used to identify the package construction and the redistribution. Package is opened in order to identify the elements constituting it. Cross-section are realized to get overall package data : dimensions, main characteristics. An analysis of the technologies and of the materials used is performed. Inductor Chip capacitors Embedded active component Capacitor Inductor Capacitor Embedded active component Solder ball Two redistribution layers Two redistribution layers Solder ball 2012 by SYSTEM PLUS CONSULTING, all rights reserved. TI MicroSiP Module Using AT&S ECP Process 3
4 2.30mm 1.00mm Module Views & Dimensions 2.90mm Package Top view Package side view Package: Dimensions: MicroSiP 8-bump BGA 2.90x2.30x1.00mm Package side view Ball pitch: 0.80/1.00mm Marking: RA 0AU DAC 2012 by SYSTEM PLUS CONSULTING, all rights reserved. TI MicroSiP Module Using AT&S ECP Process 4
5 Module Passives Components Assembly Package passives identification: Input capacitor (C I ): Dimension: 1.00 x 0.50mm Case: 0402 Value: 2.2µF Inductor (L): Dimension: 2.00 x 1.25mm Case: 0805 Value: 1µH Output capacitor (C O ): Dimension: 1.00 x 0.50mm Case: 0402 Value: 4.7µF 2012 by SYSTEM PLUS CONSULTING, all rights reserved. TI MicroSiP Module Using AT&S ECP Process 5
6 IC Die View & Dimensions 2012 by SYSTEM PLUS CONSULTING, all rights reserved. TI MicroSiP Module Using AT&S ECP Process 6
7 Cross Section 2 Cross-section plane 2 Cross-section 2 Optical overview 2012 by SYSTEM PLUS CONSULTING, all rights reserved. TI MicroSiP Module Using AT&S ECP Process 7
8 Cross Section 2012 by SYSTEM PLUS CONSULTING, all rights reserved. TI MicroSiP Module Using AT&S ECP Process 8
9 Cross Section 2012 by SYSTEM PLUS CONSULTING, all rights reserved. TI MicroSiP Module Using AT&S ECP Process 9
10 Main steps of economic analysis IC Front-End Cost IC Probe & Thinning Cost IC RDL & Dicing Cost ECP Packaging Cost Passives Assembly Cost Unknown EMS Final Test Cost MicroSiP Module We perform the economic analysis of the IC with the IC Price+ software. We perform the economic analysis of the packaging with the PCB CoSim+ software by SYSTEM PLUS CONSULTING, all rights reserved. TI MicroSiP Module Using AT&S ECP Process 10
11 IC Wafer Cost (Front-End + Back-End 0) 2012 by SYSTEM PLUS CONSULTING, all rights reserved. TI MicroSiP Module Using AT&S ECP Process 11
12 ECP Panel Cost (18x24" & 21x24") 2012 by SYSTEM PLUS CONSULTING, all rights reserved. TI MicroSiP Module Using AT&S ECP Process 12
13 ECP Panel Cost per process steps (2/3) 2012 by SYSTEM PLUS CONSULTING, all rights reserved. TI MicroSiP Module Using AT&S ECP Process 13
14 ECP Panel : Equipment Cost per Family 2012 by SYSTEM PLUS CONSULTING, all rights reserved. TI MicroSiP Module Using AT&S ECP Process 14
15 MicroSiP Module Cost 2012 by SYSTEM PLUS CONSULTING, all rights reserved. TI MicroSiP Module Using AT&S ECP Process 15
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