Nangate 45nm Open Cell Library. Jesper Knudsen VP Marketing

Transcription

1 Nangate 45nm Open Cell Library Jesper Knudsen VP Marketing 12 th Si2/OpenAccess+ Conference, April 16 th, 2008

2 Presentation Outline Why did Nangate release an Open Cell Library? Why is Library control Important? What is the Nangate Library medicine? 12th Si2/OpenAccess+ Conference - April 16th,

3 Nangate Background 70+ veteran IC designers, Library Developers and seasoned EDA professionals Founded 2004 Worldwide Offices: Prior achievements: 14 successful multi-million gate IC products developed in 4 years 13 products right first time (1 1½ spins) Only 1 product with full layer respin 180nm and 130nm TSMC Sunnyvale, USA Copenhagen, Denmark Moscow, Russia Porto Alegre, Brazil Strong financing by international VCs Mission To provide automated tools that provide a significant extra level of optimization for cell-based ICs Non-disruptive add-on that tightly integrates into existing flow Eliminate the shortcomings of one-size-fits-all standard cell libraries 12th Si2/OpenAccess+ Conference - April 16th,

4 Persistent need from academia and research An Open Source standard cell library has never been available before Foundries are not exactly happy providing nano-scale technologies to the open world Research and EDA flow development always had to be done using NDAs EDA companies have had to conduct demo s and training under NDA with foundries.. But so far no one had been able to solve this with a comprehensive solution 12th Si2/OpenAccess+ Conference - April 16th,

5 .. until all the necessary element were available: North Carolina State University (NCSU) released 45nm PDK with support from Si2 Arizona State University (ASU) developed the Predictive Technology Model (PTM) using BSIM 4 for 45nm bulk CMOS Nangate has an automated Library creation flow Fenix-DA has a library validation platform 12th Si2/OpenAccess+ Conference - April 16th,

6 Next Version of Open Cell Library just Released Compliant to new FreePDK45 release 1.2 Additional cells added based on customer input More characterization corners (slow, typ and fast) Nangate Open Cell Library Contents: Liberty (.lib) formatted timing and power libraries with CCS, ECSM and NLDM/NLPM data Geometric library in Library Exchange Format (LEF) Simulation libraries in Verilog and Spice (pre and post parasitic extracted netlists) Cell layouts in GDSII as well as Schematics Library databook in HTML/XML format Flip-Flop with Scan, Reset and Set (SDFFRS_X1) 3-Input AND (AND3_X2) Available for free download and use under Open Source License! 12th Si2/OpenAccess+ Conference - April 16th,

7 Controlling cell layout provides added margin for DFM and enhanced reliability Cell can be hardened through layout techniques Guard rings ELT transistor Small layout modifications on a cell have significant impact on YSI Need for diagnosis: yield analysis tool Need for corrective actions: cell generation tool Enabling design-specific trade-offs rather than using one-size-fits-all strategy! 12th Si2/OpenAccess+ Conference - April 16th,

8 Characterization is no longer a once in a process lifetime effort New models for Timing, Power and Noise and concerns about Variability and Reliability Foundries provide updated transistor models now also with variability data Running at non-nominal PVT corners where standard cells can become significantly nonlinear in their behavior NBTI Negative Bias Temperature Instability After 10 years the difference can be 20% in performance Large increase for smaller probabilities Nominal delay Worst case Ability to re-characterize and validate results is essential for modern design flows 12th Si2/OpenAccess+ Conference - April 16th,

9 Cell library determines design performance Predefined High Speed cell library Cost (Power, Area) Predefined High Density cell library Predefined Standard cell library The optimally tailored cell library - Meets target performance at the lowest possible cost Desired operating frequency Potential Cost Savings Performance Tailoring the standard cell library by adding new functions and additional drive strength variants provides significant timing, power and area benefits 12th Si2/OpenAccess+ Conference - April 16th,

10 Nangate Library Creator TM Provides DFM Layout flexibility Have added double contacts where possible Result of noninteraction user constraints DFM Optimized Yield Sensitivity Index has decreased from down to Giving a 22% better YSI score without penalties! 12th Si2/OpenAccess+ Conference - April 16th,

11 Nangate Library Characterizer TM Ensuring always updated models Highly accurate characterization results through NLDM/ CCS /ECSM modeling for timing, power and noise Foundry Process Liberty Spice Models Model (.lib) Netlists (.spi) Nangate Library Characterizer Parallel distributed processing with Sun Grid Engine and LSF providing overnight characterization runs Functionality Extraction Spice Deck Generation Spice Simulations Accurate internal SPICE engine or interface to leading 3rd party circuit simulation engines Library Validation Model Generation Quality Management Broad Coverage of Different Cell Types Reports: Library Databook HTML PDF Model Views: Liberty (.lib) CCS ECSM Verilog Providing 1-2% accuracy between Spice and your Static Timing Analysis (STA) On your actual design! 12th Si2/OpenAccess+ Conference - April 16th,

12 Nangate Design Optimizer TM Combining synthesis with cell creation to do automated full-custom optimization! i6 i5 i4 i3 i2 i1 i0 n2 n1 52% smaller 47% faster 62% power red. n0 Design Optimization through library augmentation (functions, drive strengths) and library synthesis provides new optimization options Power - typically 20-30% less power Timing - typically 10-30% faster circuits Area - typically 20-30% area savings 12th Si2/OpenAccess+ Conference - April 16th,

13 Nangate Product Overview Design Optimizer TM The re-synthesis solution for next generation physical design flows. Identifies and specifies the optimal combination of standard cells and performs design re-synthesis resulting in area, speed or power benefits. Library Creator TM The industry s most versatile, integrated and easy-to-use solution for digital cell library creation. Custom-tailor digital cell libraries and enhance performance beyond the capabilities of commercially available cell libraries. Library Characterizer TM All-inclusive package for fast characterization of digital cell libraries. Includes a powerful Spice-based characterization engine with fully automated stimulus generation, a library model checker and a databook generator. Liberty Analyzer TM A powerful utility for extracting, analyzing and comparing timing and power information from Liberty format library model files. Design Audit TM Analyzes compares and validates Static Timing Analysis results against SPICE simulations of any design's critical paths. Greatly improves characterization accuracy and time spent in timing closure. 12th Si2/OpenAccess+ Conference - April 16th,