The 3D Silicon Leader

Transcription

1 The 3D Silicon Leader TSV technology embedding high density capacitors for advanced 3D packaging solutions IMAPS Device Packaging Conference 2014 Catherine Bunel

2 Outline Introduction IPDiA s unique Capacitor technology TSV + passives Examples of 3D integration Performances Conclusion 2

3 Who are we?

4 Who are we? Independent Company located in Caen, Normandy, France Dedicated to manufacturing of leading edge Integrated Passive Devices Operating own Silicon wafer fab Strong R&D team and collaborations with leading research institutes 4

5 IPDiA: Turnkey Supplier One-Stop-Shop for the Integrated Passive Devices Pre-studies & Design Center Foundry Services Mid-end Services Assembly Services From your schematics, we design and manufacture High Quality Products 5

6 Industrial partner IPDIA manufactures Semiconductor based products and is organized to support High Tech companies ISO-9001 ISO ISO-TS16949 (Automotive) ISO (Medical) OHSAS RoHS compliant AEO (Authorised Economic Operator) 6

7 IPDiA s unique Capacitor technology

8 IPDiA s unique Capacitor Technology 8

9 Capacitor Integration Density Qualified for volume manufacturing 14/03/2014 9

10 3D structure Surface Gain Surface gain versus pillar depth and geometry Pillars depth (µm) 10

11 3D structure 2 parallelized capacitors in a MIMIM architecture in order to increase the capacitance value Simplified MIMIM architecture from the PICS3 Related schematic Middle electrode (in-situ doped Polysilicon1) Top electrode (in-situ doped Polysilicon2) Passivation layer (SiO 2 ) Bottom electrode (N++ area) Metal layers Polysilicon 1 (PS1) Polysilicon2 Dielectric2 Polysilicon1 Dielectric1 N++ Area Low Ohmic substrate P+, 20 Silicon mohm.cm substrate PS1 PS1 Dielectric 2 Dielectric 1 PS2 N++ Metal layers

12 3D structure Capacitor stack is based on highly engineered high-k materials X Z Y Z Y Z Y Z Y Z Y X Y-Z X X 23/04/10 Florent LALLEMAND 12

13 Performances Breakdown voltage > 10V Low leakage current <1nA/mm² Excellent temperature and voltage linearity < 100ppm/ K & < 100ppm/V Silicon capacitors and arrays are insensitive to operating temperatures between 65 C to 250 C Excellent matching < 2% High reliability > 10 operating 100 C FIT (Failure in Time) below 1 at 225 C Mechanical shock tests pass easily as well as thermal cycling tests (up to 3000 cycles in TMCL) Low ESR 14/03/2014 Florent LALLEMAND 13

14 Where are we? Low profile High reliability Medical implantables Non Magnetic High Temperature applications IC decoupling, Optical Networking, GaN based Power Amplifiers and DC/DC Converters Where Performiniaturization is required!!! 14

15 3D Capacitor Density Roadmap PICS4 500nF/mm² BV 11v PICS5 1µF/mm² BV 11v 250nF/mm² BV 11v PICS3 HV 100nF/mm² BV 30v PICS4 HV 200nF/mm² BV 30v 4µF/mm² BV 30v 20nF/mm² BV 50v 3µF/mm² BV 50v 5nF/mm² BV 150v 1.3nF/mm² BV 450v 700nF/mm² BV 100v Production Qualification R&D Florent LALLEMAND 15

16 TSV + Passives IPDiA s approach

17 TSV + passives : 3D IC with TSV is a key innovation enabling miniaturized electronic systems Customers see benefit in performance,power and footprint but they don t want to pay more Niche Extanded lifetime Simplification Killer applications are with passives or sensors 17

18 Via last approach Copper inductors MIM Capacitor Barrier Isolation Polysilicon Resistor Copper High Density Capacitor High Ohmic Substrate NiAu UBM + CUSn Bumps 18 Passivation

19 TSV features Design Factors Value Silicon wafer resistivity 1 kώ-cm TSV depth 200µm TSV diameter 75µm TSV pitch 125µm Keep out area 15µm Silicon dioxide liner thickness 1.5µm 2 metal layers 1µm Al & 6µm Cu RDL Cu 3µm Vias filling Cu partial or complete filling passivation Epoxy based 9µm Under bump metallization NiAu electroless 5µm Solder bump diameter 70µm 19

20 TSV performances Designation Insulation breakdown voltage > 200v Serial resistivity per via < 10mOhms Serial inductor per via Via to via capacitance Insertion loss Coupling to substrate <100pH < 1pF 20GHz

21 TSV + Passives Examples of application Florent LALLEMAND

22 TSV + passives : example 1 transceiver Crystal SAW IPD Benefits : Miniaturization thanks to the high capacitor density Performances Reliability Cost Module Size : 10mm * 7mm * 1,2mm Passives : High density capacitors for decoupling,rf MIM capacitors, resistors, matching network, band-pass filter. Active components on top of the IPD : Saw filter,microcrystal, RF transceiver Cu RDL,NiAu UBM, SnPb solder balls,soldering on PCB 22

23 TSV + passives : example 1 transceiver Crystal SAW IPD Status : First time right with a Yield of 65% ( yield loss root causes identified) Fully functional in the application Reliability tests passed successfully : Temperature cycling (TMCL) -40C <-> +125C, 10 cycles HTSL test (thermo shock) +150C, 24h 0 fails ESD : HBM 750V, MM 100V, CDM 400V 23

24 TSV + passives : example 2 Module Size : 6 mm * 10mm * 3 mm Passives : high density capacitors, MIM capacitors, High value resistances. Cu RDL,NiAu UBM Active components on top of the IPD : Amplifier, switches, smd, PICS Capacitors Molded in a package and soldered on PCB 24

25 TSV + passives : example 2 Benefits : Miniaturization thanks to the high integration ( High Voltage Capacitor 100nF/mm², High Stability Resistors 800kOhms/sq, highly integrated package, volume & weight reduction) Cost reduction of 40% Excellent matching < 2% for the passives High stability Reliability >10 15v,125 C EMPC 2013 : 3D TSV System in Package (SiP) for aerospace applications Safran, IPDiA 25

26 Electrical test Wafer probe test before TSV making TSV continuity thanks to dedicated structures XRay analysis Electrical test on final module 26

27 Conclusion IPDiA continues its commitment to provide 3D/TSV technology with IPD to optimize system integration solutions for best performances (speed/power,stability,reliability), lowest cost, and smallest form factor Feasability was demonstrated on several demonstrators Qualification under medical conditions and reliable manufacturability of IPDiA TSV technology was proven will be the year of 3D!!! (SEMI European 3D TSV Summit) 27

28 Acknowledgments The authors would like to thank : Our Research partners from The members of for sponsoring this work included in the PRIIM project. 28

29 Thank you for attention!

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