IPC-6012DA with Amendment 1. Automotive Applications Addendum to IPC-6012D Qualification and Performance Specification for Rigid Printed Boards

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1 A with Amendment 1 Automotive Applications Addendum to Qualification and Performance Specification for Rigid s FINAL DRAFT FOR INDUSTRY REVIEW MAY Scope This addendum provides requirements to be used in addition to, and in some cases, in place of, those published in to ensure the reliability of printed boards that must survive the vibration and thermal cycling environments of electronic interconnects within the automotive industry Purpose When required by procurement documentation/drawings, this Addendum replaces specifically identified requirements of Precedence The procurement documentation takes precedence over this Addendum and referenced standards. In the event of a conflict between this Addendum and the applicable documents cited herein, this Addendum takes precedence. Where referenced criteria of this addendum differ from the published, this Addendum takes precedence Existing or Previously Approved Designs This Addendum shall not constitute the sole cause for the redesign of previously approved designs. When drawings for existing or previously approved designs undergo revision, they should be reviewed and changes made that allow for compliance with the requirements of this Addendum Use of this Addendum This addendum shall not be used as a stand-alone document but shall be recognized as automotive electronic specific requirements that are in addition to or in place of Class 3 requirements. Where criteria are not supplemented, the Class 3 requirements of shall apply. Where criteria are supplemented or new criteria are added by this Addendum, the clause is listed in A, Table 1, Automotive Applications Requirements, and the entire clause and its associated Table 4-3 entry is replaced by this Addendum except as specifically noted. The clauses modified by this Addendum do not include subordinate clauses unless specifically stated (i.e., changes made to 3.5 do not affect unless is also addressed in this Addendum) Revision Level Changes Changes that were incorporated in the current version of this specification are indicated throughout by gray shading of the relevant subsection(s). Changes to a figure or table are indicated by gray shading of the figure or table header.

2 Table 1 A Automotive Application Requirements Visual Examination Finished printed boards shall be examined in accordance with the following procedure. They shall be of uniform quality and shall conform to through Visual examination for applicable attributes shall be conducted at 3 diopters (approx.1.75x). A 100% Automated Visual Inspection is recommended for mass production. Visual examination of microvia structures for applicable dimensional or workmanship attributes shall be conducted at 30X minimum. If confirmation of a suspected defect cannot be made at 3 diopters, it should be verified at progressively higher magnifications (up to 40X) to confirm that it is a defect. Dimensional requirements such as spacing or conductor width measurements may require other magnifications and devices with reticules or scales in the instrument, which allow accurate measurements of the specified dimensions. Contract or specification may require other magnifications. Visual + AVI 100% Lifted Lands When visually examined in accordance with 3.3 of, there shall be no lifted lands on the delivered (non-stressed) printed board. If observed after thermal stress when visually examined in accordance with 3.3 of IPC- 6012D, separation between conductor or PTH land and laminate surface shall not be greater than one pad thickness. If press-fit pins are used, the printed boards shall be visually examined for lifted lands in accordance with 3.3 of prior to the insertion of press-fit pins. Visual, Optical Measurement Supplier Certification Allowed (4.0) Hole Size, Hole Pattern Accuracy and Pattern Feature Accuracy The minimum hole and copper pattern feature location accuracy shall be as follows: Class 3 Up to 300 mm [11.8 in]: +/- 75 µm [2,953 µin] Up to 450 mm [17.7 in]: +/- 112 µm [4,409 µin] Up to 600 mm [23.6 in]: +/- 150 µm [5,905 µin] The finished hole size tolerance shall be +/- 100 µm [3,937 µin]. Via holes shall be specified as minimum drilled size to secure a sufficient aspect ratio. Visual, Optical Measurement Supplier Certification Allowed (4.0) Nodules or rough plating in PTHs shall not reduce the hole diameter below the minimum limits defined in the procurement document. Critical hole and pattern location tolerances shall be AABUS.

3 Bow and Twist Unless otherwise specified in the procurement documentation, when designed in accordance with IPC- 2221, the printed board shall have a maximum bow and twist of 0.75%. For any product grouped in pallet arrays for assembly purposes, bow and twist requirements of the array shall be AABUS Bow, twist, or any combination thereof, shall be determined by physical measurement and percentage calculation in accordance with, , Coordinate Measurement Machine (CMM) or equivalent method. A preconditioning shall be performed prior to the assessment for bow and twist in accordance with, , 260 C reflow profile, at 2X Reflow Table 5-1 One for qualification and one for shipment 2 s Per Production Lot Bow and twist that may result from unbalanced construction shall be AABUS Conductor Definition All conductive areas on printed boards including conductors, lands and planes shall meet the visual and dimensional requirements of the following sections. The conductor pattern shall be as specified in the procurement documentation. Verification of dimensional attributes shall be performed in accordance with 3.3. AOI inspection methods are allowed, but conductor dimensional assessments by AOI shall be AABUS. Internal conductors are examined during internal layer processing prior to multilayer lamination. AOI All Conductive Layers 100% To secure conductor definition, all layers shall be tested 100% by AOI in accordance with through Rectangular Surface Mount Lands Defects including but not limited to nicks, dents, nodules and pin holes along the external edge of the land shall not exceed 10% of either the length or width of the land, and shall not encroach the pristine area, which is defined by the central 80% of the land width by 80% of the land length as shown in Figure 3-5 of. Defects internal to the land shall not exceed 10% of the length or width of the land, and shall remain outside of the pristine area of the surface mount land. Electrical test probe witness marks within the pristine area are considered cosmetic in nature and are acceptable provided the requirements for final finish are met. Visual or AOI (2.5)

4 Plating Integrity Plating integrity in the PTHs shall meet the requirements detailed in Table 3-10 of this addendum. There shall be no separation of plating layers, no plating cracks, and internal interconnections shall exhibit no separation or contamination between the PTH wall and internal layers. Metal core or thermal planes, when used as electrically functional circuitry, shall meet the above requirements when made from copper; but those made from dissimilar metals may have small spots or pits at their junction with the hole wall plating. Those areas of contamination or inclusions shall neither: Exceed 50% of each side of the interconnection Occur in the interface of the copper cladding on the core and the copper plating in the hole wall when viewed in the microsection evaluation Property Copper voids 2 Plating folds/inclusions Burrs and nodules 2 Glass fiber protrusion 2 Dielectric Removal (e.g., wicking, gouges, etchback, etc.) Innerlayer inclusions (inclusions at the interface between internal lands and through hole plating) Internal foil cracks 1 External foil cracks 1,3 (Type A, B and D cracks) Barrel/Corner cracks 1 (Type E and F cracks) Innerlayer separation (separation at the interface between internal lands and through hole plating) Separations along the vertical edge of the external land(s) Plating separation Hole wall dielectric/plated barrel separation Lifted lands after thermal stress or rework simulation Table 3-10 Plated Hole Integrity After Stress Criteria One void allowed per specimen provided the additional microsection criteria of of are met. The minimum copper thickness in Table 3-4 through Table 3-6 of shall be met. For positive etchback, measurements should follow the topography of the dielectric. When negative etchback results in folds in the copper plating, the copper thickness shall meet the minimum requirements as measured from the face of the internal layer as depicted in Figure 3-12 of IPC- 6012D. The negative etchback limits shall be in accordance with Figure 3-16 of. must be microetched to evaluate. Allowed if minimum hole diameter is met. Allowed. See of. 50 µm [1,969 µin] maximum wicking allowance plus 25 m [984 µin] maximum etchback or smear removal allowance. Wicking shall be measured from the drilled edge of glass fibers. Excessive or atypical wicking allowance related to material selections or design shall be AABUS. D and B cracks not allowed. A cracks allowed. Not acceptable. Separation shall not be greater than 25 µm [984 µin] in depth or more than 20% of the cumulative dielectric thickness. If observed when visually examined in accordance with 3.3, the separation between conductor or PTH Land and laminate surface shall not be greater than one pad thickness. If press-fit pins are used, the printed boards shall be visually examined for lifted lands in accordance with 3.3 of IPC- 6012D prior to insertion of press-fit pins. Note 1. Copper crack definition: See Figure 3-10 of. A crack=a crack in the external foil B crack=a crack that does not completely break plating (minimum plating remains) C crack=a crack in the internal foil D crack=a crack in the external foil and plating-complete break in foil and plating E crack=a barrel crack in plating only F crack= A corner crack in the plating only Note 2. The minimum copper thickness in Table 3-4 through Table 3-6 of must be met. Note 3. The category B and D cracks apply regardless of the number of plating layers (may or may not include cap plating). Microsection - AABUS Per Panel/Test Coupon

5 Solder Mask Thickness Unless otherwise specified in the procurement documentation, solder mask thickness shall be as specified in Table 2. When base copper thickness or copper design requires special treatment, solder mask thickness shall be AABUS. Solder mask thickness over a copper plane is based on a plane width 8 mm [0.315 in]. Solder mask thickness over conductors and dielectric areas are based on a minimum distance from plane to conductor 10 mm [0.394 in]. Table 2 Solder Mask Thickness Requirements Minimum Maximum Thickness Over Conductor 8 µm [315 µin] 30 µm [1,181 µin] - Maximum 40 µm [1,969 µin] when AABUS Thickness Over Conductor Edge 5 µm [197 µin] N/A Thickness Over Copper Plane 10 µm [394 µin] 50 µm [1,970 µin] Maximum 60 µm [2,362 µin] when AABUS Thickness over dielectric area with respect to the surface of surface mount device (SMD) land 1 NA 15 µm [590 µin] Note 1. Solder mask thickness over dielectric areas measured with respect to the surface of nearby SMD grid area shall be no greater than 15 µm [590 µin] thicker than the SMD land measured at the centerline between two adjacent SMD lands and 0.1 mm [0.004 in] from clearance to peripheral lands of a fine pitch SMD device. Measurement or microsection 2 per Production Lot Solder mask thickness shall be measured in accordance with Figure A-1 of this addendum. Instrumental methods may be used or assessment may be made using a microsection of the parallel conductors on the E or G coupon. Cleanliness Cleanliness testing shall be a part of the printed board fabricators process control. Recommended test methods for process and material qualification as well as quarterly verification include the following: 3.9, (Ion Chromatography test) as described in 4.1 of IPC-5704 SIR test in accordance with should be implemented to validate the cleanliness levels maintained by IC and ROSE testing. (ROSE), ROSE test is required and Ion Chromatography is recommended to be a part of the Part Production Approval (IC) and Process (PPAP) (SIR) Daily Process control:, (D), (ROSE test) Lot qualification either by ROSE test or other available test methods such as water based systems, shall be AABUS. Lot Qualification Shall be AABUS AABUS Cleanliness Prior to Solder Mask Application When a printed board requires a permanent solder mask coating, the uncoated printed boards shall be within the allowable limits of ionic and other contaminants prior to the application of solder mask coating. When uncoated printed boards are tested in accordance with TM , the contamination level should not be greater than 0.75 μg/cm 2 of sodium chloride equivalence. Ion Chromatography testing per 3.9 is recommended. Test results and frequency shall be AABUS (ROSE), (IC) and (SIR) Lot Qualification Shall be AABUS AABUS Cleanliness After Solder Mask, Solder, or Alternative Surface Coating Application The printed board contamination level after post cleaning shall meet the requirements of of this addendum. Lot qualification shall be AABUS. Testing of printed boards with base materials or solderable finishes that cannot meet this requirement shall be AABUS. OSP finishes shall not be tested (ROSE), (IC) and (SIR) Lot Qualification Shall be AABUS AABUS

6 4.2 Acceptance Tests Automotive products are mainly produced in such volumes that IPC 6012D requirements to Acceptance Testing and cannot be met. In such cases requirements to Acceptance Testing and shall secure a zero-defect approach by implementing alternative test methods such as Thermal Stress testing, and the usage of 100% AOI (all layers). Alternative tests shall be AABUS Recommended IPC Performance Classes for Automotive Applications Table 3 of this addendum provides a recommended IPC Performance Class graduation for automotive applications. The suggested performance classes in Table 3 of this addendum are based on evaluations made in accordance with Automotive Safety Integrity Levels (ASILs) as described in the ISO Road Vehicles Functional Safety Standard. Table 3 Automotive Performance Class Application IPC Performance Class Body Electronics Class 2 Motor Management Class 3 ECU without High Voltage Class 2 Head Lights Class 3 Rear Lights Class 2 High Voltage Class 3 Safety Related Electronics Class Typical Suitability and Reliability Testing for Automotive Qualification Table 4 of this addendum provides recommendations for suitability and reliability tests for rigid printed board technologies for automotive applications. These tests can also be part of a new supplier qualification. Table 4 Suitability and Reliability Tests Suitability Test Test Temperature/Humidity Test Duration/Cycles Baking (to secure equal starting Oven with forced air 60 C +/- 2 C 12 hours conditions) 1,2 recirculation Simulation C at peak 3X Reflow or AABUS Evaluation 2 Check for compliance to IPC- 6012DA

7 Reliability Test Test Temperature/Humidity Test Duration/Cycles Thermal shock Endurance 2,3 IEC /+125 C 1,000 cycles Dwell Time: 15 minutes Temperature Transition Time: 10 seconds maximum High Temperature Storage 2,4 IEC C 1,000 hours CAF Testing 7 Test method, conditions and duration is AABUS and will depend on application requirements. SIR Testing 2,5, C / 90% RH 168 hours Note 1. Baking for the purpose of establishing equal starting conditions is not considered a full bake for moisture removal. If moisture removal is required, baking of printed boards in accordance with 3.4 of IPC-1601 should be considered. Note 2. Evaluation of the specimens after test as referenced in Table 4 should include, but not be limited to, electrical testing and microsection. The specimens shall meet the general requirements of this specification. Note 3. Different temperatures and/or number of cycles may be appropriate based on application requirements. Note 4. Different temperatures and/or storage times may be appropriate based on application requirements. Note 5. Qualification criteria shall be AABUS. Note 6. A different test duration time may be appropriate depending on application requirements but shall be no less than 72 hours. Note 7. CAF test conditions, at the time of publication of this version of this specification, are currently being re-evaluated and developed to address the increasing voltage requirements in some aspects of automotive electronics and therefore the conditions for this test shall currently be AABUS. Figure A-1 Measurement ology for Solder Mask Thickness Determination Note 1: Solder mask thickness over conductor. Note 2: Solder mask thickness over conductor edge. Note 3: Solder mask thickness over copper plane. Note 4: Conductor. Note 5: Surface Mount Device (SMD) land. Note 6: Copper Plane. Note 7: Dielectric. Note 8: Solder mask thickness over dielectric area measured with respect to the surface of surrounding SMD land area.