Characteristics and Reliability of No-Flow Underfills for Solder Bumped Flip Chip Assemblies

Transcription

1 Intl. Journal of Microcircuits and Electronic Packaging Characteristics and Reliability of No-Flow Underfills for Solder Bumped Flip Chip Assemblies John H. Lau, Chris Chang, and Chih-Chiang Chen Express Packaging Systems, Inc San Antonio Road Palo Alto, California 9433 Phone: ext. 11 Fax: Abstract Solder bumped Flip Chips on low cost substrates with three different epoxy-based no-clean flux liquid-like no-flow underfills are presented in this study. This paper includes evaluation of three commercial no-flow underfills and characterization of material and process parameters. Important materials and process parameters, such as curing temperature and time, thermal coefficient of expansion, storage modulus, loss modulus, tand, glass transition temperature, moisture uptake, solder reflow, and post curing are discussed in this work. Curing mechanism during reflow of no-flow underfills will be illustrated in this paper and a comparison of noflow underfill and conventional underfill will be also addressed. Also, cross-sections are examined for a better understanding of the effects of these no-flow underfill materials on the interconnects of the Flip Chip assemblies. Shear and thermal-cycling tests and results of these Flip Chip assemblies are reported and analyzed. Key words : No-flow Underfill, Flip Chip, Reliability, Physical and Mechanical Properties. 1. Introduction Solder bumped Flip Chips on expensive substrates have been used since 196s. The past few years have witnessed an explosive growth in research efforts devoted to solder bumped Flip Chips on low cost substrates There are at least two major reasons why it works. One is the high density substrate with fine line and width such as the printed circuit board (PCB) with sequential or built-up circuits and micro vias such as the DYCOstrate, plasma etched redistribution layers (PERL), surface laminar circuits (SLC), film redistribution layer (FRL), interpenetrating polymer build-up structure system (IBSS), high density interconnect (HDI), conductive adhesive bonded flex, sequential bonded films, sequential bonded sheets, and filled micro via technologies. The other significant reason is the underfill epoxy encapsulant used to reduce the effect of the global thermal expansion mismatch between the silicon chip and the low cost organic substrate. (Since the chip, the underfill, and the substrate are deformed together like a unit, that is, the relative deformation between the chip and the substrate is very small, thus, the shear deformation of the solder joint is very small.) The other advantages of underfill encapsulant are to protect the chip from moisture, ionic contaminants, radiation and hostile operating environments such as thermal, mechanical, shock, and vibration. The important disadvantages of underfill encapsulant are to make rework very difficult and to reduce manufacturing throughput. Research efforts of reworkable underfills are very active 1-6. However, most of these materials are using solvent chemical and most of the chips (such as passivation) and substrates (such as solder mask, via, and copper pads) are degraded or even damaged after rework. These issues indicate that more work needs to be done in this area. As to the manufacturing throughput issue, fast-flow and fast cure underfill encapsulants are on their way However, the The International Journal of Microcircuits and Electronic Packaging, Volume 22, Number4, Fourth Quarter 1999 (ISSN ) 37

2 Characteristics and Reliability of No-Flow Underfills for Solder Bumped Flip Chip Assemblies material properties of these underfills can be degraded (due to excessive/large voids, too high a thermal coefficient of expansion, and too low a Young s modulus) and, thus, affect the mechanical and physical properties of the solder bumped Flip Chips on board assembly. Meantime, a class of no-flow underfill encapsulant materials is emerging 8, The advantages of noflow underfill material are to reduce manufacturing processing steps and to increase production throughput. Basically, no-flow underfills come in two forms, namely, the epoxy-based no-clean flux liquid and the epoxy-based nonconductive film sheet. The major assembly process for solder bumped Flip Chips on low cost substrate with the conventional and noflow underfill materials is shown in Figure 1. It can be seen that the process flow with the no-flow (liquid-like) underfill material (Figure 1b) is simpler than that with the conventional underfill material (Figure 1a), and the former reflows the solder bumps and partially (or fully) cures the underfill material at the same time. On the other hand, the process flow with the no-flow (filmlike) underfill material (Figure 1c) is not Surface Mount Technology (SMT) compatible and is more complicated than that with the conventional underfill material. In this paper, the focus is on the epoxy-based no-clean flux liquid-like no-flow underfills. Since there is no filler in the material, the Young s modulus is very small and the thermal coefficient of expansion is very large. Underfills A and B are reflowed under normal SMT reflow temperature profile (dotted line in Figures 2a and 2b), while Underfill C is reflowed under a special reflow temperature profile (dotted line in Figure 2c). These reflow temperature profiles are recommended by venders and are executed in this Differential Scanning Calorimeter (DSC) scanning from 4 o C to 24 o C for Underfill C and from 4 o C to 22 o C for Underfills A & B. Underfills A and B are meant for either solder bumped Flip Chips on board (Direct Chip Attach) or on a substrate (Flip Chip in a package), while Underfill C is useful only for solder bumped Flip Chip in a package. According to the vendors, after reflowed, the post curing condition for Underfill A is 15 o C for 3 minutes and for Underfill B is 16 o C for 6 minutes. Post cure is not required for Underfill C. Heat Flow (W/g) DSC output of underfill A reflow profile input to DSC 22 o C 29.5 o C Time (minute) Figure 1. Three different process steps for solder bumped flip chips on low cost substrates. Heat Flow (W/g) DSC output of underfill B reflow profile input to DSC 22 o C o C Time (minute) No-Flow Underfill Materials 2 Three different SMT compatible no-flow underfills, namely, (c) 191 o C 12 Underfil A, Underfill B, and Underfill C are considered. Each -2 one of them consists of a no-clean flux, an epoxy, and an anhydride hardener. The function of the no-clean flux is to prepare -6 reflow profile input to DSC -4 8 DSC output of underfill C 24 and protect the metal surfaces (solder bumps and copper pads) to o C be soldered by removing surface oxides. This provides a clean Time (minute) metallic surface and prevents further oxidation during the soldering process. The function of the cured epoxy and hardener is Figure 2. DSC thermal scan curve for Underfill A, to act as a structural adhesive. This provides the necessary strength Underfill B, and (c) Underfill C (Dotted lines are for solder to hold the chip and the substrate together such that the solder reflow temperature profiles). bumps are subjected to the minimum relative displacements. The International Journal of Microcircuits and Electronic Packaging, Volume 22, Number 4, Fourth Quarter 1999 (ISSN ) Heat Flow (W/g) Temperature ( C) 371

3 Intl. Journal of Microcircuits and Electronic Packaging 3. Curing Conditions For determining the curing conditions of Underfills A, B, and C, they are placed into an aluminum pan (which will form a disc sample with dimensions: 6.4 mm ±.2 mm in diameter and 1.6 mm ±.1 mm in thickness), weighed, and then placed in a DSC equipment. The objective of DSC is to measure the amount of energy (heat) absorbed or released by a sample as it is heated, cooled or held at a constant (isothermal) temperature. Since the system is always directly measuring energy flow to or from the sample, DSC can directly measure temperature onset of curing. The kinetic software enables to analyze a DSC peak to obtain specific kinetic parameters that characterize a reaction process. Any material reaction can be represented by the following equation, k A t B + D H Where A is the material before reaction, B is the material after reaction, D H is the heat absorbed or released, and k is the Arrhenius rate constant. The Arrhenius equation is given by the following relation, 372 k = Zexp(-E a /RT) Where Z is the pre-exponential constant, E a is the activation energy of the reaction, R is the universal gas constant (8.314 j/ o C/ mole), and T is the absolute temperature in degree Kelvin. The rate of reaction (dx/dt) can be directly measured by DSC and is expressed as follows, dx/dt = k(1-x) n where dx/dt is the rate of reaction, x is the fraction reacted, t is the time, k is the Arrhenius rate constant, and n is the order of reaction. Combining the above equations and assuming an nth order reaction kinetics and constant program rate, activation energy, and pre-exponential constant, then one can have, dx/dt = Zexp(-E a /RT) (1-x) n The fraction reacted x is directly related to the fractional area of the DSC reaction peak. The kinetic parameters Z, E a, and n are determined using an advanced multi-linear regression method (MLR). In order to understand the characteristics of no-flow underfills, the thermal scan is carried out according to the solder reflow temperature profile (dotted line) shown in Figures 2a, 2b, and 2c for Underfills A, B, and C, respectively. These are the actual (heating rate) inputs to the DSC equipment, and the reason for no smooth curves. It can be seen that the temperature profiles in Figures 2a and 2b are very similar to the customary SMT compatible solder reflow temperature profile (preheat, preflow, reflow, and cool down). On the other hand, the tem- scan curves for Underfills A, B, and C are shown in Figures 3a, The International Journal of Microcircuits and Electronic Packaging, Volume 22, Number4, Fourth Quarter 1999 (ISSN ) perature profile in Figure 2c raises very fast to the peak reflow temperature and then cools down slowly. The solid line in Figures 2a, 2b, and 2c shows the DSC thermal scan curve for Underfills A, B, and C, respectively. First of all, it can be seen that for all the underfills, the heat flow changes with heating rate changes. Secondly, they are not the same. For Underfill A, Figure 2a, during the early stage of heating (within the first 1.5 minutes of the reflow temperatures) the noclean flux agent is evaporating, an endothermic process. Then, the polymer chains begin to rearrange and react with the anhydride hardener. Finally, the underfill begins to cure near the temperatures where the heat flows are changing from endothermic to exothermic, that is, heat is released during the curing process. (The heat-releases from high to low temperatures have already been taken care of substrating a baseline based on the same temperature profile.) It should be noted that Underfill A starts curing not only after the solder began to reflow (at 183 o C) but also near the peak reflow temperature (22 o C). The peak curing temperature of the raw (un-reflowed) Underfill A under a typical SMT reflow temperature profile is 29.5 o C. For Underfill B, Figure 2b, the DSC thermal scan curve is similar to that of Underfill A, except: (1) there is a peak of heat flow during no-clean flux evaporation (at about 96 o C), and (2) it absorbs more heat prior to curing near the peak reflow temperature (22 o C). The peak curing temperature of the raw Underfill B is o C. For Underfill C, Figure 2c, the DSC thermal scan curve is quite different from those of Underfills A and B. During noclean flux evaporation, similar to Underfill B, there is a heatflow peak but with a higher value. Also, it starts to cure (near 191 o C) much earlier than Underfills A and B (almost the same time as the solder started to reflow). The peak curing temperature of the raw Underfill C is 24 o C. The temperature profile for underfill A is a typical SMT reflow temperature profile. This temperature profile includes four main zones: preheat, preflow, reflow, and cool down. According to this study, this temperature profile works well for Underfill A. However, for Underfill B, it always results into bad interconnection. One possible explanation is that the preflow temperature is too high for Underfill B, and Underfill B is partially cured during the preflow stage before reflowing the solder. Also, bad interconnection is found applying temperature profiles A & B to Underfill C. The strategy of temperature profile for Underfill C is fast fluxing and reflowing solder before any curing occurs, then cooling down to a moderate temperature to post cure the Underfill C. In order to determine the percentage of curing of the raw Underfills A, B, and C after reflowed (post curing conditions), another two sets of DSC measurements are performed. One set of measurement is to place the samples used to obtained the solid line in Figures 2a, 2b, and 2c into the DSC equipment, and at this time, the thermal scan is carried out at a 1 o C/min heating rate ranging from 4 up to 3 o C. Another set of measurement is to place the raw Underfills A, B, and C into the DSC equipment and subjected to the same heating rate. The DSC thermal

4 Characteristics and Reliability of No-Flow Underfills for Solder Bumped Flip Chip Assemblies 3b, and 3c, respectively. The solid line is for the after-reflowed underfills and the dotted line is for the raw underfills. Heat Flow (W/g) Heat Flow (W/g) no reflow H = J/g after reflowed H = J/g after reflowed, 74% of underfill A are cured 219 o C 29 o C no reflow H = J/g after reflowed H = J/g after reflowed, 61% of underfill B are cured 27 o C 211 o C Temperature ( O C) not be necessary. The peak temperature for curing the afterreflowed Underfills B and C are 211 o C, and 187 o C, respectively. The lines in Figures 4a, 4b, and 4c show the typical degree of conversion (reaction) versus time curves of the after-reflowed Underfills A, B, and C, respectively. It can be seen that, the after-reflowed Underfill A can be fully cured in less than 1 minutes if the applied curing temperature is 219 o C. Also, it can be fully cured in about 3 minutes if the applied curing temperature is 18 o C. However, it cannot be 1% cured even in one hour if the applied curing temperatures are less than 15 o C. For example, after solder reflowed, the Underfill A is only 8% cured at a post curing condition of 15 o C for 3 minutes. The degrees of curing of Underfill B, Figure 4b, are very similar to Underfill A. The degrees of curing of Underfill C, Figure 4c, are very different from Underfills A and B, curing much faster. For example, Underfill C can be fully cured at a post curing condition of 24 o C in less than 4 minutes. % Reaction o C 18 o C 15 o C Time (minute) (c) Heat Flow (W/g) no reflow H = J/g after reflowed H = -12. J/g after reflowed, 96% of underfill C are cured 187 o C 175 o C Figure 3. DSC thermal scan curve for Underfill A, Underfill B, and (c) Underfill C (Dotted lines are for raw underfills. Solid lines are for reflowed underfills). % Reaction o C 18 o C 16 o C Time (minute) From Figure 3a, it can be seen that Underfill A is not fully cured (solid line) after SMT solder reflow temperature. Comparing with the DSC thermal scan curve of the raw Underfill A (dotted line), it can be determined that ( )/334=74% of the Underfill A are cured due to reflow temperatures. The peak curing temperature of the after-reflowed Underfill A is 219 o C. Similarly, it can be obtained from Figures 3b and 3c that 61% of Underfill B and 96% of Underfill C are cured due to reflow temperatures (dotted lines) shown in Figures 2b and 2c, respectively. It should be noted that since 96% of Underfill C are cured during solder reflow, then post curing of this underfill may (c) % Reaction o C o C 16 o C Time (minute) Figure 4. Degree of conversion versus time curves for Underfill A, Underfill B, and (c) Underfill C. The International Journal of Microcircuits and Electronic Packaging, Volume 22, Number 4, Fourth Quarter 1999 (ISSN ) 373

5 Intl. Journal of Microcircuits and Electronic Packaging 4. Material Properties The material properties such as the coefficient of thermal expansion (CTE), storage modulus, loss modulus, Tand, glass transition temperature (T g ), and moisture uptake of Underfills A, B, and C are determined in the following sections CTE The CTE of Underfills A, B, and C (with a sample dimensions of 6.4 mm ±.2 mm in diameter and 1.6 mm ±.1 mm in height) is determined by the thermal mechanical analysis (TMA) in an expansion quartz system (5 to 2 o C) at a 5 o C/min heating rate. The CTE is obtained by the first slope of the dimensional change versus temperature curve. Figure 5 shows the typical expansion curves of Underfills A, B, and C. It can be seen that the CTE of Underfills A, B, and C are 7x1-6 / o C, 79x1-6 / o C, and 71x1-6 / o C, respectively, and are very large compared to the conventional underfill (2 ~ 4x1-6 / o C) This is due to the fact that there is no filler in the no-flow underfills. For better solder joint thermal-fatigue reliability, it is preferable to have lower CTE underfill materials ([ 27x1-6 / o C) 29 due to the thermal expansion mismatch between the Si chip, underfill, solder joints, and PCB. For the materials under consideration, the CTE of Underfill B is larger than that of Underfills A and C. The storage modulus and loss modulus of Underfills A, B, and C can be determined with a three-point bending specimen (3. mm ±.3 mm x 2.9 mm ±.3 mm x 19 mm ± 3 mm) in a dynamic mechanical analysis (DMA) unit (5 to 2 o C) at a heating rate of 5 o C/min. In material sciences, the flexural storage modulus is a measure of the energy stored per cycle of defor- The International Journal of Microcircuits and Electronic Packaging, Volume 22, Number4, Fourth Quarter 1999 (ISSN ) mation and the flexural loss modulus is a measure of the energy lost per cycle of deformation. Figure 6 shows a set of typical flexural storage modules of Underfills A, B, and C. It can be seen that the storage modulus of all the no-flow underfill materials is temperature dependent, the higher the temperatures the lower the modules. Also, the storage modulus of all the no-flow underfill materials is smaller than that of the conventional underfill materials (4 ~ 7 GPa) 26-28, since there is no filler in the no-flow underfills. It should be pointed out that not only the CTE of Underfill B is larger than that of Underfills A and C, but also the storage modulus of Underfill B is smaller than that of Underfills A and C. High CTE and low modulus are not favorable for solder joint thermal-fatigue reliability. Modulus (GPa) Underfill A Underfill B Underfill C Underfill A Underfill B Underfill C TCE α1=7, α2=123ppm/ o C TCE α1=79, α2=151ppm/ o C TCE α1=71, α2=166 ppm/ o C Figure 6. Storage modulus curves for Underfill A, Underfill B, and Underfill C. 374 Expansion (%) Figure 5. Thermal expansion curves for Underfill A, Underfill B, and Underfill C Modulus 4.3. Glass Transition Temperature (T g ) Tangent delta (tand), which is a measure of material related damping property of Underfills A, B, and C, can be obtained by dividing the loss modulus by the storage modulus. The temperature at the peak of a tand curve is often reported in literature as glass transition temperature (T g ). Figure 7 shows the typical tangent delta curves of Underfills A, B, and C. It can be seen that since the T g curve for Underfill B is wider than those of Undefills A and C, then the stiffness of Underfill B is the worst. This effect can be contributed to the fact that the stiffness of underfills becomes softer during a wider transition temperature range. Also, the largest T g is for Underfill C and the smallest T g is for Underfill B. Finally, it should be noted that the T g of Underfills A, B, and C is lower than that of the conventional underfills (14 ~ 18 o C) High T g value is favorable for endurance at higher temperature environments.

6 Characteristics and Reliability of No-Flow Underfills for Solder Bumped Flip Chip Assemblies Tanδ Underfill A Tg = 125 o C Underfill B Tg = 15 o C Underfill C Tg = 134 o C Weight change ratio (%) Before steam aging After 2 hours steam aging y = 1.25% y =.11% Figure 7. Tangent delta curves for Underfill A, Underfill B, and Underfill C Moisture Content Two sets of tests are carried out for determining the moisture content of Underfills A, B, and C, one is for dry specimen and the other is for steam aging specimen. The steam aging specimen is prepared under steam evaporation for 2 hours in a closed hot water bath. The packages are not immersed in hot water. They are placed on a metal mesh which is above the water surface. Steam is generated from boiling the water. All packages are exposed within the evaporated steam. (It has been shown in Reference 27 that this condition is equivalent to the 85 o C/85%RH for 168 hours.) All the specimen dimensions are: 6.4 mm ±.2 mm in diameter and 1.6 mm ±.1 mm in height. Weight loss of Underfill A, B, and C is measured with the thermal gravimetric analysis (TGA) equipment under 14 o C for four hours. The change in mass during thermal scan can be expressed as: (W f - W i )/W i, where W f is the final weight after thermal scan and W i is the initial weight before thermal scan. Figures 8a, 8b, and 8c, respectively, show the typical % weight loss (moisture content) of Underfills A, B, and C before and after 2 hours of steam aging. It can be seen that the moisture content of Underfills A, B, and C after 2 hours of steam aging is more than before (the dry condition). Also, they absorb more moisture than the conventional underfills (<.1% for dry condition and.3 ~.5% for steam aging condition) Low moisture absorption underfills can extend shelf life. (c) Weight change ratio (%) Weight change ratio (%) Before steam aging After 2 hours steam aging y = 1.4% y =.17% Before steam aging After 2 hours steam aging y = 1.12% y =.15% Figure 8. Moisture absorption for Underfill A, Underfill B, and Underfill C. 5. SMT Assembly Figure 1b shows the major process steps with all the no-flow underfills. It can be seen that after the 63wt%Sn-37wt%Pb solder bumped chip (5 mm x 5 mm with 4 bumps on a.18 mm pitch) is aligned with the substrate with a look-up camera and a look-down camera, the no-flow underfill is applied on the substrate via a syringe dispenser. (It should be noted that higher The International Journal of Microcircuits and Electronic Packaging, Volume 22, Number 4, Fourth Quarter 1999 (ISSN ) 375

7 Intl. Journal of Microcircuits and Electronic Packaging manufacturing through-put could be achieved with the screen printing or metal bump transfer methods.) Then, the chip is placed face-down on the substrate with a very minimum force. During this step, some of the no-flow underfill is squeezed outside the chip. After chip placement, it is placed on the conveyor belt of a reflow oven with Nitrogen gas environment. The dotted lines in Figures 2a, 2b, and 2c show the temperature profiles of Underfills A, B, and C, which are obtained by mounting thermal couples on the substrate during solder reflow. It has been shown in Section (3) that these no-flow underfills are only partially cured (except Underfill C which is almost fully cured) during solder reflow, thus post curing (according to the conditions shown in Figures 4a, 4b, and 4c) is necessary in order to achieve fully-cured physical and mechanical material properties. However, in this study, vendors recommendations are used: 3 minutes at 15 o C for Underfill A, 6 minutes at 16 o C for Underfill B, and no post cure for Underfill C. Figures 9a and 9b show the cross sections of a solder bumped Flip Chip on low-cost substrate with Underfill A. It can be seen that the solder bumps did solder on the copper pads. However, there are many voids present. Die shows that there are no bondings between the solder and the copper pad at two locations. Also, Figure 1d shows that there is almost no bonding between the solder and the copper pad. Die BT Die BT Underfill Solder Mask Solder Joint BT (c) No Bonding Die Cu NSMD Solder Joint Cu BT Void Solder Mask (d) No Bonding Figure 9. Cross-sectional views of Flip Chip assembly with Underfill A. Figures 1a, 1b, 1c, and 1d show the cross sections with Figure 1. Cross-sectional views of Flip Chip assembly Underfill B. First of all, the solder joint (a sharp angle) is not as with Underfill B. smooth as that with Underfill A. Figure 1b shows a good bonding between the solder and the copper pad. However, Figure 1c The International Journal of Microcircuits and Electronic Packaging, Volume 22, Number4, Fourth Quarter 1999 (ISSN ) 376

8 Characteristics and Reliability of No-Flow Underfills for Solder Bumped Flip Chip Assemblies Figures 11a and 11b show the cross sections with Underfill C. Similar to Underfill B, the solder joints are not in the customarily truncated smooth spherical shape. However, most of the solder joints did achieve good bondings with the copper pads. Die BT Die BT Underfill Solder Mask Figure 11. Cross-sectional views of Flip Chip assembly with Underfill C. 6. Potential Assembly Problems In this study, the potential assembly problems with the noflow underfill are the following, The amount of no-flow underfill needs to be controlled precisely. Otherwise, the overflowed no-flow underfill material will be sucked into the placement head. Some placement pressure is needed to avoid air trapping, thus inducing voids. (c) For no-flow Underfills A and B, post curing is necessary, and thus decreasing the throughput. (d) The reflow temperature profile for no-flow underfills needs to follow vendor s suggestion, otherwise it will not work. Unfortunately, the vendor s temperature profile is not always compatible with that for SMT manufacturing. (e) For no-flow Underfill C, a non-conventional SMT reflow temperature profile needs to be used. Therefore, Underfill C is useful only for solder bump Flip Chip in a package. 7. Shear and Thermal Cycling Tests and Results The no-flow underfill Flip Chip assemblies are subjected to shear test. A set of typical force-displacement curves is shown in Figure 12 for Underfills A, B, and C. It can be seen that they are very much the same, and the maximum shear force is about 7 N. Their fracture surfaces on the substrate are shown in Figures 13a, 13b, and 13c, respectively. It can be seen that some of the solder masks are sheared off from the substrate, an indication that these underfill materials provide very good adhesion. However, many voids are found. Force (N) underfill A underfill B underfill C Displacement (µm) Figure 12. Shear test results of Flip Chip assembly with Underfills A, B, and C. The Flip Chip assemblies are also subjected to the thermal cycling test with the on-substrate temperature profile shown in Figure 14. The criterion for the failure of solder joint is set when the resistance of the solder interconnect is larger than 4 ohm. One can expect the Flip Chip to pass the thermal cycling test due to the protection of no-flow underfill. Indeed, they all have passed 1,6 cycles. The typical cross sections of the tested samples with Underfills A, B, and C are shown in Figures 15a, 15b, and 15c, respectively. These tested solder joints look very similar to those of the Flip Chip assembly with conventional underfills after 1,5 thermal cycles 3. The International Journal of Microcircuits and Electronic Packaging, Volume 22, Number 4, Fourth Quarter 1999 (ISSN ) 377

9 Intl. Journal of Microcircuits and Electronic Packaging A Void Time (s) (sec) B Figure 14. Thermal cycling temperature profile. Void C Si-Chip Residue Figure 13. Fracture surfaces of Flip Chip assembly with Underfills A, B, and C. (c) Figure 15. Cross-sectional views of 1,6 thermal cycled solder joints with Underfill A, with Underfill B, and (c) with Underfill C. The International Journal of Microcircuits and Electronic Packaging, Volume 22, Number4, Fourth Quarter 1999 (ISSN ) 378

10 Characteristics and Reliability of No-Flow Underfills for Solder Bumped Flip Chip Assemblies 8. Summary and Recommendations References The characteristics of three different epoxy-based no-clean flux 1. Y. Tsukada, S. Tsuchida, and Y. Mashimoto, A Novel Chip liquid-like no-flow underfills used for solder bumped Flip Chips Replacement Method for Encapsulated Flip Chip Bonding, on low cost substrates have been studied. Emphasis is placed on Proceedings of the Electronic Components and Technology the curing temperature and time, thermal coefficient of expansion, Conference, ECTC 93, Orlando, Florida, pp , June storage modulus, loss modulus, tand, glass transition tem perature, moisture absorption, solder reflow, and post curing condition. 2. F. L. Pompeo, A. J. Call, J. T. Coffin, and S. Buchwalter, The solder bumped Flip Chip assemblies with these three Reworkable Encapsulation for Flip Chip Packaging, Pro- no-flow underfills are subjected to shear (destructive) tests and ceedings of the International Intersociety Electronic Packaging thermal cycling (non-destructive) tests. Cross sections of these Conference, Maui, Hawaii, pp , March no-flow assemblies (before and after tests) have been examined 3. D. Suryanarayana, J. A. Varcoe, and J. V. Ellerson, for a better understanding of their effect on solder joints. Some Reparability of Underfill Encapsulated Flip Chip Packages, important results are summarized as follows. Proceedings of the Electronic Components and Technology For all the no-flow underfills considered, the heat flow changes Conference, ECTC 95, Las Vegas, Nevada, pp , May with heating rate changes For all the no-flow underfills considered, the underfills cure 4. L. Nguyen, P. Fine, B. Cobb, Q. Tong, B. Ma, and A. Savoca, faster at higher temperatures. Reworkable Flip Chip underfill Materials and Processes, For all the no-flow underfills considered, the CTE is much Proceedings of the International Symposium on Microelectronics, higher than that of the conventional underfills. IMAP 98, San Diego, California, pp , No- For all the no-flow underfills considered, the storage modulus vember is temperature dependent and is much lower than that of the 5. L. Wang, and C. P. Wong, Epoxy-Additive Interaction Studies conventional underfills. of Thermally Reworkable Underfills for Flip-Chip Appli- For all the no-flow underfills considered, the tangent delta cations, Proceedings of the Electronic Components and Technology curve is wider than that of the conventional underfills. That Conference, ECTC 99, San Diego, California, pp. means the stiffness of the no-flow underfills is softer than that 34-42, June of the conventional underfills. 6. L. Crane, A. Torres-Filho, E. Yager, M. Heuel, C. Ober, S. For all the no-flow underfills considered, the glass transition Yang, J. Chen, and R. Johnson, Development of Reworkable temperature is lower than that of the conventional underfills. Underfills, Materials, Reliability and Proceeding, Proceedings For all the no-flow underfills considered, the moisture absorption of NEPCON WEST, pp , February is higher than that of the conventional underfills. 7. K. B. Wun, and G. Margaritis, The Evaluation of Fast-Flow, Since low CTE and high modulus are favorable for solder Fast-Cure Underfills for Flip Chip on Organic Substrates, joint thermal-fatigue reliability, it is recommended that the Proceedings of the Electronic Components and Technology vendors to lower the CTE value and increase the modulus of Conference, ECTC 96, Orlando, Florida, pp , May their no-flow underfills Since high T g is favorable for endurance at higher temperature 8. N. Pascarella, and D. Baldwin, Advanced Encapsulation environments, it is recommended that the vendors to Processing for Low Cost Electronics Assembly A Cost Analy- higher the T g of their materials. sis, The 3 rd International Symposium and Exhibition on Advanced The vendors should lower the moisture absorption of their Packaging Materials, Processes, Properties, and In- no-flow underfills to extend shelf life. terfaces, Braselton, Georgia, pp. 5-53, March L. Naguyen, L. Hoang, P. Fine, Q. Tong, B. Ma, R. Humphreys, A. Savoca, C. P. Wong, S. Shi, M. Vincent, and L. Wang, Acknowledgments High Performance Underfills Development Materials, Processes, and Reliability, IEEE 1 st International Symposium on Polymeric Electronics Packaging, Norrkoping, Sweden, pp. 3-36, October The authors would like to thank the vendors for providing 1. C. P. Wong, M. B. Vincent, and S. Shi, Fast-Flow Underfill samples for this study. Encapsulant: Flow Rate and Coefficient of Thermal Expansion, Proceedings of the ASME Advances in Electronic Packaging, Vol. 19-1, pp , M. B. Vincent, and C. P. Wong, Enhancement of Underfill Encapsulants for Flip Chip Technology, Proceedings of Surface Mount International Conference, San Jose, California, pp , August The International Journal of Microcircuits and Electronic Packaging, Volume 22, Number 4, Fourth Quarter 1999 (ISSN ) 379

11 Intl. Journal of Microcircuits and Electronic Packaging 12. Q. Tong, A. Savoca, L. Nguyen, P. Fine, and B. Cobb, Novel Conference, ECTC 99, San Diego, California, pp , Fast Cure and Reworkable Underfill Materials, Proceedings June of the Electronic Components and Technology Conference, 25. T. P. DeBarros, Neathway, and Q. Chu, The No-Flow Fluxing ECTC 99, San Diego, California, pp , June Underfill Adhesive for Low Cost, High Reliability Flip 13. P. N. Houston, D. F. Baldwin, M. Deladisma, L. N. Crane, Chip Assembly, Proceedings of the Electronic Components and M. Konarski, Low Cost Flip Chip Processing and Reliability and Technology Conference, ECTC 99, San Diego, Califor- of Fast-Flow, Snap-Cure Underfills, Proceedings of nia, pp , June the Electronic Components and Technology Conference, 26. J. H. Lau, and C. Chang, Characterization of Underfill ECTC 99, San Diego, California, pp. 61-7, June Materials for Functional Solder Bumped Flip Chips on Board 14. B. Anderson, Development Methodology for a High-Performance, Applications, IEEE Transactions on Components, Parts, Snap-Cure Flip Chip Underfill, Proceedings of and Packaging Technology, Part A, Vol. 22, No. 1, pp NEPCON WEST, pp , February , March M. Erickson and K. Kirsten, Simplifying the Assembly 27. J. H. Lau, and C. Chang, How to Select Underfill Materials Process with a Reflow Encapsulant, Electronic Packaging for Solder Bumped Flip Chip on Low Cost Substrates?, and Production, pp , February IMAPS Transactions, International Journal of Microelectronics 16. D. Gamota and C. Melton, Reflowable Material Systems to and Electronic Packaging, IJMEP, Vol. 22, No. 1, First Integrate the Reflow and Encapsulant Dispensing Process for Quarter, pp. 2-28, Flip Chip on Board Assemblies, IPC-TP-198, J. H. Lau, C. Chang, and R. Chen, Effects of Underfill 17. S. Ito, M. Kuwamura, S. Sudo, M. Mizutani, T. Fukushima, Encapsulant on the Mechanical and Electrical Performance H. Noro, S. Akizuki, and A. Prabhu, Study of Encapsulating of a Functional Flip Chip Device, Journal of Electronics System for Diversified Area Bump Packages, Proceedings Manufacturing, Vol. 7, No. 4, pp , December of the Electronic Components and Technology Conference, 29. J. H. Lau, S-W. Ricky Lee, Chris Chang, and Chien Ouyang, ECTC 97, San Jose, California, pp , May Effects of Underfill Material Properties on the Reliability of 18. C. P. Wong, S. H. Shi, and G. Jefferson, High Performance Solder Bumped Flip Chip on Board with Imperfect Underfill No Flow Underfills for Low-Cost Flip-Chip Applications, Encapsulants, Proceedings of 49 th Electronic Components Proceedings of the Electronic Components and Technology and Technology Conference, ECTC 99, San Diego, California, Conference, ECTC 97, San Jose, California, pp , pp , June May J. H. Lau, and Y.-H. Pao, Solder Joint Reliability of BGA, 19. C. P. Wong, D. Baldwin, M. B. Vincent, B. Fennell, L. J. CSP, and Fine Pitch SMT Assemblies, McGraw-Hill, New Wang, and S. H. Shi, Characterization of a No-Flow Underfill York, New York, Encapsulant During the Solder Reflow Process, Proceed- ings of the Electronic Components and Technology Conference, ECTC 98, Seattle, Washington, pp , May About the authors 2. S. Ito, M. Mizutani, H. Noro, M. Kuwamura, and A. Prabhu, A Novel Flip Chip Technology Using non-conductive Resin Sheet, Proceedings of the Electronic Components and Technology John H. Lau is the President of Express Packaging Systems, Conference, ECTC 98, Seattle, Washington, pp Inc., in Palo Alto, California. His current interests cover a broad 151, May range of electronics packaging and manufacturing. Prior to founding 21. J. H. Lau, C. Chang, and O. Chien, SMT Compatible No- EPS in November 1995, he worked for Hewlett-Packard Com- Flow Underfill for Solder Bumped Flip Chip on Low-Cost pany, Sandi National Laboratory, Bechtel Power Corporation, Substrates, Journal of Electronics Manufacturing, Vol. 8, and Exxon Production and Research Company. With more than Nos. 3 & 4, pp , December years of R & D and manufacturing experience in the electronics, 22. R. Thorpe, and D. F. Baldwin, High Throughput Flip Chip petroleum, nuclear, and defense industries, he has authored Processing and Reliability Analysis Using No-Flow and co-authored over 15 peer reviewed technical publications, Underfills, Proceedings of the Electronic Components and and is the author and editor of 12 books: Solder Joint Reliability; Technology Conference, ECTC 99, San Diego, California, Handbook of Tape Automated Bonding; Thermal Stress and pp , June Strain in Microelectronics Packaging; The Mechanics of Solder 23. J. H. Lau, C. Chang, and O. Chien, No-Flow Underfill for Alloy Interconnects; Handbook of Fine Pitch Surface Mount Technology; Solder Bumped Flip Chip on Low-Cost Substrates, Proceedings Chip on Board Technologies for Multichip Modules; Ball of NEPCON West, pp , February Grid Array Technology; Flip Chip Technologies; Solder Joint 24. S. H. Shi, and C. P. Wong, Recent Advances in the Development Reliability of BGA, CSP, Flip Chip, and Fine Pitch SMT Assem- of No-Flow Underfill Encapsulants A Practical blies; Electronics Packaging; Design, Materials, Process, and Approach towards the Actual Manufacturing Application, Reliability; Chip Scale Package (CSP); Design, Materials, Process, Proceedings of the Electronic Components and Technology Reliability, and Appliances; and Low Cost Flip Chip Tech- nologies for DCA, WLCSP, and PBGA Assemblies. Dr. Lau The International Journal of Microcircuits and Electronic Packaging, Volume 22, Number4, Fourth Quarter 1999 (ISSN ) 38

12 Characteristics and Reliability of No-Flow Underfills for Solder Bumped Flip Chip Assemblies served as one of the Associate Editors of the IEEE Transactions on Components, Packaging, and Manufacturing Technology and ASME Transactions, Journal of Electronic Packaging. He also served as general chairman, program chairman, and session chairman, and invited speaker of several IEEE, ASME, ASM, MRS, IMAPS, SEMI, NEPCON, and SMI International conferences. He received a few awards from ASME and IEEE for best papers and technical achievements, and ia an ASMe Fellow and an IEEE Fellow. He is listed in American Men and Women of Science and Who s Who in America. Dr. Lau received his Ph.D. Degree in Thoeretical and Applied Mechanics from the University of Illinois, a M.A.Sc. Degree in Structural Engineering from the University of British Columbia, a second M.S. Degree in Engineering Physics from the University of Wisconsin, and a third M.S. Degree in Management Science from Fairleigh Dickinson University. He also has a B.E. Degree in Civil Engineering from National Taiwan University. Chris Chang is currently working on material and process development of solder bumped Flip Chip packages with Express Packaging Systems, Inc., located in Palo Alto, California. He received his Ph.D. Degree in Materials Engineering from Auburn University, in Prior to attending Auburn University, he worked with Philips Electronic Building Elements Industries Ltd. for four years in new product and process development of electronics components. He is a member of the Phi Tau Phi Scholastic Honor society and IMAPS. He has authored and co-authored over 2 technical publications. Chih-Chiang (Arthur) Chen received a Ph.D. Degree in Physics from University of Oregon in Currently, he is an engineer in Express Packaging Systems, Inc. located in Palo Alto, California. His primary duty is for material characterization and process development for novel Flip Chip technology. He also involves in high-speed transmission line characterization. He has authored and co-authored over fifteen technical publications. The International Journal of Microcircuits and Electronic Packaging, Volume 22, Number 4, Fourth Quarter 1999 (ISSN ) 381