DIGITAL INTEGRATED CIRCUITS DESIGN BASED GENETIC ALGORITHM

Transcription

1 DIGITAL INTEGRATED CIRCUITS DESIGN BASED GENETIC ALGORITHM M.Sc. Ryadh A. Kadhm Unversty of Technology Department of Electromechancal Engneerng Baghdad - Iraq Abstract Genetc algorthms (GAs) are search and optmzaton technques that are used n engneerng applcatons lke systems optmzaton equaton solvng and electronc crcuts desgn and synthess. genetc algorthms are used n the desgn and synthess of fxed topology electronc crcuts. Two types of dgtal ntegrated crcuts are consdered, CMOS NAND crcut and CMOS NOR crcut. Several gate crcuts are desgned and syntheszed to obtan the best value of (W/ L) s for the transstors n the crcuts. These aspect ratos mnmze the requred crcut total chp area whle stll satsfyng the logc functon of the crcut wth mnmum devaton from the deal characterstcs. The resultant gate structures have less aspect rato than those resultng from the tradtonal desgn technques. الخالصة انخىارسييت انجي يت هي عبارة ع حق ياث بحث وإيجاد األفضم حسخخذو في كثيز ي انخطبيقاث انه ذسيت يثم ع هياث أيجاد األفضم حم ان عادالث انزياضيت وحص يى وحزكيب انذوائز االنكخزو يت. اسخخذيج انخىارسييت انجي يت في حص يى وحزكيب انذوائز اإلنكخزو يت و حى دراست ىعا ي انذوائز اإلنكخزو يت: دائزة CMOS NAND ودائزة.CMOC NOR حى حص يى و حزكيب عذة دوائز بىاباث نهحصىل عهى أفضم قيى ن (W/L) نهخزا شسخىراث في انذوائز. إ سب االسخطانت هذ حقهم يساحت انذائزة انكهيت ان طهىبت عهى انزقاقت بي ا حبقى ححقق انذانت ان طقيت ان طهىبت ي انذائزة بأقم ا حزاف ع انخصائص ان ثانيت. إ حزاكيب انبىاباث ان احجت ح خهك سب اسخطانت اقم ي حهك ان احجت ي أسانيب انخص يى انخقهيذيت. 38

2 1. Introducton In ths paper, the desgn and synthess of a class of dgtal ntegrated crcut usng Genetc Algorthms are presented. The desgn ncludes the desgn and realzaton of CMOS NAND and NOR crcuts. The desgn nvolves mnmzng certan parameters and satsfes the requred specfed characterstc. The realzed crcuts are smulated usng MATLAB, and compared these results wth standard desgn [1]. The prncple the Genetc Algorthm program should obtan the best values of the four aspect rato (W/L) 1 and (W/L) 4. snce the best values of the aspect rato mean mnmum chp area requred for fabrcaton. 2. Genetc Algorthm n Electronc Genetc algorthms are search algorthms based on the mechancs of natural selecton and natural genetcs. In GAs, the search s dvded nto generatons each generaton conssts of a number of ndvduals and each ndvdual descrbes the problem parameters that should be optmzed [2]. The man advantage of GAs over tradtonal optmzaton technques s that they are used n stuatons n whch no analytcal formulaton can be found for the mathematcal descrpton of the problem [3,4]. One of the relatvely new and mportant applcatons for Genetc Algorthms GAs s the desgn and synthess of electronc crcuts [5]. Ths applcaton suts GAs very much because desgnng electronc crcuts s a problem that nvolves optmzng a very large number of parameters. For example to desgn a flter or an Op Amp we need to specfy the values of tens of elements lke resstor, capactors, the parameters of the transstors and dodes n addton to determnng the way these elements are connected together. To reduce the cost of the desgn, one has to reduce the number of components (n the case of dscrete elements mplementaton) and ther (n the case of mplementng the crcut usng ICs), and at the same tme obtan good performance regardng the frequency and phase response for the flter and the gan, bandwdth, slew rate, and other parameters for the Op Amp [6], response tmes, fan n, and fan out n the case of dgtal crcuts. Snce solvng ths problem usng tradtonal maxmzng and mnmzng technques s almost mpossble, GAs arses as the best soluton. The use of genetc algorthms n electroncs s very mportant now as the electronc ndustry s evolvng and almost all crcut desgn becomng automated. 39

3 The man reason why Genetc Algorthms are very successful n electroncs s that most electronc system desgn tasks deal wth nonlnear equatons that usually not sutable to be dealt wth usng tradtonal technques. Takng the transstor for example, each transstor has a nonlnear relaton between voltage and current and usually ths relaton s dfferent n regons of operaton [7]. For example, the equaton s dfferent n the actve regon from the one n the saturaton regon. The tradtonal desgn technques wll not be systematc n these cases and wll rely manly on tral and error prncple. The man ssue n GAs n electronc crcut desgn s that how the chromosome wll descrbe the crcut. The desgn starts by defnng the parameters for encodng n the chromosomes. These parameters determne the crcut behavor. For example a certan desgn contans four aspect rato then the chromosome should nclude the values of all the four parameters. The number of bts used for each parameter s determned based on the acceptable range for that parameter and the resoluton,.e. the ncrement between two consecutve values. 3. Chromosome representaton In Genetc algorthms (GAs), the search s dvded n to generatons each generaton conssts of a number of chromosomes and each chromosomes descrbes the problem parameters that should be optmzed. Theses ndvduals are called chromosomes, a tem borrowed from bologcal genetcs [8]. The chromosomes descrbes the problem parameters by a specfc mappng desgned by the programmer. usually the chromosome encodes the nformaton of these parameters usng bnary encodng (t s most common way of encodng due to smplcty n mplementaton and ablty to encode all types of parameters). An example of how the chromosome encodes parameters s how n fgure below Parameter 1 Parameter 2 Parameter n Notce that the parameters should not have the same number of bts each. 40

4 The program structure s explaned n the followng flow chart. Start Defnng the basc varables Intalzaton of the frst generaton based on the values of the no. of bts per chromosome and the total no.of chromosome per generaton Computng the ftness for all chromosomes Selectng chromosomes based on ther values Performng crossover Performng mutaton Is stoppng Yes No End Increment generaton number 41

5 4. Desgn and Smulaton of Dgtal Integrated Crcut Based on Genetc Algorthm Genetc Algorthm s employed here to mnmze the chp area requred for fabrcaton. A CMOS logc NAND crcut n fg.(1) s taken as an llustratve example. It consst of four transstors(2n and 2p). Therefore the Genetc Algorthm program should obtan the best values of the four aspect rato (W/L) 1 and (W/L) 4. The mnmzaton of these aspect rato s very mportant factor for reducng the chp area. The total chp area whch s computed as n equaton (1) below [8]. Total chp Area n 1 W L (1) Where: W and L are the th wdth and length of the transstors respectvely and n s the total number of transstors n the crcut. Snce L s consdered unty (the mnmum length that can be fabrcated on the chp), the value of W/L s usually consdered the same as W L [8] and the area s: Area n 1 W L (2) Ths area s measured n unts of L 2. For example f L s 1 m, then the area s measured n unt of 2 m. Snce the mnmzaton of the total area s gven by: W W W W Area ( ) 1 ( ) 2 ( ) 3 ( ) 4 (3) L L L L where: W ( ) s the aspect rato of the th transstor. L And the correct operaton as a NAND crcut s the two factors that were used to compute the ftness of each chromosome. The correct operaton s measured usng the voltage error factor. Ths voltage error s the sum of error between deal output and real output for varous nput values for V A and V B. The followng equaton was used to compute the ftness [8]. 42

6 1 1 ftness (4) voltage error area The ftness computaton functon wll frst decode the chromosomes to get the parameters to be optmzed. Because our goal s mnmzaton of total chp area, these parameters are only the set of aspect rato of the transstors because all other technologcal, parameters n the transstors are fxed lke n,, etc. The ranges of possble values for (W/L) are taken to be 0.1to100 wth a step sze of 0.1. After decodng the values of ( The normalzaton s done by dvdng the set of ( W / L ), these values are normalzed so that the mnmum s 1. W / L ) by the mnmum aspect rato. The range descrbed above needs 10 bts for each (W/L). So the chromosome length wll be 10 n. where n s the number of transstors n the crcut. Table (1) shows the last generaton value of these parameters. Table (1) the CMOS logc NAND best values parameter Values of GAs desgn Values of Standard desgn (W/L) (W/L) (W/L) (W/L) Area Voltage error From the above table t can be seen that the realzed CMOS NAND crcut has mnmum area and voltage error compared wth that obtaned by the desgn found n [1]. The smulated NAND crcut response shown n fg.(2) s obtaned usng MATLAB package. 43

7 V DD V DD A T4 B T3 V out B T2 V X A T1 Fg. (1) A CMOS NAND Crcut Fg. (2) The NAND Crcut Response to nput values of V A and V B. 44

8 Another example s also nvestgated a CMOS logc NOR crcut type s desgned usng the same procedure. It also conssts of four transstors (2n and 2p) as shown n fg.(3). B T3 V X A T4 A B T1 T2 V out Fg. (3) A CMOS NOR Crcut Table (2) shows the last generaton values of these parameters. Table (2) the CMOS logc NOR best values parameter Values of AGs desgn Values of Standard desgn (W/L) (W/L) (W/L) (W/L) Area Voltage error From the above table t can be seen that the realzed CMOC NOR crcut has mnmum area and voltage error compared wth that obtaned by the desgn found n [1]. Besde that the NOR crcut response s preserved as shown n fg.(4). 45

9 Fg. (4) The NOR Crcut Response to nput values of V A and V B. It can be seen from the result obtaned from GAs, that mnmum chp area can be acheved. To prove ths, a compresson between standard desgn method and GAs s made. Table (3) presents the results obtaned usng the Genetc Algorthm program and a standard desgn lke tradtonal CMOS gates gven n [1]. The comparson states clearly that GAs results are much better n achevng compromse between the total area and the voltage error for the NAND and NOR crcuts than the desgn found n [1]. Table (3) Comparson between GAs Desgn and the Standard Desgn NAND NOR GA desgn Standard desgn GA desgn Standard desgn (W/L) (W/L) (W/L) (W/L) Area Voltage error

10 4. Conclusons Ths paper s concerned wth desgn and realzaton dgtal ntegrated crcuts based on usng genetc algorthm concept. The man objectve of the desgn method for ths types s the mnmzaton of the chp area requred for fabrcaton. In dgtal IC the chp area s determned by transstors aspect rato, ths s then the functon of ths mnmzaton procedure. Genetc algorthms are realzed to mnmze the chp area requred whle sustanng the other performances such as frequency characterstc, transfer curve, etc'. To conclude the objectves of ths work the followng ponts are presented. GAs s n general more sutable to the problem of electronc crcuts desgn and synthess than a tradtonal technque lke Newton-Raphson method that works on approxmate and tral and error solutons. The advantage of GAs over tradtonal technques s that t s more sutable for complcated structure..e. large set of equatons wth larger number of parameters, nonlneartes and nonsystematc equatons. The GAs programs should be desgned n a very flexble manner especally when the program deals wth a complcated problem and the executon tme s relatvely long (n ours). Flexblty ncludes: 1. Storng the results after each generaton. 2. Stoppng the program and resumng ts executon. 3. Montorng the program status by observng as much amount of detals as possble whle the program s runnng. 47

11 REFERENCES [1]. Ken. Martn, Dgtal Integrated Crcut Desgn, Oxford Unversty Press [2]. Melane M., An Introducton to Genetc Algorthms, Massachusetts Insttute of technology, [3]. Goldberg D. E., Genetc Algorthms n Search, Optmzaton and Machne Learnng, Addson Wesley Publshng Company, Inc., [4]. James B. Grmbleby, hybrd Genetc Algorthms For Analogue Network Synthess, IEE Conference Publcaton, Vol.2491, No. 446, PP , [5]. Jason D. Lohn, A Parallel genetc Algorthm For Automated Electronc crcut Desgn, IEE Trans. On Evolutonary Computaton, Vol.3, No.3, PP , [6]. Kenneth V. Noren & John E. Ross, Analog Crcut Desgn Usng genetc Algorthms, Scentfc Amercan, PP66-72, [7]. Navd Azz, Automated Analog crcut Desgn Usng genetc Algorthms, Communcatons of the ACM, Vol.42, No.4, PP 71-9, [8]. Jacob Mllman & Arvn Grabel, Mcroelectroncs second Edton, Mc Graw- Hll,