36V, 2 A IQ, Peak 200mA Low Dropout Voltage Linear Regulator

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1 36V, 2 A IQ, Peak 2mA Low Dropout Voltage Linear Regulator General Description The RT969 is a low-dropout (LDO) voltage regulators with enable function offering the benefits of high input voltage, low-dropout voltage, low-power consumption, and miniaturized packaging. The features of low quiescent current as low as 2 A and zero disable current is ideal for powering the battery equipment to a longer service life. The RT969 is stable with the ceramic output capacitor over its wide input range from 3.5V to 36V and the entire range of output load current. Applications Portable, Battery Powered Equipments Extra Low Voltage Microcontrollers Notebook Computers Marking Information For marking information, contact our sales representative directly or through a Richtek distributor located in your area. Note : Richtek products are : RoHS compliant and compatible with the current requirements of IPC/JEDEC J-STD-2. Suitable for use in SnPb or Pb-free soldering processes. Features 2 A Ground Current at no Load ±2% Output Accuracy 1mA Continuous Output Current Zero Disable Current Maximum Operating Input Voltage 36V Dropout Voltage:.2V at 1mA/ VIN 5V Support Fixed Output Voltage 2.5V, 3V, 3.3V, 5V, 9V, 12V Stable with Ceramic or Tantalum Capacitor Current Limit Protection Over-Temperature Protection RoHS Compliant and Halogen Free Ordering Information RT969- Package Type SP : SOP-8 (Exposed Pad-Option 1) B : SOT-23-5 X5 : SOT-89-5 QU : UDFN-6L 1.6x1.6 (U-type) Lead Plating System G : Green (Halogen Free and Pb Free) Output Voltage 25 : 2.5V 3 : 3V 33 : 3.3V 5 : 5V 9: 9V C: 12V Special Request: Any Voltage between 2.5V and 12V under specific business agreement Simplified Application Circuit RT969 V CC VOUT V OUT C IN GND C OUT DS969-9 November

2 GND RT969 Pin Configuration (TOP VIEW) VOUT NC NC VOUT NC GND GND NC NC GND NC NC VOUT GND NC VOUT GND SOP-8 (Exposed Pad) SOT-23-5 SOT-89-5 UDFN-6L 1.6x1.6 Functional Pin Description SOP-8 (Exposed Pad) Pin No. SOT-23-5 SOT-89-5 UDFN-6L 1.6x1.6 Pin Name Pin Function Supply voltage input. 2, 4, 5, , 5 NC No internal connection VOUT Output of the regulator. 7, 9 (Exposed Pad) 2 2 6, 7 (Exposed Pad) GND Ground. The exposed pad must be soldered to a large PCB and connected to GND for maximum thermal dissipation Enable control input. DS969-9 November 218 2

3 Functional Block Diagram VOUT Current/Thermal Sense GND - + R1 R2 Band gap Reference Operation Basic Operation The RT969 is a high input voltage linear regulator designed especially for low external component systems. The input voltage range is from 3.5V to 36V. The minimum required output capacitance for stable operation is 1 F effective capacitance after consideration of the temperature and voltage coefficient of the capacitor. Output Transistor The RT969 builds in a P-MOSFET output transistor which provides a low switch-on resistance for low dropout voltage applications. Error Amplifier The Error Amplifier compares the internal reference voltage with the output feedback voltage from the internal divider, and controls the Gate voltage of P-MOSFET to support good line regulation and load regulation at output voltage. Enable The RT969 delivers the output power when it is set to enable state. When it works in disable state, there is no output power and the operation quiescent current is zero. Current Limit Protection The RT969 provides current limit function to prevent the device from damages during over-load or shorted-circuit conditions. This current is detected by an internal sensing transistor. Over-Temperature Protection The over-temperature protection function turns off the P-MOSFET when the junction temperature exceeds 15 C (typ.) and the output current exceeds 4mA. Once the junction temperature cools down by approximately 2 C, the regulator automatically resumes operation. DS969-9 November

4 Absolute Maximum Ratings (Note 1), to GND V to 4V VOUT to V to.3v VOUT to GND RT969-9/RT969-C V to 15V RT969-25/RT969-3/RT969-33/RT V to 6V Power Dissipation, TA = 25 C SOP-8 (Exposed Pad) W SOT W SOT W UDFN-6L 1.6x W Package Thermal Resistance (Note 2) SOP-8 (Exposed Pad), JA C/W SOP-8 (Exposed Pad), JC C/W SOT-23-5, JA C/W SOT-23-5, JC C/W SOT-89-5, JA C/W SOT-89-5, JC C/W UDFN-6L 1.6x1.6, JA C/W UDFN-6L 1.6x1.6, JC C/W Lead Temperature (Soldering, 1 sec.) C Junction Temperature C Storage Temperature Range C to 15 C ESD Susceptibility (Note 3) HBM (Human Body Model) kV Recommended Operating Conditions (Note 4) Supply Input Voltage V to 36V Junction Temperature Range C to 125 C Ambient Temperature Range C to 85 C Electrical Characteristics (CIN = 1 F, TA = 25 C, for each LDO unless otherwise specified) Parameter Symbol Test Conditions Min Typ Max Unit Supply Voltage V Output Voltage Range VOUT V DC Output Accuracy VOUT ILOAD = 1mA % Dropout Voltage VDROP ILOAD = 1mA, > 5V V DS969-9 November 218 4

5 Parameter Symbol Test Conditions Min Typ Max Unit ILOAD = ma, VOUT 5.5V A Consumption Current IQ ILOAD = ma, VOUT > 5.5V, =15V A Shutdown Current V = V A Shutdown Leakage Current V = V, VOUT = V A Input Current I V = 36V A Line Regulation VLINE ILOAD = 1mA, VOUT +1 < < 36V, VOUT 3.3V ILOAD = 1mA, VOUT +1 < < 36V, VOUT 3.3V % Load Regulation VLOAD ma < ILOAD < 1mA % Output Current Limit ILIM VOUT =.5 x VOUT(normal) ma Enable Input Voltage Logic-High VIH Logic-Low VIL V Thermal Shutdown Temperature TSD ILOAD = 3mA C Thermal Shutdown Hysteresis TSD C Note 1. Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions may affect device reliability. Note 2. JA is measured at T A = 25 C on a high effective thermal conductivity four-layer test board per JEDEC JC is measured at the exposed pad of the package. Note 3. Devices are ESD sensitive. Handling precaution is recommended. Note 4. The device is not guaranteed to function outside its operating conditions. DS969-9 November

6 Typical Application Circuit RT969 V CC 3.5V to 36V VOUT V OUT C IN 1μF GND C OUT (Effective Capacitance 1μF) Note (1) : All the input and output capacitors are the suggested values, referring to the effective capacitances, subject to any de-rating effect, like a DC bias. DS969-9 November 218 6

7 Quiescent Current(μA) SHDN Leakage Current (na) Output Voltage (V) Quiescent Current (μa) Output Voltage (V) Output Voltage (V) RT969 Typical Operating Characteristics Output Voltage vs. Temperature V CC = 12V, Load =.1mA V CC = 12V, Load = 2mA V CC = 36V, Load =.1mA V CC = 36V, Load = 2mA 2.42 V OUT = 2.5V Temperature ( ) Output Voltage vs. Output Current V CC = 36V V CC = 24V V CC = 12V V OUT = 2.5V Output Current (ma) Output Voltage vs. Supply Voltage Load = ma Load =.1mA Load = 1mA Load = 2mA Quiescent Current vs. Supply Voltage V CC = 3.5V to 36V, V OUT = 2.5V Supply Voltage (V) 1.5 V OUT = 2.5V Supply Voltage (V) 6 Quiescent Current vs. Temperature 1 SHDN Input Leakage Current vs. V CC 5 V CC = 36V 8 4 V CC = 12V V OUT = 2.5V Temperature( ) 2 = V Supply Voltage (V) DS969-9 November

8 Current Limit (ma) Voltage (V) Dropout Voltage (V) SHDN Leakage Current ( A) Voltage (V) RT SHDN Leakage Input Current vs. Temp Enable Threshold vs. Supply Voltage High Threshold.8.6 V CC = 36V 1 Low Threshold V CC = 3.5V Temperature ( ) Supply Voltage (V) 2 Enable Threshold vs. Temperature.5 Dropout Voltage vs. Temperature 1.5 High Threshold.4 1 Low Threshold Vcc = 36V Temperature ( ).1 Load = 1mA Temperature ( ) Current Limit vs. Temperature V CC = 12V V CC = 36V V OUT = 2.5V Temperature ( C ) PSRR (db) PSRR vs. Frequency V OUT = 2.5V, I LOAD = 5mA V CC = 5V V CC = 12V Frequency (Hz ) DS969-9 November 218 8

9 35 Ground Current vs. Load Current 5. Dropout Voltage vs. Output Current GND Current (ua) 25 2 Rising, T A = 125 C 15 Rising, T A = 25 C 1 Rising, T A = 4 C Dropout Voltage (V) C 25 C 4 C V OUT = 5V Load Curremt (ma) Output Current (ma) Load Transient Response Load Transient Response V OUT_ac (5mV/Div) V OUT_ac (5mV/Div) I Load (5mA/Div) I Load (5mA/Div) V CC = 12V, V OUT = 2.5V, I load = 1mA to 1mA V CC = 24V, V OUT = 2.5V, I load = 1mA to 1mA Time (25μs/Div) Time (25μs/Div) Load Transient Response Load Transient Response V OUT_ac (1mV/Div) V OUT_ac (1mV/Div) I Load (1mA/Div) V CC = 12V, V OUT = 2.5V, I Load = 1mA to 2mA I Load (5mA/Div) V CC = 12V, V OUT = 2.5V, I Load = 1mA to 1mA Time (25μs/Div) Time (1μs/Div) DS969-9 November

10 Line Transient Response Line Transient Response V OUT_ac (2mV/Div) V OUT_ac (2mV/Div) (5V/Div) V CC = 4.4V to 15V, V OUT = 2.5V, Load = 1mA (1V/Div) V CC = 3.5V to 36V, V OUT = 2.5V, Load = 1mA Time (1μs/Div) Time (1μs/Div) Power On from Power Off from (1V/Div) (2V/Div) (1V/Div) (2V/Div) V OUT (1V/Div) V OUT (1V/Div) I Load (5mA/Div) V CC = 24V, V OUT = 2.5V, Load = 1mA I Load (5mA/Div) V CC = 24V, V OUT = 2.5V, Load = 1mA Time (25μs/Div) Time (25μs/Div) DS969-9 November 218 1

11 Application Information Thermal Considerations For continuous operation, do not exceed absolute maximum junction temperature. The maximum power dissipation depends on the thermal resistance of the IC package, PCB layout, rate of surrounding airflow, and difference between junction and ambient temperature. The maximum power dissipation can be calculated by the following formula : PD(MAX) = (TJ(MAX) TA) / JA where T J(MAX) is the maximum junction temperature, TA is the ambient temperature, and JA is the junction to ambient thermal resistance. For recommended operating condition specifications, the maximum junction temperature is 125 C. The junction to ambient thermal resistance, JA, is layout dependent. For SOP-8 (Exposed Pad) packages, the thermal resistance, JA, is 3.6 C/W on a standard JEDEC 51-7 four-layer thermal test board. For SOT-23-5 package, the thermal resistance, JA, is C/W on a standard JEDEC 51-7 four-layer thermal test board. For SOT-89-5 package, the thermal resistance, JA, is C/W on a standard JEDEC 51-7 four-layer thermal test board. For UDFN-6L 1.6x1.6 package, the thermal resistance, JA, is 46.5 C/W on a standard JEDEC 51-7 four-layer thermal test board. The maximum power dissipation at TA = 25 C can be calculated by the following formula : The maximum power dissipation depends on the operating ambient temperature for fixed TJ(MAX) and thermal resistance, JA. The derating curve in Figure 1 allows the designer to see the effect of rising ambient temperature on the maximum power dissipation Maximum Power Dissipation (W) 1 4. Four-Layer PCB SOP-8 (Exposed Pad) 2.5 UDFN-6L 1.6x SOT SOT Ambient Temperature ( C) Figure 1. Derating Curve of Maximum Power Dissipation PD(MAX) = (125 C 25 C) / (3.6 C/W) = W for SOT-8 (Exposed Pad) package PD(MAX) = (125 C 25 C) / (218.1 C/W) =.4585W for SOT-23-5 package PD(MAX) = (125 C 25 C) / (113.9 C/W) =.8779W for SOT-89-5 package PD(MAX) = (125 C 25 C) / (46.5 C/W) = 2.15W for UDFN-6L 1.6x1.6 package DS969-9 November

12 Outline Dimension A H M EXPOSED THERMAL PAD (Bottom of Package) J Y X B F I D C Symbol Dimensions In Millimeters Dimensions In Inches Min Max Min Max A B C D F H I J M Option 1 Option 2 X Y X Y Lead SOP (Exposed Pad) Plastic Package DS969-9 November

13 Symbol Dimensions In Millimeters Dimensions In Inches Min Max Min Max A A B b C D e H L SOT-23-5 Surface Mount Package DS969-9 November

14 Symbol Dimensions In Millimeters Dimensions In Inches Min Max Min Max A b B b C C D D e H Lead SOT-89 Surface Mount Package DS969-9 November

15 Symbol Dimensions In Millimeters Dimensions In Inches Min. Max. Min. Max. A A A b D D E E e.5.2 L U-Type 6L DFN 1.6x1.6 Package Richtek Technology Corporation 14F, No. 8, Tai Yuen 1 st Street, Chupei City Hsinchu, Taiwan, R.O.C. Tel: (8863) Richtek products are sold by description only. Customers should obtain the latest relevant information and data sheets before placing orders and should verify that such information is current and complete. Richtek cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Richtek product. Information furnished by Richtek is believed to be accurate and reliable. However, no responsibility is assumed by Richtek or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Richtek or its subsidiaries. DS969-9 November