Backend Wafer Carrier Global Joint Guidance for 300 mm Semiconductor Factories

Transcription

1 Backend Wafer Carrier Global Joint Guidance for 300 mm Semiconductor Factories International SEMATECH Technology Transfer # A-ENG

2 SEMATECH and the SEMATECH logo are registered service marks of SEMATECH, Inc. International SEMATECH and the International SEMATECH logo are registered service marks of International SEMATECH, Inc., a wholly-owned subsidiary of SEMATECH, Inc. Product names and company names used in this publication are for identification purposes only and may be trademarks or service marks of their respective companies International SEMATECH, Inc.

3 Backend Wafer Carrier Global Joint Guidance for 300 mm Semiconductor Factories Technology Transfer # A-ENG International SEMATECH February 29, 2000 Abstract: This document was created by the International 300 mm Initiative (I300I) and Japan 300 mm Semiconductor Technology Group (J300E) consortia to provide joint consensus guidance for the semiconductor industry suppliers regarding expectations of member semiconductor device companies of these consortia for backend wafer carriers. This guidance extends the existing joint consensus between I300I and J300E on backend frame cassettes to cover backend wafer carriers. These guidelines are designed to ensure that the industry fully realizes potential 300 mm productivity benefits. Keywords: 300 mm Wafers, CIM, Wafer Carriers Approvals: Vivek Bakshi, Author Jackie Ferrell, Standards Program Manager Randy Goodall, Associate Director, Productivity & Infrastructure Laurie Modrey, Technical Information Transfer Team Leader

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5 INTERNATIONAL 300 mm INITIATIVE Japan 300mm Semiconductor Technology Conference / EIAJ (J300E) Backend Wafer Carrier Global Joint Guidance for 300 mm Semiconductor Factories I300I and J300E December 1999 Version 1.0 Page 1

6 TABLE OF CONTENTS TABLE OF CONTENTS... 2 PREFACE... 3 INTRODUCTION... 4 P U R P O S E... 4 HISTORY...5 DEFINITIONS... 6 REQUIREMENTS ON IC MANUFACTURERS... 7 MIGRATION TO LARGER WAFERS SIZES... 7 OPTIMIZATION... 8 GUIDELINES FOR SUPPLIERS GUIDELINES FOR BACKEND (BE) WAFER CARRIER EQUIPMENT CONFIGURATION GUIDELINES APPENDIX A - CROSS REFERENCE TABLES APPENDIX B - CONTACT INFORMATION J300E I300I Page 2

7 Preface December 1999 As the front-end manufacturing costs are controlled, the share of backend processing cost has become relatively more significant. These costs must be minimized by addressing the unique requirement of backend processing. Along with the logistical control and ergonomic requirements, product safety must also be comprehended. This document represents a consensus position between International SEMATECH and J300E on guidelines for backend wafer carriers. It identifies required and existing standards and guidelines. Additional guidelines resulting from the consensus will enable establishment of standards through SEMI processes. This effort represents excellent global cooperaton and will help in overall cost reduction for backend by both developing synergy with the work done in front-end and improving backend fab architecture and product logistics. Austin, Texas Ashwin Ghatalia Director International 300 mm Initiative The transition to 300mm wafers now underway affords the most significant opportunity in the history of the semiconductor industry to lower manufacturing costs. In order to succeed in 300mm conversion, accelerating standardization is indispensable to better manage complexity, minimize development time, and reduce risk and cost. In 1997, Global Joint Guidance (GJG) for 300mm Semiconductor Factories was released by collaboration with I300I. In December, 1998, Frame Cassette GJG in Backend was released to identify items to be standardized. This release covers GJG for backend wafer carrier. We hope that we can promote standardization activities throughout the industry, and that we can play a key role for establishing the new foundation for the semiconductor manufacturing. Tokyo, Japan Atsuyoshi Koike (Hitachi, Ltd.) Chairperson Japan 300mm Semiconductor Technology Conference/EIAJ Page 3

8 Introduction This document was assembled by the International 300 mm Initiative (I300I) and Japan 300 mm Semiconductor Technology Conference/EIAJ (J300E) consortia for the purpose of providing joint consensus guidelines for and to semiconductor industries and silicon suppliers. This guidance is limited to joint (agreed to) expectations the member semiconductor device companies of these consortia have on suppliers in the area of manufacturing equipment and support systems. Purpose MARKET and BUSINESS REQUIREMENTS REFERENCE Documents STANDARDS FULFILLMENT - Products Revenue IC FABS CONSENSUS GUIDANCE (RECOMMENDATIONS) IC COMPANY INTERNAL REQUIREMENTS RESPONSE - Equipment - Materials - Services Revenue USER SPEC SUPPLIERS Figure 1. Joint Guidance Target Page 4

9 History I300I Becomes part of International SEMATECH SEMICON JAPAN 1998 Backend GJG for Rev. 1.0 J300 Backend Wafer Cassette WG Formed June, 1998 J300 Reorganized as J300E IST Backend Study Group Internal Meeting 5/24/99 J300E Wafer Carrier Study Group Internal Meeting IST Backend SG Meetings IST and J300E FtF at SEMICON Kansai 1999 J300E Wafer Carrier Group Meeting IST and J300E Meetings (Video Conference) IST and J300E Wafer Carrier GJG SEMICON Japan 99 Figure 2. History of I300I and J300E Interactions for Backend Global Joint Guidance Page 5

10 Definitions The following key words are used in this document with very specific meanings: Requirements - Business drivers that determine what the device manufacturing companies must accomplish in their operations to meet cost and technology goals. Guidelines - Statements that define device companies intended and/or projected configurations and modes of operations for factories and equipment. Standards - Voluntary technical agreement between suppliers and customers to ensure compatibility and inter-operability of goods and services to reduce overall cost. Note 1: It is the responsibility of the user of this document to be aware of current version(s) of referenced SEMI Standards. Note 2: This document refers to certain preferred standards and options that support the required capabilities for 300 mm factories. Other standards and options may also exist. References - Other readily available documents and statements containing additional information regarding the subject. Does not necessarily imply authority of these documents and statements. Recommendations - Preferred approaches for design consideration, but supplier may propose equivalent or better design or approach. Note: This section is the same as the original Global Joint Guidance document published in July Page 6

11 Requirements on IC Manufacturers The next two sections describe the shared requirements on J300 and I300I IC manufacturers. These requirements are in terms of business drivers for IC manufacturers as defined above. They fall into several categories, but are primarily divided between what is required for IC manufacturers to migrate to larger wafer sizes and what is required to optimize the factory. Migration to Larger Wafers Sizes Historically, IC manufacturers have migrated to larger wafer sizes to gain productivity improvements. As they transition to larger silicon wafers, they must meet the following key requirements to receive the needed gain from the investment and strategic risks involved. 1. Decrease Cost/cm 2 For an IC manufacturer to remain continuously competitive, the cost per unit area of manufacturing semiconductor devices must decrease continuously. It is the expectation of all IC makers that a wafer size increase shall result in a reduction in cost/cm 2 of silicon. To achieve this, the equipment and factory costs should not increase as much as the wafer area increases, and the equipment throughput (or output) in wafers/hour should be equal to or greater than the previous wafer size generation. 2. Learn from Past Conversions 2.1. Early standardization reduces options which suppliers must develop and support. See Figure 3 below and Guidelines 1, 2, 3, 4, 9, 10. Cleanroom Cleanroom standards: Environment: Temp, humidity Equipment height Max weight, size Others.. Cleanroom walls interface stds Overhead Transport (OHT) interface standards Wafer & Carrier standards Exhaust interfaces & stds Process Equipment Chemical and Gas interfaces & stds Facilities & Hook-up stds Maintenance & spares stds Metrology Equipment Standards for safety countermeasures: (Gases, Chemicals, and Fire) Protection from Earthquake & Glitches i.e., power, exhaust, compressed air, process and cooling water, etc. Utility interfaces & stds ada a;;ldka addd ;ad adkd;da[ Interbay transport standards Stocker Lot ID standard Drains interface standards Intrabay Vehicle safety stds Operator interface to Equipment stds Intrabay Vehicle interfaces & standards Operator interface & stds to CIM systems Figure 3 How Standards Benefit Manufacturing Cleanroom floor interface stds Page 7

12 2.2. First 300 mm pilot line production equipment set should have full production level maturity. This eliminates the need for IC manufacturers to upgrade or replace equipment when going from 300 mm start-up phase to full volume production. 3. International Participation is Essential 3.1. Participation from the international IC semiconductor industry is essential in giving clear, uniform and global direction to equipment suppliers. This synergy will minimize the number of different options that equipment makers have to develop and test, reduce development cost and time, and provide equipment to the IC manufacturers at the right time. See Guideline 3. Optimization Every IC manufacturer must optimize various resources and costs according to their individual business direction or strategy. The principle of optimization applies at all levels; i.e., equipment, factory, business principles, etc. Therefore, the process of optimization demands balancing several parameters. This requires some parameters to be increased while others must be decreased, which forms a structure for the following requirements. Therefore, IC manufacturers must do the following: 4. Increase Investment Effectiveness 4.1. A fab shall be upgradeable to produce the next generation technology with minimum introduction of new equipment and with minimum impact to layout and material logistics Capital outlay shall be optimized with respect to increasing production capacity requirements and be commensurate with market growth during the ramp to full volume production. 5. Increase Equipment Utilization In general, IC manufacturers will desire to continually increase the equipment utilization and reduce processing delay that results from queuing in their factories to increase the return on the equipment and other factory resource investment. The key requirement is to maximize the factory productivity. This may require balancing the cost of ownership (COO) of constraint equipment against the equipment utilization of the non-constraint equipment. Therefore, these non-constraint equipment may not require additional buffering beyond the two standard load ports. See Figure 4 below. 6. Increase Uninterrupted Production The amount of factory output is generally proportional to the amount of uninterrupted production time. This is similar to equipment utilization in that the IC manufacturer will desire to maximize the investment placed in the equipment and factory. This can be accomplished when the factory is able to run with the highest production support systems and equipment reliability available. See Figure 4 below. Page 8

13 Time delay before 2nd lot starts Without Continuous Processing Lot 1 Lot 2 Lot 3 Lot 4 Time No time delay With Continuous Processing Lot 1 Lot 2 Lot 3 Lot 4 Lot 5 Improvement Time Figure 4. Equipment Output Improves When Idle Time is Eliminated 7. Increase Factory Output In a volume market, an IC manufacturer will need to produce as much good product as possible. The factory output required to meet the market demand is critical for a company to maintain profitability and market share. This is accomplished through meeting the following three requirements Increase Throughput Increase the quantity of wafers that can be processed through the factory in a given time period. See Guideline Increase Wafer Yield Increase the percentage of wafers that successfully complete the processing route Increase Die Yield Increase the percentage of good die produced on each wafer. See Guideline Increase Yield Learning The rate at which the factory acquires knowledge about the process/technology during the process development and ongoing problem solving must be increased to allow for faster increases in both yield and throughput. 9. Increase Control of Factory Logistics and Production Scheduling With the increased demand for IC products and the ever faster changes in the market place, a factory s speed and flexibility are key to meeting the market at the right time. For IC factories to accomplish this, they must have increased control over the operations (logistics) and production schedules. See Guidelines 5, Increase Die per Wafer Increased demand for IC products require IC manufacturers to produce greater quantities of product at a reduced cost while increasing the complexity of the chip. This increased complexity requires a larger die sizes at least initially. One of the largest leverages to accomplish both of these requirements is to increase the number of die that can be manufactured on a wafer. Page 9

14 11. Increase Worker Productivity and Product Safety See Guidelines 5, 11, Ergonomics The weight of twenty-five 300 mm diameter wafers plus a front opening unified pod (FOUP) carrier is approximately 8 kg. This is difficult for humans to repeatedly lift and carry. Because of this ergonomic limitation, 300 mm factories will require essentially automated or mechanized carrier handling Product Safety The value of twenty-five 300 mm diameter processed wafers could exceed $1,000,000 (U.S.). Because of this high value, 300 mm factories will require precision controlled and highly reliable automated carrier handling Factory Automation The technological solution to increasing productivity while addressing the above ergonomic issues is to provide an increase in factory automation both in wafer and carrier handling. 12. Decrease Time to Volume Production To meet the ever faster market changes and demands, a factory ramp-up time to full volume production must be decreased. 13. Decrease Equipment Installation / Start-up Time and Cost. To support faster factory ramps, equipment installation and start-up time must be decreased. 14. Decrease Operational Cost For an IC factory to maintain profitability, the ongoing operational cost must continue to decrease as the products market value continues to decline. See Guidelines 5, Decrease Inventory (work-in-process and final product) A factory must reduce its risks and liabilities associated with WIP inventory in the line and final product waiting at the backdoor. 16. Decrease Factory Footprint The footprint of a factory directly corresponds to several costs: i.e., building capital costs and associated depreciation, operational facilities costs in clean air supply, temperature and humidity control, etc. To control costs, the cleanroom space of a factory should be reduced as much as possible while maintaining a balance between demand for output and costs. This reduction can be realized by increasing the throughput of each equipment set while maintaining or reducing the footprint, allowing for more throughput per factory footprint. 17. Decrease Equipment Costs The cost of equipment, versus the equipment throughput, both in initial capital cost and operational costs, can directly impact the available profit a product can provide. These equipment costs must be reduced on a per-wafers-processed per hour basis. See Guidelines 9, 10. Page 10

15 18. Decrease Cost to Configure Equipment Flexibility is a key requirement for factories to maintain cost effectiveness. The cost to configure equipment to a variety of processing situations must be reduced to maintain this flexibility. See Guidelines 3, 9, Decrease Material Consumption To reduce the cost of IC manufacturing, the level of material (i.e., silicon, chemicals, gases, and liquids) consumed by the processing equipment must be continually reduced per wafers processed per hour. 20. Decrease Turn Around Time The time for a wafer to travel through and complete all process steps in a route depend on the individual processing time required at each equipment plus material logistics (e.g., scheduling, staging, handling, etc.) and equipment idle time. To optimize the use of equipment, people, and other resources and to reduce response time to the market and customers, this turnaround time must be continually decreased. 21. Decrease Lead Time from Order to Equipment Delivery The time for an equipment to arrive from the time it is ordered must be reduced in order to decrease the time it takes an IC manufacturer to ramp a factory to full production level. Equipment delivery time should also be reduced to less that the time it takes to build a factory. 22. Address Safety and Ergonomics IC manufacturers must provide a safe fab working environment. This includes providing equipment and procedures for operators and process and maintenance personnel that are engineered for safety and ergonomics. See Guideline Address Environmental Issues IC manufacturers must design factories and processes such that they do not impact the environment. This includes not only controlling, but continually reducing the amount of effluent and wastes released into the environment. Note: This section is the same as the original Global Joint Guidance document published in July Page 11

16 Guidelines for Suppliers The following sections list guidelines from IC manufacturers to semiconductor industrial and material suppliers. For each guideline, the relevant REQUIREMENTS on the IC manufacturers (listed in the previous section) are noted. These indicate the driving forces for the guideline. Related SEMI and other standards are listed under the STANDARDS heading. Additional information on the guideline topic is listed as REFERENCES. These refer principally to the Backend Global Joint Guidance for 300 mm semiconductor Factories (Frame cassette GJG) and the I300I Factory Guidelines. Guidelines for Backend (BE) Wafer Carrier 1. Wafer Carrier Capacity: Both 25 and 13 slot carriers will be used for Backend(BE) wafer carrier. The 13 slot wafer carrier will be the primary high volume carrier as mostly manual handling is expected at the back end. Only thirteen wafers carriers are expected to be handled by operators. A 25 capacity wafer carrier is an option available to IC manufacturers for increasing lot size. There is no requirement for a wafer carrier with less than 13 slot capacity. Equipment designs must allow cost-effective conversion of equipment from 13 to 25 slot carriers. REQUIREMENTS: 2.1. Early standardization STANDARDS: SEMI E1.9 REFERENCES: I300I Factory Guidelines Rev 3, Section 7.1 cassette GJG) Rev 1, Guideline for Suppliers Section 1 2. Wafer Carrier Configuration: Wafers will remain in the horizontal orientation during transport, equipment loading and storage. Wafer carriers have a 10 mm pitch between slots Thinned Wafer Carriers (option) Wafer carriers and end effectors for thinned wafers must support the wafer in a way that minimizes wafer stress, sag, and breakage while ensuring that wafers do not touch each other. REQUIREMENTS: 2.1. Early standardization STANDARDS: SEMI E1.9 REFERENCES: I300I Factory Guidelines Rev 3, Section 7.2 cassette GJG) Rev 1, Guideline for Suppliers Section 2 3. Wafer Carrier Type: The wafer carrier will be an open carrier or a FOUP (front-opening unified pod that is compliant with SEMI standards E47.1). The open carrier will be a carrier with manual handling features, but may be a carrier with automation features that match the FOUP The wafer carrier will be a FOUP or an open carrier. The open carrier will reduce footprint and weight. REQUIREMENTS: 2.1. Early standardization, 3. International participation is essential, 18. Decrease cost to configure equipment STANDARDS: SEMI E47.1 REFERENCES: I300I Factory Guidelines Rev 3, Section 7.3 cassette GJG) Rev 1, Guideline for Suppliers Section 3.1 Page 12

17 3.2. The open carrier shall have a passive wafer restraint. This device holds the wafers in the carrier during transport and allows the wafers to be removed while the carrier is on the load port. The restraint is passive which means that it s activation and deactivation occur without intervention from operator or the material handling systems. REQUIREMENTS: 2.1. Early standardization, 3. International participation is essential, 18. Decrease cost to configure equipment STANDARDS: SEMI E47.1 REFERENCES: I300I Factory Guidelines Rev 3, Section 7.3 cassette GJG) Rev 1, Guideline for Suppliers Section To protect the wafers or keep wafers for short term storage, the open carrier may have front and rear cover. REQUIREMENTS: 2.1. Early standardization, 3. International participation is essential, 7.3. Increase die yield, 18. Decrease cost to configure equipment STANDARDS: SEMI E47.1 REFERENCES: I300I Factory Guidelines Rev 3, Section 7.3 cassette GJG) Rev 1, Guideline for Suppliers Section The wafer carrier may have optional feature to allow for two carriers to be stacked on top of each other. But for non-empty 25 wafers FOUP, the stacking must be avoided. REQUIREMENTS: 2.1. Early standardization, 3. International participation is essential, 18. Decrease cost to configure equipment STANDARDS: SEMI E47.1 REFERENCES: I300I Factory Guidelines Rev 3, Section 7.3 cassette GJG) Rev 1, Guideline for Suppliers Section The open carrier shall have FOUP compatible features that dimensionally match the E47.1 standard as occasion demands. This compatibility will allow for the use of standard wafer cassette transport and storage solutions for wafer carriers. REQUIREMENTS: 2.1. Early standardization, 3. International participation is essential, 18. Decrease cost to configure equipment STANDARDS: SEMI E1.9, SEMI E15.1, SEMI E47.1, SEMI E57, SEMI S8 REFERENCES: I300I Factory Guidelines Rev 3, Section 7.3 cassette GJG) Rev 1, Guideline for Suppliers Section Kinematic coupling mating features are required. Lead-in may be different from the E47.1 standard to ease manual placement The robotic handling flange is optional Bottom rail surfaces are required Side human handles are optional. See figure Sensing pads are required. But it doesn t depend upon having or not having a sensing function of equipment. Page 13

18 See figure 5-1 B.D.P Robotic handling flange (SEMI E1.9, E47.1) Stacking Human handle (SEMI S8) Bottom Rails (SEMI E47.1) H.D.P Sensing pads (SEMI E1.9, E47.1) Kinematic coupling / pin (SEMI E-1.9, E15.1, E47.1, E57) Figure 5-1. Wafer Carrier Features Conveyor Rails (SEMI E15.1) Rear Cover Robotic handling flange Front Cover Optional Human Handle Figure 5-2. Optional Human Handle Front and Rear cover, Robotic handling flange Page 14

19 Equipment Configuration Guidelines 4. Wafer Carrier Load Port: Wafer carrier load ports are required to comply to SEMI E15.1. Wafer carrier load ports may require increased load port spacing(dimension S in SEMI E15.1). The clearance dimension of C1 must be maintained. Wafer carrier load ports must allow for costeffective reconfiguration to handle either 13 or 25 capacity carriers. Function for simultaneous use of 13 and 25 capacity carrier is optional only for open carrier Wafer carrier load ports may have an optional pair of conveyor rails that mate with the carrier bottom rails. The conveyor rails must raise above the kinematic pins to a height suitable for transfer with a material transport device. The conveyor rails must lower below the kinematic pins to a depth that allows the carrier to mate with the kinematic pins and comply with the dimensions in E15.1. REQUIREMENTS: 2.1. Early standardization STANDARDS: SEMI E15.1, SEMI E57 REFERENCES: I300I Factory Guidelines Rev 3, Section 7.4 cassette GJG) Rev 1, Guideline for Suppliers Section 4 See figure 6 Figure 6. Load Port (SEMI E15.1) 5. Support for Overhead Transport: Wafer carrier load ports must be capable of receiving overhead wafer carrier delivery, when using OHT, per SEMI E15.1. All wafer carrier load ports must be capable of accepting delivery from floor based (manual or automated) or overhead transport (OHT) systems. IC manufacturers use floor-based (mainly manual) systems, but may Page 15

20 use demonstrating high reliability OHT systems. When using OHT, vertical easement for OHT system (overhead hoist track and vehicle) must be designed into the equipment. In that case, load port(s) must conform to E15.1 clearance up to ceiling. STANDARDS: SEMI E15.1, SEMI E47.1, SEMI E57 REFERENCES: I300I Factory Guidelines Rev 3, Section 7.5 cassette GJG) Rev 1, Guideline for Suppliers Section 5 See figure 7 OHT AGV or PGV carrier AGV: Automatic Guided Vehicle PGV: Person Guided vehicle OHT: Overhead Transport Overhead Hoist Transport Figure 7. Support for Overhead Transport 6. Continuous Processing Using Buffering: Buffering may be optional for backend processing equipment. REQUIREMENTS: 2.1. Early standardization STANDARDS: SEMI E15.1, SEMI E57 REFERENCES: I300I Factory Guidelines Rev 3, Section 7.6 cassette GJG) Rev 1, Guideline for Suppliers Section 6 7. Integrated Minienvironment: Minienvironments may be optional for backend processing equipment. REFERENCES: I300I Factory Guidelines Rev 3, Section 7.7 cassette GJG) Rev 1, Guideline for Suppliers Section 7 8. Slot/Carrier Integrity: Equipment must have the function of loading wafers to and from the same slot in the same carrier to maintain slot-to-slot integrity, to reduce the number and footprint of equipment load ports, and to simplify wafer and lot tracking. Carrier integrity is not required Page 16

21 for tools designed to have different input and output carriers. REQUIREMENTS: 9. Increase control of factory logistics and production scheduling REFERENCES: I300I Factory Guidelines Rev 3, Section 7.8 cassette GJG) Rev 1, Guideline for Suppliers Section 8 See figure 8 Figure 8. Slot/Carrier Integrity 9. Single-Side Load ports: Equipment for automated systems must be designed with primary load ports on one side of the equipment, per SEMI REQUIREMENTS: 2.1. Early standardization, 17. Decrease equipment costs, 18. Decrease cost to configure equipment STANDARDS: SEMI E15.1 REFERENCES: I300I Factory Guidelines Rev 3, Section 7.9 cassette GJG) Rev 1, Guideline for Suppliers Section 9 See figure Straight-Line Alignment of Load Ports: Equipment with more than one load port for automated systems must be designed for straight-line mounting to align the carrier load ports from equipment to equipment. The dimension D corresponds to SEMI The load face plane must be identified by a mark or label on load ports to allow for easy alignment of equipment. REQUIREMENTS: 2.1. Early standardization, 17. Decrease equipment costs, 18. Decrease cost to configure equipment STANDARDS: SEMI E15.1 REFERENCES: I300I Factory Guidelines Rev 3, Section 7.10 cassette GJG) Rev 1, Guideline for Suppliers Section 10 See figure 9 Page 17

22 D Figure 9. Single-Side Load Ports and Straight-Line Alignment of Load Ports 11. User Interface Location: In case of using automated systems, the user interface (i.e.,operator controls and display) must be in a location that minimizes the interference between the operator and PGV or automated delivery systems. The primary user interface must be located at the front of the equipment. The user interface must either be in a location or be movable to a location that does not interfere with PGV or automated delivery. REQUIREMENTS: 11. Ergonomics, 22. Address safety and ergonomics REFERENCES: I300I Factory Guidelines Rev 3, Section 7.11 cassette GJG) Rev 1, Guideline for Suppliers Section 11 See figure 10 Equipment Load Port U.I. PGV Figure 10. User Interface Location 12. Cart Docking Interface: A standardized docking port for manual carts must be available at equipment load ports. (300 mm Cart to E15.1 Docking Interface Port, SEMI E64). Support for a Page 18

23 person guided vehicle (PGV) docking interface is required. PGV s are likely to be the primary intrabay transport system. REQUIREMENTS: 2.1. Early standardization STANDARDS: SEMI E15.1, SEMI E64 REFERENCES: I300I Factory Guidelines Rev 3, Section 7.14 cassette GJG) Rev 1, Guideline for Suppliers Section 12 See figure 11 E15.1 LOAD PORT Figure 11. Cart Docking Interface Page 19

24 Appendix A - Cross Reference Tables GJG Guideline GJG Comparison with SEMI Standards Activities SEMI SEMI SEMI SEMI SEMI E1.9 E15.1 E47.1 E57 E64 SEMI S8 1. Wafer Carrier Capacity á 2. Wafer Carrier Configuration á 3. Wafer Carrier Type á á á á á 4. Wafer Carrier Load Port á á 5. Overhead Transport á á á 6. Buffering á á 7. Minienvironment 8. Slot / Carrier Integrity 9. Single Sided Load Port á 10. Straight Line Alignment á 11. User Interface Location 12. Cart Docking Interface á á References: SEMI E1.9 SEMI E15.1 SEMI E47.1 SEMI E57 SEMI E64 SEMI S8 Provisional Mechanical Specification for Cassettes Used to Transport and Store 300mm Wafers Provisional Specification for 300mm Tool Load Port Provisional Mechanical Specification for Boxes and Pods Used to Transport and Store 300mm Wafers Provisional Mechanical Specification for Kinematic Couplings Used to Align and Support 300mm Wafer Carriers Provisional Specification for 300mm Cart to SEMI E15.1 Docking Interface Port Guidelines for Ergonomics Page 20

25 GJG Comparison with Requirements On IC Manufacturers Requirements on IC Manufacturers GJG Guideline Wafer Carrier Capacity á 2. Wafer Carrier Configuration á 3. Wafer Carrier Type á á á 3.3 á 4. Wafer Carrier Load Port á 5. Overhead Transport 6. Buffering á 7. Minienvironment 8. Slot / Carrier Integrity á 9. Single Sided Load Port á á á 10. Straight Line Alignment á á á 11. User Interface Location á á 12. Cart Docking Interface á GJG Comparison with I300I Factory Guidelines and Backend Global Joint Guidance for 300 mm semiconductor Factories (Frame cassette GJG) Requirements GJG Guideline I300I Factory Guidelines Ver. 3 Backend Global Joint Guidance for 300 mm semiconductor Factories (Frame cassette GJG) Rev 1, Guideline for Suppliers 1. Wafer Carrier Capacity Section 7.1 Section 1 2. Wafer Carrier Configuration Section 7.2 Section 2 3. Wafer Carrier Type Section 7.3 Section 3 4. Wafer Carrier Load Port Section 7.4 Section 4 5. Overhead Transport Section 7.5 Section 5 6. Buffering Section 7.6 Section 6 7. Minienvironment Section 7.7 Section 7 8. Slot / Carrier Integrity Section 7.8 Section 8 9. Single Sided Load Port Section 7.9 Section Straight Line Alignment Section 7.10 Section User Interface Location Section 7.11 Section Cart Docking Interface Section 7.14 Section 12 Page 21

26 Appendix B - Contact Information For more information about this document or referenced material, please contact the following: J300E Address: Electronic Industries Association of Japan (EIAJ) Marunouchi, Chiyoda-ku Tokyo 100 Japan Phone: Fax: Name Company Phone Noboru Furukawa FUJITSU nfuruka@tes.mie.ed.fujitsu.co.jp Kouetsu Kameda TOSHIBA kouetsu.kameda@toshiba.co.jp Akihito Tanabe NEC a-tana@lsi.nec.co.jp Akihiko Ariga HITACHI ariga@cm.musashi.hitachi.co.jp Osamu Takabatake MITSUBISHI takabatk@lsi.melco.co.jp Tomoyuki Nakayama MATSUSHITA t_nakayama@sel.mec.mei.co.jp I300I Address: International 300 mm Initiative 2706 Montopolis Drive Austin, Texas Phone: (512) Fax: (512) Name Company Phone Vivek Bakshi I300I vivek.bakshi@intl.sematech.org Ashwin Ghatalia I300I ashwin.ghatalia@intl.sematech.org John Belanger Intel john.m.belanger@intel.com B J Barron Texas Instruments (972) bjbarron@ti.com Ron Mendelson IBM (802) rmendelson@vnet.ibm.com Semiconductor Equipment and Materials International (SEMI) W. Murray Bullis, Ph. D. Vice President of International Standards Phone: (415) Fax: (415) SEMI - Japan Naoko Tani Vice President, Standards, SEMI Japan Phone Fax: Page 22

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28 International SEMATECH Technology Transfer 2706 Montopolis Drive Austin, TX