Recent Trends of Package Warpage and Measurement Metrologies (inemi Warpage Characterization Project Phase 3)

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1 Recent Trends of Package Warpage and Measurement Metrologies (inemi Warpage Characterization Project Phase 3) Wei Keat Loh 1, Ron Kulterman 2, Haley Fu 3, Masahiro Tsuriya 3 1 Intel Technology Sdn. Bhd. Penang, Malaysia 2 Flextronics, Austin, Texas, USA 3 inemi (International Electronics Manufacturing Initiative), China, Japan 1

2 Content Motivation Range of packages considered Dynamic package warpage characteristic PoP PoP Memory SiP FCBGA FCBGA with Lids PBGA Summary 2

3 Motivations Packaging technology is aggressively evolving to meet new user demands and requirements. Thin and cool device Energy efficient & Highly integrated SOC/SIP/SOP High package and board assembly yield Dynamic warpage characteristic of electronic package is critical for seamless board assembly. Hence this effort is to understand the kind of dynamic warpage demonstrated in industry. Board Warpage Characteristic Package Warpage Characteristic Board Assembly Parameters Material selections: solder paste, flux 3

4 Package Technology Dynamic Warpage Measurement Generous Donation of Samples from Industry Package Type Design Overmold TMV Expose Die TMV Bare Die PoP Schematic drawing of package construction Need more contribution from industry PoP Interposer PoP Pre-stack PoP package MCeP PoP Memories SiP FBGA FCBGA FCBGA with Lid PBGA Overmold Multiple Chip Package (MCP) Overmold single die package with single or multi dies Organic and ceramic substrate Ranges 4

5 Package on Package (POP) Warpage Characteristics (Phase 2) POP Package dynamic warpage varies in behavior and form. Majority are convex at room temperature and transition to concave at high temperature. The construction of the package and the material used can modulate the dynamic warpage behavior. All these samples have low warpage within the allowable guideline stipulated in Jedec. 5

6 POP Memory Warapge Characteristics POP Memory package dynamic warpage varies in form and behavior. It is crucial to ensure the POP Memory dynamic warpage (shape) is compatible to POP Bottom Package. Reducing in package body thickness potentially increases the dynamic warpage range and variability. 6

7 FBGA and SiP Package Warpage Characteristics Wide variation of dynamic package warpage depending on packaging constructions and materials used. 7

8 FCBGA (Single and Multi-Chip) Package Warpage Characteristic Simple fundamental: Thinner and larger package gives higher dynamic warpage. Increase demand of ultra thin and cool form factors requires electronic industry to focus on innovation in design, materials, assembly and SMT recipes. 8

9 FCBGA - Lid Package Warpage Characteristics For FCBGA with Lid, the dynamic warpage depends on the lid design and attachment, substrate, body thickness, die size and etc. 9

10 PBGA Package Warpage Characteristics Different mold In PBGA package construction, mold properties play a significant role in controlling the package warpage due to the dominant ratio of the mold volume. The different range of warpage depends on the material and geometry used. Among these PBGA s, all meet the Jedec guideline in reflow temperature warpage. Depending on the solder system or mold material used, the high temperature warpage can refer to 183C-220C for PbSn or 220C-260C for Pb-free 10

11 PBGA Package Warpage Characteristics Different mold For larger PBGA packages, the magnitude of warpage can be significantly higher. If the solder system is Pb free, some of the package warpage magnitude shown exceeds the Jedec guideline. If the solder system is PbSn, all of the PBGA meet the Jedec guideline. 11

12 Dynamic Warpage Measurement Metrologies Thermal Shadow Moiré Projection Moiré Confocal 3D DIC Digital Image Correlations 12

13 Summary Different packaging technology gives rise to different dynamic warpage characteristic and challenges Understanding the dynamic warpage characteristic will enable the industry to continue innovate to overcome assembly challenges. Better design integrations Better materials engineering (ultra low CTE) Better substrate build up process to account for residual stresses and packaging assembly process Robust surface mount process to enable high dynamic warpage package assembly yield. 13

14 inemi: Warpage Characteristics of Organic Packages, Phase 3 inemi Technology Roadmap 2013 Identify package warpage as key challenge Phase 1 ( ) Literature survey Establish metrology correlation between sites and increase awareness Reaching out to industry for component donation (Forming & Storming) Phase 2 ( ) Establish current technology package dynamic warpage (POP, PBGA, FCBGA) Measurement protocol (effect of As Is, Bake and Moisture Exposure Time (MET)) and sample size needed. (Norming) Phase 3 ( ) Continue establishing technology package dynamic warpage (all kind) Dynamic warpage measurement metrology assessment. (Performing) Phase 4 ( ) Continue establishing technology package dynamic warpage (all kind) TBD Continuous focus on dynamic warpage characteristic of latest packaging technology and warpage measurement metrology

15 Thank you! 15

16 Benchmark package warpage characteristics Project Scopes in Phase 3 SOW to develop a better understanding of the current trends of warpage behavior for different package constructions. Small BGA Packages: Interposer, 2.5D, 3D stack packages, through via silicon (TSV); Memory technology (High Band Width Memory, DDR) Large BGA Packages Package stiffeners picture frame stiffener, different stiffener attachment method, shapes and sizes Either organic substrate or ceramic substrate System In Package/Multi Chip Package (BGA) Stack Die or multiple die Die on interposer and/or with asymmetrical layout. Embedded Package (embedded silicon, actives and passives) *The measurement will be done at respective tool manufacturer. Evaluation of current dynamic warpage measurement metrology Identify measurement methods and protocols based on the different measurement techniques and technology such as below: Confocal techniques Projection moiré techniques Thermo moiré techniques with or without convective reflow 3D Digital Image Correlations (DIC) 16

17 Thermo Moiré Metrology Thermal Shadow Moiré Apparatus Other warpage metrology can be found in JESD22-B112A Convention and Preconditioning Preconditioning As Is Description Units used for board assembly immediately after taken out from seal bag. Bake Mimic condition where package moisture level being reset by baking it for 24hrs at 125 C MET 9 Days Mimic 7 days component board assembly staging time + 2 days of unforeseen delays. Exposed to 30 C and 60%RH prior to warpage measurement JEDEC Standard No. 22-B112A 17