PRODUCT/PROCESS CHANGE NOTIFICATION

Transcription

1 PRODUCT/PROCESS CHANGE NOTIFICATION PCN IPD/13/7867 Dated 23 May 2013 Conversion to ECOPACK 2 in the ISOTOP packages manufactured in the ST s plant of Boskoura Morocco 1/22

2 PCN IPD/13/ Dated 23 May 2013 Table 1. Change Implementation Schedule Forecasted implementation date for change Forecasted availability date of samples for customer Forecasted date for STMicroelectronics change Qualification Plan results availability Estimated date of changed product first shipment 19-Aug May May Aug-2013 Table 2. Change Identification Product Identification (Product Family/Commercial Product) Type of change see attached list Package assembly material change Reason for change To implement ECOPACK 2 Description of the change To move from standard to massive production of ECOPACK 2 graded supply and complete the move to DBC assembly technology. The changes here reported will not affect the electrical, dimensional and thermal parameters keeping unchanged all information reported on the relevant datasheets. An exception regarding thermal performance, will affect the following four part numbers: STTH20004TV1, STTH200L04TV1, STTH200R04TV1 and STTH200F04TV1. Please refer to the latest datasheets version published on ST.com, to review updated data. There is as well no change in the packing process nor in the standard delivery quantities. Change Product Identification by the removal of the 2LI (2nd Level Interconnect) logo Manufacturing Location(s) 2/22

3 PCN IPD/13/ Dated 23 May 2013 DOCUMENT APPROVAL Name Giuffrida, Antonino Martelli, Nunzio Vitali, Gian Luigi Function Marketing Manager Product Manager Q.A. Manager 4/22

4 PRODUCT/PROCESS CHANGE NOTIFICATION IPD Group Conversion to ECOPACK 2 (also called Halogen_Free) for products housed in the ISOTOP packages manufactured in the ST s plant of Boskoura Morocco. Packages typology

5 Premise The ECOPACK program is the cornerstone of our effort of being a leader in the change toward environmentally friendly packaging. In the context of this program, ST develops world class technical solutions designed to progressively remove banned substances from manufacturing. Continuing in the already announced plan of moving the supply to the ECOPACK 2 grade products (also known in the market as Halogen Free ) and in the aim of a constant process improvement, Isotop package will be from now available as ECOPACK 2 graded. WHY THIS CHANGE? To implement ECOPACK 2 grade supply for: PowerBipolar, IGBT, PowerMOSFET and Rectifiers products housed in the ISOTOP package. This PCN is intended as well for announcing the move from aluminium ceramic (ALN/AL2O3) to the use of DBC ceramic (Direct bonding copper) for the Rectifiers products. WHAT IS THE CHANGE? To move from standard to massive production of ECOPACK 2 graded supply and complete the move to DBC assembly technology. The changes here reported will not affect the electrical, dimensional and thermal parameters keeping unchanged all information reported on the relevant datasheets. An exception regarding thermal performance, will affect the following four part numbers: STTH20004TV1, STTH200L04TV1, STTH200R04TV1 and STTH200F04TV1. Please refer to the latest datasheets version published on ST.com, to review updated data. There is as well no change in the packing process nor in the standard delivery quantities. WHEN? For the products listed in the attached document, the availability will be granted according the following schedule: Product Family Package/s Samples Full Production Power Bipolar&IGBT ISOTOP Wk 20 (*) '13 Wk 34 '13 PowerMOSFET ISOTOP Wk 20 (*) '13 Wk 34 '13 Rectifiers ISOTOP Wk 20 (*) '13 Wk 34 '13 (*) For Test Vehicle For other samples please contact local Sales Organization Marking and traceability: Unless otherwise stated by customer specific requirement, the traceability of the parts assembled with the new material set, will be easily identified thanks to the traceability code indicated on the inner and external label and visible by the removal of the 2LI (2nd Level Interconnect) logo more required. from top of the package, since no. Lack of acknowledgement of the PCN within 30 days will constitute acceptance of the change. After acknowledgement, lack of additional response within the 90 day period will constitute acceptance of the change (Jedec Standard No. 46-C). In any case, first shipments may start earlier with customer s written agreement.

6 Qualification Data: First qualification report will be available upon request starting wk 20_ 2013 Please note that ST Team is doing all the best for providing you full visibility about these announced changes and to minimize any negative impact it may occur. While our Marketing and Sales teams are available for additional information when required, we are looking forward to your renewed confidence in STMicroelectronics as the strategic partner of your choice.

7 22-Feb-2013 Report ID 13052QRP-Rev1.0 Qualification of Rectifier products in ISOTOP package: Conversion to ECOPACK 2 grade with structure rationalization Product Line Product Description Product Group Product division Package Maturity level step General Information Rectifiers Rectifiers in ISOTOP package: ECOPACK 2 resin and DBC ceramic IPD ASD & IPAD ISOTOP Qualified Wafer fab Assembly plant Reliability Lab Locations STM France STM Singapore STM Bouskoura (Morocco) STM Tours (France) DOCUMENT INFORMATION Version Date Pages Prepared by Comment First issue Feb I. BALLON Qualification of Rectifier products in ISOTOP package: Conversion to ECOPACK 2 grade with structure rationalization Note: This report is a summary of the reliability trials performed in good faith by STMicroelectronics in order to evaluate the potential reliability risks during the product life using a set of defined test methods. This report does not imply for STMicroelectronics expressly or implicitly any contractual obligations other than as set forth in STMicroelectronics general terms and conditions of Sale. This report and its contents shall not be disclosed to a third party without previous written agreement from STMicroelectronics. Page 1/8

8 22-Feb-2013 Report ID 13052QRP-Rev1.0 TABLE OF CONTENTS 1 APPLICABLE AND REFERENCE DOCUMENTS GLOSSARY RELIABILITY EVALUATION OVERVIEW OBJECTIVES CONCLUSION DEVICE CHARACTERISTICS DEVICE DESCRIPTION CONSTRUCTION NOTE TESTS RESULTS SUMMARY TEST VEHICLES TEST PLAN AND RESULTS SUMMARY ANNEXES DEVICE DETAILS TESTS DESCRIPTION... 7 Page 2/8

9 22-Feb-2013 Report ID 13052QRP-Rev1.0 1 APPLICABLE AND REFERENCE DOCUMENTS Document reference Short description JESD47 Stress-Test-Driven Qualification of Integrated Circuits FMEA RER GLOSSARY DUT PCB SS HTRB TC uhast THB IOLT RSH Device Under Test Printed Circuit Board Sample Size High Temperature Reverse Bias Temperature Cycling Unbiased Highly Accelerated Stress Test Temperature Humidity Bias Intermittent Operational Life Resistance to Solder Heat Screwing 3 RELIABILITY EVALUATION OVERVIEW 3.1 Objectives The objective of this report is to qualify ECOPACK 2 ( Halogen-Free ) encapsulation molding compound and standardization to DBC ceramic (Direct Bonding Copper) for all Rectifiers housed in ISOTOP package manufactured in ST Bouskoura plant (in Morocco). The involved product series are listed in the table below: Package ECOPACK 2 conversion Involved Product Series ISOTOP All STTHxxxxTV/TV1/TV2 STPSxxxxTV/TV1/TV2 The reliability methodology used in this qualification follows the JESD47-G: «Stress Test Driven Qualification Methodology». 3.2 Conclusion Qualification Plan requirements have been fulfilled without exception. Reliability tests have shown that the devices behave correctly against environmental tests (no failure). Moreover, the stability of electrical parameters during the accelerated tests demonstrates the robustness of the products and safe operation, which is consequently expected during their lifetime. Page 3/8

10 22-Feb-2013 Report ID 13052QRP-Rev1.0 4 DEVICE CHARACTERISTICS 4.1 Device description Rectifiers housed in ISOTOP package manufactured in ST Bouskoura plant (Morocco): ECOPACK 2 ( Halogen-Free ) encapsulation molding compound and DBC ceramic. 4.2 Construction note Wafer/Die fab. information Wafer fab manufacturing location Wafer Testing (EWS) information Electrical testing manufacturing location Assembly information Assembly site Package description Molding compound Frame material Die attach process Die attach material Wire bonding process Wires bonding materials Lead finishing material Final testing information Testing location ST Singapore ST Tours (France) ST Singapore ST Tours (France) Rectifiers in ISOTOP package ST Bouskoura (Morocco) ISOTOP ECOPACK 2 ( Halogen-free ) molding compound Copper Soft solder Preform Pb/Sn/Ag Ultra Sonic wire bonding Aluminium Nickel ST Bouskoura (Morocco) 5 TESTS RESULTS SUMMARY 5.1 Test vehicles Lot # 1 Process/ Package Product Family Power Schottky Product STPS200170TV1Y 2 Turboswitch STTH12012TV1 ISOTOP 3 Bipolar STTH16003TV1 4 Power Schottky STPS80H100TV 5.2 Test plan and results summary Page 4/8

11 22-Feb-2013 Report ID 13052QRP-Rev1.0 Die Oriented Tests Failure/SS Test PC Std ref. Conditions SS Steps Lot 1 Lot H 0/77 0/77 JESD22 HTRB N Tj, Vr = 0.8xVrrm H 0/77 0/77 A H 0/77 0/77 Note Package Oriented Tests Failure/SS Test PC Std ref. Conditions SS Steps Lot 1 Lot 2 Ta = 85 C, RH = 85%, Vr = 168 H 0/77 0/77 JESD22 THB N 0.8xVrrm H 0/77 0/77 A-101 or 100V max 1000 H 0/77 0/77 Failure/SS SS Steps Lot 1 Lot 2 JESD22 Ta = -65 C to 150 C 500 cy 0/77 0/25 TC N 102 A cycles/hour 1K cy 0/77 0/25 Failure/SS SS Steps Lot 1 MIL-STD Delta Tc=85 C, 3k cy 0/ IOLT N Pon=5min 77 Method Poff=5min 6k cy 0/ Failure/SS SS Steps Lot 1 RSH uhast Screwing N JESD22B- 106 N N JESD22 A118 ST dipping at 260 C 10s On / 15s Off 12 Final test 0/12 SS Steps Lot 1 Ta=130 C, RH=85%, P=3bars 77 96hrs 0/77 SS Steps Lot 3 1.5N.m 7 Final test 0/7 Failure/SS Failure/SS Note Note Note Note Note Note Page 5/8

12 22-Feb-2013 Report ID 13052QRP-Rev1.0 6 ANNEXES 6.1 Device details Package outline/mechanical data ISOTOP Page 6/8

13 22-Feb-2013 Report ID 13052QRP-Rev Tests description Test name Description Purpose Die Oriented HTRB High Temperature Reverse Bias HTFB / HTGB High Temperature Forward (Gate) Bias Package Oriented The device is stressed in static configuration, trying to satisfy as much as possible the following conditions: low power dissipation; max. supply voltage compatible with diffusion process and internal circuitry limitations; To determine the effects of bias conditions and temperature on solid state devices over time. It simulates the devices' operating condition in an accelerated way. To maximize the electrical field across either reverse-biased junctions or dielectric layers, in order to investigate the failure modes linked to mobile contamination, oxide ageing, layout sensitivity to surface effects. TC Temperature Cycling The device is submitted to cycled temperature excursions, between a hot and a cold chamber in air atmosphere. To investigate failure modes related to the thermo-mechanical stress induced by the different thermal expansion of the materials interacting in the die-package system. Typical failure modes are linked to metal displacement, dielectric cracking, molding compound delamination, wire-bonds failure, die-attach layer degradation. THB Temperature Humidity Bias The device is biased in static configuration minimizing its internal power dissipation, and stored at controlled conditions of ambient temperature and relative humidity. To evaluate the package moisture resistance with electrical field applied, both electrolytic and galvanic corrosion are put in evidence. uhast The device is placed under 130 C 85% RH during 96 hours. The Highly-Accelerated Temperature and Humidity Stress Test is performed for the purpose of evaluating the reliability of nonhermetic packaged solid-state devices in humid environments. It employs severe conditions of temperature, humidity, and bias which accelerate the penetration of moisture through the external protective material (encapsulant or seal) or along the interface between the external protective material and the metallic conductors which pass through it. The stress usually activates the same failure mechanisms as the "85/85" Steady-State Humidity Life Test (THB). Page 7/8

14 22-Feb-2013 Report ID 13052QRP-Rev1.0 Test name Description Purpose All test samples shall be subjected to the specified number of cycles. When stabilized after initial warm-up cycles, a cycle shall consist of an "on" period, when power is applied suddenly, not gradually, to the device for the time necessary to achieve a delta The purpose of this test is to determine case temperature (delta is the high minus the compliance with the specified numbers of cycles low mounting surface temperatures) of for devices subjected to the specified IOLT +85 C (+60 C for thyristors), followed by an conditions. It accelerates the stresses on all off period, when the power is suddenly bonds and interfaces between the chip and removed, for cooling the case through a mounting face of devices subjected to repeated similar delta temperature. turn on and off of equipment and is therefore Auxiliary (forced) cooling is permitted during most appropriate for case mount style (e.g., the off period only. Heat sinks are not stud, flange, and disc) devices. intended to be used in this test, however, small heat sinks may be used when it is otherwise difficult to control case temperature of test samples, such as with small package types (e.g., TO39). RSH The device is submitted to a dipping in a solder bath at 260 C with a dwell time of 10s. Only for through hole mounted devices. This test is used to determine whether solid state devices can withstand the effects of the temperature to which they will be subjected during soldering of their leads. The heat is conducted through the leads into the device package from solder heat at the reverse side of the board. This procedure does not simulate wave soldering or reflow heat exposure on the same side of the board as the package body. Page 8/8

15 IMS (Industrial & Multisegment Sector) IPD (Industrial, Power and Discretes) Group Quality and Reliability Rel Reliability Report ISOTOP ECOPACK 2 graded molding compound qualification ST BOUSKOURA Assy plant (Morocco) General Information Locations Product Lines: MD6N Wafer Diffusion Plants: Ang Mo Kio (SINGAPORE) Product Families: Power MOSFET EWS Plants: Ang Mo Kio (SINGAPORE) P/Ns: STE70NM60 Assembly plant: BOUSKOURA (Morocco) Product Group: IMS - IPD Product division: Power Transistor Division Reliability Lab: IMS-IPD Catania Reliability Lab. Package: ISOTOP Silicon Process techn.: StripFET - MDMesh DOCUMENT INFORMATION Version Date Pages Prepared by Approved by Comment 1.0 April C. Cappello G.Falcone First issue Note: This report is a summary of the reliability trials performed in good faith by STMicroelectronics in order to evaluate the potential reliability risks during the product life using a set of defined test methods. This report does not imply for STMicroelectronics expressly or implicitly any contractual obligations other than as set forth in STMicroelectronics general terms and conditions of Sale. This report and its contents shall not be disclosed to a third party without previous written agreement from STMicroelectronics. Page 1/6

16 IMS (Industrial & Multisegment Sector) IPD (Industrial, Power and Discretes) Group Quality and Reliability Rel TABLE OF CONTENTS 1 APPLICABLE AND REFERENCE DOCUMENTS GLOSSARY RELIABILITY EVALUATION OVERVIEW OBJECTIVES CONCLUSION DEVICE CHARACTERISTICS DEVICE DESCRIPTION CONSTRUCTION NOTE TESTS RESULTS SUMMARY TEST VEHICLE RELIABILITY TEST PLAN SUMMARY ANNEXES TESTS DESCRIPTION... 6 Page 2/6

17 IMS (Industrial & Multisegment Sector) IPD (Industrial, Power and Discretes) Group Quality and Reliability Rel APPLICABLE AND REFERENCE DOCUMENTS Document reference JESD47 Short description Stress-Test-Driven Qualification of Integrated Circuits 2 GLOSSARY DUT SS HF Device Under Test Sample Size Halogen Free 3 RELIABILITY EVALUATION OVERVIEW 3.1 Objectives Qualification of the ISOTOP package graded Molding Compound manufactured in the ST Bouskoura (Morocco) assy plant. 3.2 Conclusion Qualification Plan requirements have been fulfilled without exception. It is stressed that reliability tests have shown that the devices behave correctly against environmental tests (no failure). Moreover, the stability of electrical parameters during the accelerated tests demonstrates the ruggedness of the products and safe operation, which is consequently expected during their lifetime. Page 3/6

18 IMS (Industrial & Multisegment Sector) IPD (Industrial, Power and Discretes) Group Quality and Reliability Rel DEVICE CHARACTERISTICS 4.1 Device description N-channel Power MOSFET 4.2 Construction note D.U.T.: STE70NM60 LINE: MD6N PACKAGE: ISOTOP Wafer/Die fab. information Wafer fab manufacturing location Ang Mo Kio (Singapore) Technology StripFET - MDMesh Die finishing back side Ti/Ni/Ag Die size 9610 x µm 2 Metal Al/Si Passivation type Nitride Wafer Testing (EWS) information Electrical testing manufacturing location Ang Mo Kio (Singapore) Test program WPIS Assembly information Assembly site Bouskoura (Morocco) Package description ISOTOP Molding compound HF Epoxy Resin Frame material Copper Die attach process Soft Solder Die attach material Pb/Ag/Sn Wire bonding process Ultrasonic Wires bonding materials Al 7 mils Lead finishing/bump solder material Pure Tin Testing location Tester Final testing information Bouskoura (Morocco) TESEC Page 4/6

19 5 TESTS RESULTS SUMMARY 5.1 Test vehicle IMS (Industrial & Multisegment Sector) IPD (Industrial, Power and Discretes) Group Quality and Reliability Rel Lot # Process/ Package Product Line Comments 1-2 STE70NM60 MD6N Power MOSFET 5.2 Reliability test plan summary Lot D.U.T.: STE70NM60 LINE: MD6N PACKAGE: ISOTOP Test PC Std ref. Conditions SS Steps HTRB HTGB HTSL H3TRB TC AC N N N N N N JESD22 A-108 JESD22 A-108 JESD22 A-103 JESD22 A-101 JESD22 A-104 JESD22 A-102 T.A.=150 C Vdss=480V 154 TA = 150 C Vgss= 30V 154 TA = 150 C 154 Ta=85 C Rh=85%, Vdss=100V TA=-40 C TO 150 C (1 HOUR/CYCLE) H 500 H 1000 H 168 H 500 H 1000 H 168 H 500 H 1000 H 168 H 500 H 1000 H 100 cy 200 cy 500 cy 1000 cy Failure/SS Lot 1 Lot 2 0/77 0/77 0/77 0/77 0/77 0/77 0/77 0/77 0/77 0/77 TA=121 C PA=2 ATM H 0/77 0/77 Page 5/6

20 IMS (Industrial & Multisegment Sector) IPD (Industrial, Power and Discretes) Group Quality and Reliability Rel ANNEXES Tests Description Test name Description Purpose HTRB High Temperature Reverse Bias HTGB High Temperature Forward (Gate) Bias HTSL High Temperature Storage Life AC Auto Clave (Pressure Pot) TC Temperature Cycling H3TRB Temperature Humidity Bias PC Preconditioning The device is stressed in static configuration, trying to satisfy as much as possible the following conditions: low power dissipation; max. supply voltage compatible with diffusion process and internal circuitry limitations; The device is stored in unbiased condition at the max. temperature allowed by the package materials, sometimes higher than the max. operative temperature. The device is stored in saturated steam, at fixed and controlled conditions of pressure and temperature. The device is submitted to cycled temperature excursions, between a hot and a cold chamber in air atmosphere. The device is biased in static configuration minimizing its internal power dissipation, and stored at controlled conditions of ambient temperature and relative humidity. The device is submitted to a typical temperature profile used for surface mounting devices, after a controlled moisture absorption. To determine the effects of bias conditions and temperature on solid state devices over time. It simulates the devices operating condition in an accelerated way. To maximize the electrical field across either reverse-biased junctions or dielectric layers, in order to investigate the failure modes linked to mobile contamination, oxide ageing, layout sensitivity to surface effects. To investigate the failure mechanisms activated by high temperature, typically wire-bonds solder joint ageing, data retention faults, metal stressvoiding. To investigate corrosion phenomena affecting die or package materials, related to chemical contamination and package hermeticity. To investigate failure modes related to the thermo-mechanical stress induced by the different thermal expansion of the materials interacting in the die-package system. Typical failure modes are linked to metal displacement, dielectric cracking, molding compound delamination, wire-bonds failure, die-attach layer degradation. To evaluate the package moisture resistance with electrical field applied, both electrolytic and galvanic corrosion are put in evidence. To verify that the surface mounting stress does not impact on the subsequent reliability performance. The typical failure modes are "pop corn" effect and delamination. Page 6/6

21 Public Products List PCN Title : Conversion to ECOPACK 2 in the ISOTOP packages manufactured in the ST s plant of Boskoura Morocco PCN Reference : IPD/13/7867 PCN Created on : 17-MAY-2013 Subject : Public Products List Dear Customer, Please find below the Standard Public Products List impacted by the change: ST COMMERCIAL PRODUCT BUF460AV BUT30V BUV298V ESM3030DV ESM6045DV STE07DE220 STE140NF20D STE40NC60 STE48NM50 STE53NC50 STE60N105DK5 STE70NM50 STE70NM60 STGE200NB60S STGE50NC60VD STGE50NC60WD STPS12045TV STPS120L15TV STPS16045TV STPS160H100TV STPS200170TV1 STPS200170TV1Y STPS24045TV STPS80H100TV STTH10002TV1 STTH10002TV2 STTH12003TV1 STTH12010TV1 STTH12012TV1 STTH120L06TV1 STTH120R04TV1 STTH16003TV1 STTH20002TV1 STTH20003TV1 STTH20004TV1 STTH200L04TV1 STTH200L06TV1 STTH200R04TV1 STTH200W03TV1 STTH200W04TV1 STTH200W06TV1 STTH6006TV1 STTH60L06TV1 STTH6110TV1 STTH6110TV2 STTH6112TV1 STTH6112TV2 STTH61R04TV2 STTH9012TV1 STTH9012TV2 1/1

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