Reducing Product Time-to-Market based on Shorting the Design Cycle

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1 1 Reducing Product Time-to-Market based on Shorting the Design Cycle Implementation at Elbit systems - Elisra Weinstock Israel - Elisra, Yitzhak Bot - BQR, Uri Tolchin - Elisra Abstract The article introduces design control technology designed to reduce the design cycle process and reduce development costs by detecting errors in the electronic design and supporting parameter calculations for reliability analysis. The method is implemented successfully at Elisra and expresses the uniqueness and contribution of the design process. Index Terms Design Cycle, Design rules, MTBF, fixstress. I. BACKGROUND System design is a significant component of the overall time takes from the decision to develop a product till its delivered to market. The design lengthening time due to design errors is not divisible and can be prevented or reduced. The reduction of the design time and bringing it to the planned schedule can be done in a variety of ways, such as: Preparation of an integrated design program, implementation of development control tools and testing tools in development, work according to procedures and standards, analyzes in a variety of fields, design reviews, models for testing in process, optimal design and optimum testing design. Reliability engineering department is participate in the design process from defining requirements phase, along the engineering development, design control and testing according to requirements. Printed circuits boards design is a function of the system engineering definitions and the allocation of requirements both at the functional level and at the level of the system architecture. The cards and electronic modules being developed today are extremely complex. A card that used to consist of dozens of components, limited quantity of layers, and the number of hundreds of pads can now reach hundreds, thousands and tens of thousands of components, dozens of layers and tens of thousands of pads. Design errors causing the return back to the drawing table, whether at the design stage itself or when the card is already produced and problems that are discovered, are a luxury that cannot be lived with in the development process and when scheduled to be marketed is dictated. For years, the control processes were performed manually for better or worse, both in terms of the ability to perform optimal control and in terms of the duration, it takes to perform the control. At the same time, the reliability engineering market has developed and improved where various manufacturers have developed computerized tools that enable reducing development time and improving it. The reliability computerized tools are now a toolkit for the reliability engineer and its tasks and include among other; Design control, reliability calculations, fault analysis, maintenance analysis, fault tree analysis and thermal analysis tools. In this article, we will focus on the implementation of a methodology developed for the design of electronic card boards, a combined calculation of electrical stress exerted on a single board, up to analysis of several boards together. Elbit system, Elisra division LTD implements this methodology successfully by using the fixtress software developed by BQR. The article will present: The theory of the methodology. Method of implementation. Findings from the implementation of this method in Elisra. II. THE THEORY OF METHODOLOGY The methodology is built on several layers: 1) Create a large pool of design rules in order to check whether the design is working properly or not. 2) Functional modeling of the electronic assembly at the design level (electrical drawing). Mapping all connections, interfaces - input and output, component and load models. 3) An algorithm for calculating electrical parameters in a circuit - voltage, current and power. From thus parameters perform the calculation of the stress exerted on each component. 4) Thermal mapping capability and understanding of cooling mechanisms of the assembly. Fig. 1 presents the functional diagram of the methodology. Information required for fixtress is available from Computerized design SW tools (CAD). That information is than integrated into the functional block of the rules analysis (ASR), from which the raw data and analyzed information are transferred to the functional block of the RAPID and PRECISE calculations. Using the functional block of the thermal analysis, the RATE and DERATE in the corresponding functional block and be analyzed, and at the end the MTBF is calculated. In the expanded process to the box level (general called LRU), the information is connected by the functional block of the integrated analysis and the analysis is made possible to the level of full integration of the box. III. DATABASE DESIGN RULES The rules database is based on twelve fundamental rules on which 232 other rules have been built. The rules can be expanded according to user needs (see figure 2).

2 2 Figure 1. Analysis models and information flow between the modules. Figure 2. Basic design rules example. Figure 3. Example of the use of the continuity law. Design rules include individual rules of in-circuit interconnect logic, such as floating pins, floating grounds, continuity of connections, and lack of correlation between inputs and outputs. The following is an example of a continuity rule that identifies a design error, as depicted in figure 3. In this example, one can see that even though all the connections are correct, the voltage power to the half of the circuit does not reach because of a disconnection in the area marked with a circle. In addition, the design rules allow for a complete analysis of the implementation of digital component connections according to manufacturers instructions. For example, a manufacturer defines how to connect the CPU to DDR memory. Since there are many possibilities for implementing the connection, the fixtress simulation allows during the earliest design stages and before the full design of the card is performed, to check the correctness of connections based on 22 rules. Another capability of the design rules evaluation is to check the correlation between the CAD system settings and components (icons) and the correct model of the components according to the component data sheets. IV. FUNCTIONAL MODELING AND DETERMINATION OF TEST VECTORS The functional modeling includes modeling the parameters of the components, modeling the component pins, constructing the logic of the component and determining the test vectors for the simulation. Figure 4 shows the functional modeling of the components. The data table integrates all the relevant parameters of the component. Decompose each of the component pins is performed. The software algorithm transforms each component into a mathematical model. The.NET map allows you to model all the paths within the circle and all the logical connections between the components. This model is called loops model. When completed, the analysis stage is performed (detailed below).

3 3 Figure 4. Building the functional model. Figure 6. An example of a hidden mishap. Figure 5. Type A algorithm for detecting over-stresses. V. STRESS CALCULATION ALGORITHM Stress calculation is based on the connections between the components. During the analysis, the electrical parameters are calculated at the NET points, and on this basis the electrical parameters that are developed on the components can be calculated. The calculated parameters are compared to the rate and de-rate data of the component. The stress calculation algorithm is constructed from two parts: Part One - Stress calculating is based on card mapping and error detection efforts due to logical problems, Part two - calculate the stresses based on currents and voltages and identify deviations. Fig. 5 shows an example of a simple event based on part one calculation algorithm: A component having a specification of input voltage of 3.6 volts, is fed from a 5 volt voltage source. As stated, the identification of this stress is based on the mapping and the logic of the card. The use of a second type algorithm is based on the actual calculation of currents, power levels, voltages and temperatures. Based on all models that were built, the currents calculation in the card are performed. In Figure 6, the algorithm calculates the required currents and the maximum possible current from IC1. If all 4 components are required at the same time, 5mA shall be required per each component (total of 20mA) and the circuit will collapse. This fault cannot be detected unless the designer runs a load test that simultaneously activates all 4 components. This event will be revealed only when the card is produced and the damage has been occurred. Figure 7. Information flow during the execution of the analysis. VI. INTEGRATION OF THERMAL PARAMETERS The main thermal parameter at the module level calculated by the thermal model is the average temperature difference between the environment and the card. At the same time, the temperatures are calculated on each component according to the thermal coefficients and according to the power consumption on the component. Integration of the thermal parameters is made possible by the thermal algorithm. This algorithm can calculate the power distribution on the card and according to the card parameters, the average temperature increase will be calculated. The MTBF model and the MTBF calculations then use this temperature for calculating the junction temperature of the various components and calculate MTBF. This model does not replace the detailed thermodynamics analysis, but allows the temperature to be assessed before the card has been edited and identified the problematic components and give thermal instructions to the card editor. VII. METHOD OF IMPLEMENTATION The analysis involves knowledge of the operation of the system, knowledge of the components and understanding of the operation of the card. Figure 7 is a flowchart showing the method of design control execution. The implementation stages of the data definition are:

4 4 Figure 8. Rules definitions. Figure 11..NET List. Figure 9. Component parameters. A. Create the aggregate data file The data file includes: 1) Mapping the NET points of the card. 2) Complete BOM component list. 3) ICD details of the electrical parameters at assembly level for each connector pins. 4) Mechanical definitions relevant to heat transfer. 5) Details of the operational characters (frequency, operation of clocks, information loads). 6) Electrical diagram. B. Importing the data into the assembly model The model of the PCB is build up based on the electrical drawing and the.net file. In parallel to the card modeling, the components are also modeled. An existing component data is taken from the component libraries in the software, a new component is modeled into the software libraries according to its parameters. The card is defined by its input and output interfaces. Each pin is defined by the characteristic of the signal (analog, digital, voltages, and communication type). The card is defined by its operational profile and by thermal and mechanical parameters. The following figures present a number of characteristics of the defined parameters; In Figure 8 one can see how the rules are defined for each of the different objects of the components. Figure 9 shows the definition of electrical parameters of components at the relevant pin s level. Figure 10 shows how the BOM is fed into the system at the RefDes level, component number, component description, and Figure 12. Stress Report. manufacturer name. Of course, the software libraries make it possible to re-use models and parameters of components that have already been entered without having to re-enter the information time after time. Figure 11 shows the.net list of the assembly. It is clear that this list is unique to each group and constitutes the unique configuration of the electronic drawing and the interfaces between the components and the assemblies. VIII. PERFORM THE ANALYSIS The first stage of the analysis is an examination of the legality of the design. At this stage, the design rules are run against the model that was built. Any discrepancy is identified; the reliability engineer or designer has to examine the nature and cause of the deviation (a design problem or an incorrect data). If the number of errors is not large and does not interfere with the calculation of the electrical parameters, this calculation will be performed and all the results will be presented in the report. The analyzer person should examine the report and identify deviations in the design if they are. The following are some examples of the reports produced for the analysis. Figure 10. Components Library. Figure 13. Stress parameters and failure rate.

5 5 D. fixtress integration fixtress is not fully integrate yet into CAD systems. This integration will be ultimate when immediate upon the completion of the design the analysis will be performed by all developers before the editing stage. Improvement recommendation: The software can now absorb all the types of parameters of CAD software and the Altium software the fixtress was integrated into the drawing software. Figure 14. Design error report. All the findings are presented in the summary report, including recommendations for design improvements if identified. Figure 12 presents stress report, including the thermal and power parameters. Figure 13 presents the thermal analysis results and the failure rate for each one of the components, calculated at the applicable junction temperature. Figure 14 presents an example of a design error report. The report summarizes the error parameters values of the problematic components. IX. LIMITATIONS OF THE PROCESS AND THE WAY TO IMPROVE IT In the current process, there are a number of limitations that can potentially be improved: A. Timing of performing the analysis The required information dictates entry to the process when the initial design is completed at the level enables for the board editing. This requires a quick response. If the analysis is not conducted during this window, it will be performed at the editing stage and its findings will require re-editing. Improvement recommendation: Since most of the time consumed is for libraries development and ICD definitions, the analysis can be started long before freezing the design by preparing the component library and the ICD. This method ensures that when the design is closed the analysis will take only a few days. B. Building the libraries Building the libraries is a progress process. As time passes, the number of components in the library will increase. Sharing between multiple users will enable rapid library building. Improvement recommendation: Recycling component libraries from the CAD tools or using parsing algorithms to describe the component and extract relevant information, these methods can save developing of around 80% of data already existing in other databases. C. Algorithm Available algorithm for all components - ensures that the algorithm handles all types of components. Today, there are still several components that the software does not address, such as switching power supplies. X. IMPLEMENTING THE METHOD IN ELISRA AND RESULTS ANALYSIS As noted above, Elisra has been implementing the analysis method for new electronic cards for several years with great success. The objectives of implementing the methodology are: 1) Reduce the design cycle time by locating errors as soon as possible. 2) Testing the design and finding errors that would have been discovered after editing / manufacturing. 3) Calculation of electrical parameters in favor of stress analysis and calculations of MTBF. 4) Verify compliance with stress derating requirements and efforts to improve design. 5) To make efficient the process of reliability engineering in its integration into the design process. When the defects are identified, a design update and a reexamination of the design are performed using the analysis tool. Implementation of the method corresponds to the process described above. That is: 1) Data collection and transfer to the analyzer. 2) Building the model and building the database. 3) Perform the analysis. 4) Findings, conclusions and corrections of design as required. 5) Perform analysis on the updated design. In order to make efficient the process, data import interfaces have been defined by which most of the data is entered automatically into the analysis software. XI. FINDINGS AND CONCLUSIONS Table 1 presents the findings of work performed on 14 modules. The following examples present true findings from the analyzed assemblies as detailed in the table. All the detailed errors were corrected in the design of the assemblies. A. Module 1 In Fig. 15, point V1 should be connected to the ground but not connected, the NC mark was made by the designer by mistake. B. Module 2 In Fig. 16, it can be seen that according to the component model pins 9-12 should be connected to voltage but were connected to ground.

6 6 Table I CONCENTRATION OF ANALYZED ASSEMBLIES. Number Item PAD Components Net Finding Quantity quantity quantity Errors(*) 1 Module Module Module Module Module Module Module Module Module Module Module Module Module Module * Summary of design errors and errors regarding efforts. Figure 17. Module 2 connection error. Fig. 17 shows an irregularity in the stress derating on the component. The rate value is 25 volts and the component is loaded at over derating of 24 volts. C. Module 3 In Fig. 17, one can see that D13 point has been connected to the ground via a resistor, while according the component model it should be directly connected. Figure 15. Module 1 Error connecting soil. Figure 18. Module 3 ground connection error. Module 3 Second error: U44 Pin 6 should not have been left floating, From the schematics it can be seen that the pin is NC: it seems that the pin was left open even though according to manufacturer s instructions it must be connected to high or low voltage. Figure 16. Module 2 connection error. Figure 19. Module 3 Pin connection error. Module 2 Second error. The maximum allowed voltage is 25V, The applied voltage is 24V, The derating value requirements is 50%. D. Module 4 CR52 protection voltage is less than the applied. In this drawing it seems that a wrong component was selected. The

7 7 diode required to protect the voltage of 12.5 volts but the diode selected protect the lower voltage. Figure 20. Module 4 design error in component selection. REFERENCES 1. fixtress Technical Manual AUTHORS Weinstock Israel Elbit - Elisra, Hamerkava 29 Holon Israel. Israel.Weinstock@elbitsystems.com RAMS department director, leading the reliability maintainability and safety tasks. MS for Reliability and QA and MS for business management. Yizhak Bot BQR Reliability Engineering Ltd. Rishon LeZion,75101, Israel. bot@bqr.com Founder and CTO of BQR.com from Israel, a leading consulting and software-developing firm. The inventor of CARE, fixtress and apmoptimizer technology. Uri Tolchin Elbit - Elisra, Hamerkava 29 Holon Israel. Uri.Tolchin@elbitsystems.com Reliability and Safety engineer, Responsible for performing RAMS tasks.