Process Control and Yield Management Strategies in HBLED Manufacturing

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1 Process Control and Yield Management Strategies in HBLED Manufacturing Srini Vedula, Mike VondenHoff, Tom Pierson, Kris Raghavan KLA-Tencor Corporation With the explosive growth in HBLED applications including backlighting and general illumination, device manufacturers are increasing focus on improved device performance and reduced manufacturing costs. In-line inspection during device fabrication significantly increases LED performance through improved process control and allows device makers to achieve cost savings through higher yields. In high volume manufacturing, in-line inspection enables (a) accelerated development and ramp, (b) faster excursion detection and control, and (c) improved baseline yields. In this article, we discuss inspection requirements in LED wafer manufacturing processes with emphasis on process defects and their impact on yield. We detail implementation strategies of automated inspection tools at different steps of the fab process. Further, we describe the benefits of inline inspection on fab productivity through improved uptime and higher yield. High-brightness LEDs are seeing unprecedented growth with expansion into backlighting and general illumination applications. With their potential to offer superior quality lighting with higher efficiencies and lower long-term costs, HBLEDs are being seen as a viable alternative to fluorescent and incandescent lighting. Yet this huge end market poses significant challenges for the LED industry. As solid-state lighting (SSL) technology advances, lower costs and greater product consistency are two key necessities for market acceptance. The US Department of Energy (DOE) SSL roadmap 1 suggests that HBLEDs must

2 reach a target of $2/Klm or better by 2015 which implies a reduction in cost per lumen by a factor of ten with improved performance. Coupled with improvements in manufacturing processes and equipment cost-of-ownership, the roadmap initiative identified in-line process control and automated inspection in SSL manufacturing as key enablers toward achieving these performance and cost targets. How in-line inspection supports LED process improvement LED performance is defined by optical characteristics like efficiency, brightness, and color quality, which depend on the composition and structure of the device layer, as well as by reliability and lifetime, which depend on defects introduced in manufacturing. LEDs can suffer either functional or parametric failure: a die can fail to emit light at all, or can emit outside the desired parameter range. Defects during the manufacturing process play a leading role in functional failures. Typically, defects are only caught at final test, but the process cycle time is two to three weeks. By the time an excursion in the initial GaN deposition process is caught, thousands of wafers containing millions of devices could be at risk. Additionally in many cases, defect detection relies on visual or manual operator-assisted inspection resulting in inconsistent dispositioning. Inaccurate dispositioning at the end of wafer fab process increases costs through unnecessary packaging of non-functional dies and also reduced overall yield.

3 In-line automated inspection during wafer fabrication process allows high defect capture rates (consistency, accuracy) and rapid classification (time-toresults) of mission-critical defects. Figure 1 shows the influence of epitaxy and front-end patterning defects on device performance. In this example of two production wafers, epitaxy defects resulted in 6-7% of yield loss while front-end defect sources resulted in 8-10% yield loss as measured by electrical failure at full-wafer test. Inspection at these process points would allow better understanding of the failure mechanism and isolate defects-of-interest for process improvement. 6.2% 7.0% Epi defect induced Yield Loss 8.9% 10.3% Other front-end sources Sample Y Sample Z Figure 1: Wafer yield loss contribution from epitaxy and other front-end defect sources in typical HBLED production process

4 Figure 2 shows a typical fab ramp model - during early stages of production (represented by the orange and blue segments), manufacturers have limited data regarding defect densities, root-cause relationships, and traceability throughout the process cycle. Automated inspection establishes baseline defectivity levels and enables subsequent process improvements through experiments aimed at understanding root-cause relationships. This accelerates process development and ramp. The green segment of the production ramp cycle represents higher baseline yield achieved and maintained as a result of fast excursion detection and control. Combining all these improvements, the US Department of Energy Solid-State Lighting Roadmap estimates that in-line process control could cut manufacturing costs by 50%. (Figure 3)

5 Figure 2: Automated inspection for yield management provides more comprehensive defect data and opportunities for yield improvement Figure 3: Approximately 50% total cost reduction can be obtained from in-line process control (Solid-State Lighting R&D: Manufacturing Roadmap (2009), US Department of Energy Task Force Results) In-line inspection can help detect defects at every step of the LED manufacturing process, from the substrate and initial epitaxial layers to the patterning, dicing, and contact formation steps. These defects can be broadly divided into those that can be found by unpatterned inspection techniques, and those that can be found by patterned inspection techniques. Figure 4 illustrates the most common defect sources during LED manufacturing.

6 Epitaxy Front-end Back-end Packaging Substrate Epitaxy Dies-on-wafer LED die LED lamp Substrate Yield Loss Particles Stains Scratches Epi- Yield Loss Pits & cracks Epi uniformity Topography defects Front-end Yield Loss Patterning defects Patterning overlay errors Film uniformity Back-end Yield Loss Dicing defects Probe marks Residues, peeling, contamination Pad damage Figure 4: Manufacturing Steps Influence Final Device Yield Substrate and epi process control with unpatterned wafer inspection LED substrates inherently contain more defects than the pristine silicon wafers encountered in IC manufacturing primarily due to lattice mismatch between the GaN epitaxy layer and the substrates (sapphire, SiC). Common defects on sapphire substrates include particles, pits, scratches and CMP process stains. Substrate pits are known to cause GaN epi defects. Substrate stains are the root cause of localized areas of GaN epi roughness and other topography defects. During epitaxy in the MOCVD chamber, common defects include post- MOCVD topography clusters, GaN epi cracks, hexagon pits and bumps, crescents, circles, micropits, and other yield-impacting epi defects. Epi pits and hex bumps often result in shorts and other electrical failures. MOCVD is the

7 bottleneck process in LED wafer manufacturing and therefore, maximizing the uptime and productivity of these systems is critical. Production sampling with automated inspection allows verification of incoming substrate quality and epitaxial layer quality before device fabrication. Manufacturers can set incoming quality specs for sapphire substrates and establish pass/fail criteria for sapphire and GaN growth runs. During process development and factory ramp, this information provides a feedback loop for rapid process tuning and yield improvement. In manufacturing, statistical process control (SPC) monitoring of defects provides a rapid feedback loop for tuning reactor growth parameters and process correctibles. Epi defectivity remains within control limits thereby minimizing the use of preventive maintenance procedures and reducing downtime. In-line process excursion detection with patterned wafer inspection The LED device fabrication process requires deposition of multiple thin layers of varying compositions. Non-uniformity of these layers can vary the brightness and color of the finished devices. Defects can also degrade device efficiency and reliability. Patterning, usually done by proximity aligners, introduces additional opportunities for alignment drift, overlay issues and other damage and contamination. The LED industry is beginning to adopt stepper-

8 based projection lithography, which will reduce but not eliminate lithographic defects. Once the front-end device process is complete, additional process steps include surface texturing and substrate lift-off, contact formation, dicing and bonding. Defects introduced by back-end processes can account for substantial yield loss of their own. There is also a need for improved back-end inspection and testing. Patterned wafer inspection tools can improve control of both the patterning steps and the back-end process. These tools employ advanced optics, scan, and detection algorithms for enabling high throughput, high sensitivity inspection. Such automated inspectors combine accurate defect classification (binning) with advanced metrology algorithms. Inspection at various fab steps allows early detection of patterning errors and other process defects. After full wafer patterning, back-end inspection steps include pre- and post-dice inspection for detecting critical defects such as residue, peeling, and scratches that might be introduced during probing and dicing. Full wafer inspection coupled with end-of-line test results allows manufacturers to accurately disposition functional dies, thereby significantly reducing field performance and reliability issues. KLA-Tencor has developed inspection solutions that address the HBLED industry process control requirements the Candela CS series for sapphire

9 and epi process control, and process tool qualification, and the ICOS WI series for LED patterned wafer and back-end inspection. Process control and yield management strategy with in-line inspection A defect early in the manufacturing process imposes not only the costs related to the defective wafer itself, but also any additional processing of the defective wafer, and the costs of any additional wafers that suffer yield loss before the excursion is identified. By inserting in-line inspection points at significant process milestones, manufacturers can catch excursions sooner, reducing the amount of product at risk. Minor excursions are due to a shift in process parameters that is not significant enough to trigger an alarm. It is difficult to differentiate a minor excursion from normal variations in baseline without higher sensitivity automated inspection. Over a period of time, these minor excursions can add up to significant yield loss. A major excursion, in contrast, is due to some part of the process being significantly out of the specified standards. This type of excursion is usually easier to detect and can cause a significant drop in overall production. Automated inspection can allow earlier detection of process tool drift thereby preventing major excursion.

10 Manual inspection techniques are grossly inadequate because defect monitoring across full-wafer surfaces lacks the accuracy and repeatability needed for production SPC charts. As an example, Figure 5 displays the value of automated inspection for early detection of an epi reactor excursion of epi pits known to short the device p- n junction. The upper portion of the figure illustrates a minor excursion which goes undetected by manual inspection. The feedback loop does not occur until electrical full wafer test (FWT) data is obtained. For a manufacturer running at 20,000 wafer starts per month (WSPM), roughly 10,000 wafers are exposed to increased defect densities and increased yield loss after a two-week cycle. 200 Manual Inspection Poor detection of minor excursions Killer defect excursion not detected with manual inspection Feedback loop does not occur until FWT yield data; typical fab cycle 2-3 weeks UCL Parts at Risk (20,000 wspm) 24 hr elapsed 667 wafers at risk 2 weeks elapsed 10,000 wafers at risk no parts at risk 0hrs weeks faster feedback Automated Inspection Classifies killer defects UCL

11 Figure 5: The value of automated inspection for early detection of an epi reactor excursion The lower portion of figure 5 illustrates how automated inspection isolates the defect excursion enabling corrective actions to be taken such that defectivity levels are reduced to within process control limits. The result is fewer wafers exposed to killer defects and a reduction in incremental yield loss. Early detection of excursions through automated inspection translates to millions of dollars in savings each year for LED chip makers. Conclusions As HBLED manufacturers ramp volumes to meet demand, they face increasing challenges in meeting performance and cost targets. In-line inspection allows improved performance through enhanced process control and cost savings by enabling higher yields. Defects in manufacturing process from substrate, epi, patterning, and backend steps impact overall yield. Automated inspection allows faster excursion detection, faster time-to-root cause, and improved baseline yields. 1 Solid-State Lighting Research and Development: Manufacturing Roadmap (September 2009) US Department of Energy (DOE)