Nanoelectronics Fabrication Facility

Transcription

1 Nanoelectronics Fabrication Facility

2 Contents Introduction 2 Mask Making Module 4 Photolithography Module 6 Wet Etching and CMP Module 8 Dry Etching and Sputtering Module 10 Thermal Process and Implantation Module 12 Metrology 14 User Training 16 1

3 Introduction T he Nanoelectronics Fabrication Facility (NFF) is the first and only nanoelectronics fabrication laboratory established in a tertiary institute in Hong Kong, and it represents a major achievement for HKUST. The mission of NFF is to provide facilities for the fabrication of nanoelectronics devices and integrated circuits in support of teaching and research to faculty members, and undergraduate and postgraduate students. Since April 1997, the capabilities of NFF have been upgraded with the completion of its Phase II laboratory, which occupies an area of 750 square meters with some sections providing Class 100 environments. A complete 4 silicon wafer processing line has been installed, providing photolithography, thermal diffusion and oxidation, thin-film deposition, dry/wet etching, metallization, implantation, and mask making services. An E-beam direct-write system has also been installed to facilitate deep sub-micro patterning and to enable nanostructure research. The facility has developed both MOS and bipolar baseline processes for the fabrication of simple discrete devices and small-scale integrated circuits. In addition to individual faculty members, the facility provides support to many centers and institutes at the University. With its additional capabilities and capacity, NFF has extended its service to other tertiary institutions and to the private sector through various technical collaborations. The NFF Phase II laboratory consists of a plant room and a cleanroom. The plant room is equipped with facilities to support the operation of the cleanroom. These facilities include an in-house de-ionized water polisher, an acid neutralization system, a compressed air system, a general vacuum system, a cooling water system, water scrubbers, and dangerous goods stores for hazardous materials storage, air conditioning and a filtration system. The cleanroom provides Class 10K, Class 1K and Class 100 environments and also houses the following five equipment modules for front-end wafer processing: Mask Making Module Photolithography Module Wet Etching and CMP Module Dry Etching and Sputtering Module Thermal Processing and Implantation Module A wide range of R&D projects are conducted in NFF. Some of the most recent projects involve: 3D Nano-electronics Devices Display Technologies Sensor and M/NEMS Technologies Silicon Photonics Technologies In 2007, 200 square meters of laboratory space in the Enterprise Center were allocated to NFF. This laboratory space was subsequently installed with metallization equipment, basic photolithography equipment and an E-beam lithography system. Power Semiconductor Devices and Technologies Advanced Packaging Advanced Process Module Development Gene Chip Compound Semiconductor Technologies 2 3

4 Mask Making Module A photomask is typically a transparent fused glass blank covered with a pattern defined by chrome metal. A set of photomasks, each defining a pattern layer in nanoelectronic fabrication, is fed into a photolithography contact aligner or stepper and individually selected for exposure on a silicon wafer. In the case of the contact aligner, there is a one-to-one correspondence between the mask pattern and the wafer pattern. With the stepper, however, the pattern is projected and shrunk by five times onto the wafer surface. Laser Direct-Write System E-beam Lithography The laser direct-write system is an effective and efficient pattern generator for mask making. The system performs patterning by exposing the photoresist on the mask using a computercontrolled laser beam. With the use of the raster scanning writing method, a variety of patterns can be generated. By simply changing the pattern data file (for example, CIF or GDSII format), a new prototype can be obtained. Due to the system s excellent write quality and flexibility, microstructures for various applications, such as ASICs, MCMs, MEMS, integrated optics, hybrids, microwave devices, sensors, etc., can be realized. The electron beam lithography system, with its resolution extending into the nanolithography regime, is used for direct write implementation of chips, wafers and masks. All pattern data are automatically converted into binary format for writing purpose on a workstation. A substrate is loaded onto the stage by a manual loader with a single-chuck substrate exchange chamber. A thermal field-emission cathode with a ZrO/W emitter generates a Gaussian beam. The Gaussian beam is focused onto the substrate by the 4-stage focusing system following the pattern generated by the vector scan pattern generator. The electron beam lithography system is used in applications requiring superior resolution and accuracy. It is particularly suited to the direct write production of silicon devices, the process development and test fabrication of electronic devices as well as research on new devices for which an ultra-fine linewidth is required. Electron Beam Lithography made a 50 nm pattern onto a quartz wafer A laser direct writer for making masks A direct write electron beam lithography system for writing patterns on substrates A scanning electron microscope for inspecting nanoscale patterns Result of the pattern after quartz layer etched (50 nm gap in between) 4 5

5 Photolithography Module Wafer Stepper System Double-sided Optical Substrate Aligner Substrate Pre-bonding Aligner Anodic Substrate Bonder Multi-purpose UV Exposure System Automated Photoresist Coating Track Advanced Spray Coating System Small-sample Photoresist Coater Precision Temperature-controlled Baking Oven Photoresist Stripping and Developing Wet Processing Station Mask-to-substrate Alignment Substrate-to-substrate Pre-bonding Alignment Constant Intensity UV Exposure P hotolithography is the complicated process of transferring a pattern from a mask onto the surfaces of silicon wafers or any other substrates. Photolithography is in fact a highly refined version of photoengraving and is performed under yellow room area. The pattern is first transferred from the mask to a light-sensitive material called photoresist. It is then transferred from the photoresist to the barrier material on the surface of the wafer by chemical etching or plasma etching. In industry, the complexity of an integrated circuit process is often measured by 6 Photoresist Coating and Developing the number of photographic masks used during fabrication and the feature sizes of the electronic devices within the circuit. Conformal Resist Coating on Severe Topography Photolithography must be performed in a particlefree environment, as the presence of dust particles on the substrates would result in defects. In NFF, all cutting-edge high-precision photolithography equipment as well as the wafer stepper and automated photoresist coating track are installed in a class-100 cleanroom complete with yellow lighting. Anodic Substrate Bonding Soft and Hard Photoresist Baking Wafer Patterning Rework 7

6 Wet Etching and CMP Module W et processing stations play a critical role in the semiconductor industry. They are mainly used for substrate cleaning and chemical wet etching. Substrate cleaning is the technique of chemically cleaning silicon wafers prior to thermal oxidation to remove from their surfaces particulate matter as well as any trace of organic, ionic, metallic and bacterial impurities that may contaminate the substrates. NFF houses a high-purity de-ionized water system to achieve superior substrate cleaning performance. High-temperature Standard Wafer Cleaning Wet Processing Station RCA1 / RCA2 Cleaning Wet Processing Station Silicon Dioxide / Silicon Nitride Etching Wet Processing Station Chemical Circulation Metal Etching Wet Processing Station 8 Chemical Wet Etching CMP Chemical wet etching is the technique of removing any barrier material not protected by the hardened photoresist after the photolithography process using liquid-phase etchants. Etchants must be highly purified and filtered. Which etchant to use depends on the material to be etched. NFF has several specially designed wet processing stations and a wide variety of pre-mixed etchants to choose from. The Chemical and Mechanical Polishing (CMP) process is a breakthrough technology in the manufacture of today s advanced semiconductor chips. It is a highly accurate process of flattening and smoothing the surface of a silicon wafer so that multiple layers of intricate chip circuitry can be built on it. The process is essential to maintaining a Piranha Cleaning (with H2SO4 and HF) Automated CMP System RCA1 and RCA2 Cleaning Wafer Scrubber Doped SiO2 Etch and Undoped SiO2 Etch (with BOE) Megasonic Cleaning Bath Aluminum Etch Pad Etch Freckle Etch Photoresist Stripping Wet Processing Station Nitride Etch (with H3PO4) General Purpose Temperature-controlled Wet Processing Station Silicon Etch (with KOH or TMAH) wafer s integrity, especially as the new generations of chips continue to shrink in size. A full set of equipment for post-cmp treatment, wafer scrubbing and megasonic cleaning are available in NFF along with various planarization processes supported by our highly experienced staff. Available Planarization Material Silicon/Polysilicon Silicon Dioxide Quartz and Glass Wafer 9

7 Dry Etching and Sputtering Module Dry Etching Very thin Silicon structure etched by DRIE High aspect ratio etch of Silicon substrate D ry etching is one of the most critical processes in micro and nanofabrication. This process is also known as dielectric etching, polysilicon etching, or conductor etching, depending on the type of film that is removed from the substrate. Two basic steps are involved. In the pattern definition step, a lithography process is used to create the desired pattern on the photoresist. Then in the pattern transfer step, the required pattern is dry etched onto the silicon itself, or onto a deposited layer of insulating or conducting material. The most common form of dry etching is reactive ion etching (RIE) through which a highly anisotropic profile of the etched material can be obtained. In RIE, the substrate is placed inside a reactor into which several gases are introduced. Then plasma is added to the gas mixture using an RF power source, breaking the gas molecules into ions. These ions are accelerated towards and react with the surface of the material being etched, forming another gaseous material that can be pumped away. RIE therefore involves both chemical and physical steps. The anisotropy of the etching profile can be altered by changing the balance of the steps, since the chemical part is isotropic and the physical part is highly anisotropic. Different combinations of chemical and physical steps will give different etching profiles (e.g. rounded, vertical, etc.). NFF offers a wide selection of dry etching equipment from the standard reactive ion etcher to the most promising inductive coupled plasmabased etcher, enabling users to fabricate structures with nanoscale features and high aspect ratios. 10 Inductively Coupled Plasma Etcher (polysilicon) Inductively Coupled Plasma Etcher (GaN) ICP-based Advanced Silicon Etcher ICP-based Advanced Oxide Etcher ICP-based Metal Etcher Reactive Ion Etcher O2 Plasma Resist Striper Sputtering Chemical Vapor Phase Etcher Anisotropic Polysilicon Etch Anisotropic III-V Compound Etch Deep Anisotropic Silicon Etch Deep Anisotropic Silicon Oxide Etch Anisotropic Etch for Silicon Nitride Anisotropic Etch for Aluminum High Selectivity Vapor Phase Etch for Silicon and Silicon Dioxide Physical Vapor Deposition (PVD), also known as sputtering, is mainly a physical process. In sputtering, heavy argon ions are electrically accelerated in high vacuum toward a pure metal (the target ). Upon impact, these ions sputter off the target material one by one. The atoms land on the wafer surface and form a solid metal layer. This layer can then be patterned and etched to form the conducting wires in a semiconductor device. The sputtering module available in NFF enables metal and dielectric deposition for the realization of interconnects and metal structures in advanced semiconductor fabrication. The module contains a variety of thin film sputtering systems to support processing on small samples, i.e., 100 mm and 150 mm silicon wafers, as well as glass and other substrates. Metal Sputtering System for 4 Silicon/Glass Substrate Metal Sputtering System for up to 6 Silicon/Glass Substrate Advanced Sputtering System for up to 4 Substrate Evaporation System for 2 or 4 Silicon/Glass Substrate Metal Sputtering (Al, AlSi, Ti, TiW, Au, Ag, Pt, Cu, Cr, and Mo) Dielectrics deposition (SiO2, HfO2, SiN, TiN, and TaN) 11

8 Thermal Process and Implantation Module Ion Implantation Thermal Process T o fabricate nanostructures and nanodevices, various kinds of thin films are used. Thermal oxidation plays an important role in silicon device fabrication. It is a key process in modern semiconductor technology. Dielectric materials, such as silicon dioxide and silicon nitride, are mainly used for insulation and passivation. Low-Pressure Chemical Vapor Deposition (LPCVD) and Plasma-Enhanced Chemical Vapor Deposition (PECVD) are the most commonly used methods for thin film deposition. For high-k material, atomic layer deposition offers precise control of film thickness down to the atomic scale and excellent conformity even in high aspect-ratio structures. Polysilicon acts as gate electrode and silicide formation is for device interconnection. The thermal process module provides systems for oxidation and thin film deposition in wafer processing. Other related processes are thermal annealing which enables us to study the properties of different materials or their structural performance as a function of temperature, thermal diffusion dopants activation, etc. NFF has several furnace systems, each with a specific purpose. In the temperature range from 300 to 1150 oc and with various gaseous compositions, the desired layers of materials can be deposited onto the substrates. Dry/Wet Oxidation Oxidation Furnace Boron or Phosphorous Diffusion Low-pressure Chemical Vapor Deposition System Thermal Annealing Atomic Layer Deposition System Rapid Thermal Annealing Furnace Silicon Epitaxial Reactor Ion Implanter Rapid Thermal Annealing System Ion Implantation (Boron, Phosphorous, Arsine, and Hydrogen) Diffusion Furnace Plasma-enhanced Chemical Vapor Deposition System Ion implantation is the process by which impurities such as boron and phosphorous are introduced into a silicon wafer to control the majority-carrier type and resistivity of layers formed on the wafer. It is the primary method used to modify the electrical properties of wafers. NFF is equipped with ion implanters. Dopant concentrations and depth profiles can be controlled precisely with this ion implanter. Following ion implantation, a thermal diffusion or annealing process is needed to drive-in and activate the implanted dopants. NFF has a rapid thermal annealing system, which may be used to decrease the thermal budget or prevent dopant diffusion. Low Temperature Oxide (Doped/Undoped) Stiometric/Low Stress Silicon Nitride Polysilicon/Amorphous Silicon PECVD Oxide/Nitride Silicide Formation High-K Material Deposition (Al2O3, HfO2 and ZrO2) Epitaxial Silicon, Silicon Germanium Layer 12 13

9 Metrology I n-line process characterization for photolithography, etching processes, CMP, ion implantation and CVD processes enables us to monitor the machine performance and a number of key process control functions. NFF is equipped with many metrology systems providing non-destructive/destructive, real-time measurement of critical parameters. The effectiveness of the whole process can thus be monitored. Stress Gauge uses a laser optical lever to measure the change in curvature induced in a sample by the deposited film. The laser scans the surface of the wafer. The deflection from the wafer surface is reflected off a mirror and detected by a detector and the related data are collected by a computer. A clean, blank sample wafer is measured first. Its data are then compared to the data on the sample taken after film deposition by computer analysis. The film stress is then calculated. A thin-film thickness and mapping system with a broad range of measurement capabilities is available in NFF. The non-contact spectroscopic reflectometry system can measure sites as small as 10 µm in diameter on production wafers with film thicknesses in the range of 200 Å to 20 µm using both a visible light source and a 25 Å to 20 µm UV light source Surface profiler is a contact stylus profiler designed to measure automated step height, surface contours, and roughness in a variety of applications. It features the ability to measure micro-roughness with 1 Å resolution over short distances as well as waviness over a full, 60 mm scan. Sonogage measures sheet resistance in ohms per square or milliohms per square. It also measures substrate thickness and computes bulk resistivity. If the specific resistivity of a deposited film layer is known, it is then possible to compute the thickness of the layer from the measured sheet resistance. Four Point Probe is an automatic sheet-resistance mapping system designed for measurement of conductive films on silicon wafers. The range of the system is from to 800,000 ohms per square. The system is designed for mapping the sheet resistance of ion-implanted layers, thin metal films, or epi wafers. The graph produced by the system provides visual feedback to aid in the identification of malfunctions in the processing equipment used in ion implantation, annealing, diffusion, metallization, etc. Thin-Film Thickness Measurement and Mapping System Sonogage Stress Gauge Scanning Electron Microscope Atomic Force Microscope Ellipsometer Prober Surface Profiler Four Point Probe Meter 14 15

10 User Training N FF provides facilities for research on the fabrication of nanoelectronics devices to both faculty members and students from various departments at HKUST, and to other tertiary institutions, industry and the private sector. To ensure safety, anyone who wants to use the equipment must first enroll in the relevant safety and operation training courses and pass the admission examination. Safety Training NFF offers a course on the use of hazardous production materials. This course equips users with the know-how to handle materials during their research activities. The course topics are: Cleanroom Environment MSDS & Material Restriction Alarm System and Emergency Escape Route General Laboratory Safety Fire and Chemical Safety and Operation Safety 16 Operations Training NFF also offers an operations training course in which users learn to operate the machines a n d s y s t e m s i n N F F p r o p e r l y a n d t o avo i d contamination - the intrusion of impurities or dirt into the devices during various processes. The latter is important as it could lead to various kinds of failure such as degradation of oxide integrity, threshold voltage shift, leakage, poor pattern definition and so forth. The course topics are: Contamination Process Verification Scheme General Process Requirements Operation Guidelines Cleanliness Levels of and Wafer Status

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