Oxygen Diffusion Barrier Applied To High-k Thin Films Deposition. Norway. Contacts:

Transcription

1 / The Electrochemical Society Oxygen Diffusion Barrier Applied To High-k Thin Films Deposition E. Rauwel a,b, P. Rauwel c, F. Ducroquet d, I. Matko e and A. Lourenço a a Universidade de Aveiro, Dpt. de Fisica, CICECO, Aveiro, Portugal b University of Oslo, Dpt. of Chemistry, SFI-inGAP, P.O. Box 1033 Blindern, 0315 Oslo, Norway c University of Oslo, Dpt. of Physics, P.O. Box Blindern, 0316 Oslo, Norway d Minatec-G-INP, IMEP-LAHC, UMR CNRS 5130, Grenoble cedex 1, France e Institute of Physics SAS, , Bratislava, Slovakia Contacts: erwan.rauwel@kjemi.uio.no, alourenco@ua.pt The effect of a thin metallic interlayer deposited on Si substrate prior the sputtering of HfO 2 films was investigated. It was shown that the metallic interlayer acts as an oxygen barrier during the HfO 2 deposition. After annealing, the metal diffuses into the HfO 2 film and prevents the formation of a low-κ layer at the high-κ/si interface. However, in order to fully investigate the improvement in the interfacial and electrical properties, the thickness of the metallic interlayer needs to be adapted to the thickness of the HfO 2 film. Introduction Scaling down is one of the most important and effective ways of achieving low power and high-performance logic complementary metal oxide semiconductor (CMOS) operation (1). High dielectric constant (high-κ) materials, such as zirconium dioxide (ZrO 2 ), hafnium dioxide (HfO 2 ), lanthanum oxide (La 2 O 3 ), titanium dioxide (TiO 2 ), were suggested as gate dielectric films in the replacement of SiO 2 either mixed together or grown as silicates for the scaling down of metal oxide semiconductor field effect transistor (MOSFET) devices (2,3). Among them, hafnium-based compounds appear to be the most promising ones. Enhancing the dielectric constant (κ) of Hf-based oxides is of interest in order to reduce the gate leakage current and the static power consumption. However, other key parameters like the energy band offset to maintain a sufficiently low leakage current due to Schottky emission, a high thermal stability, threshold voltage stability, channel mobility and work function control (4) should at least be stabilized if not enhanced while working towards improvement of the dielectric constant. In fact, mobility degradation in MOSFETs with high-κ dielectric gate is one of the major issues for next generation CMOS technology. One of the proposed solutions is to form a SiO 2 based interfacial layer aimed towards trapping fixed charges inside the high-κ thin films and away from the channel. However, the role of this silicon based interlayer is to increase the equivalent oxide thickness (EOT). This means that the high-κ materials should be directly in contact with the Si substrate to promote EOT decrease without degrading the charge mobility. One of the most important challenges concerning the deposition of oxides on silicon substrate is to control the oxygen stoichiometry and to prevent the undesirable oxidation Downloaded on to IP address. Redistribution subject to ECS 497 terms of use (see ecsdl.org/site/terms_use)

2 of the substrate. Many recent works focused on the epitaxial growth of oxides on silicon to extend and enhance silicon technology (5). The deposition of oxide perovskite compounds like SrTiO 3 has been possible using fabrication techniques that allow atomically abrupt interface between an oxide and silicon (6), thus avoiding the formation of low-κ interlayer. This allowed the fabrication of a MOS device with an equivalent oxide thickness (EOT) of 1nm (7). This kind of device fabrication could be extended to ferroelectrics that are considered as good candidates for the SiO 2 replacement in MOSFETs (8). Nevertheless, the deposition of a crystalline oxide thin film on silicon with a sharp interface without any low-κ interlayer appears to be a real challenge. In fact, a recurrent problem is the diffusion of oxygen: oxygen can diffuse from the film to the substrate mainly due to chemical interactions across the interface (9-11). Ab initio calculations demonstrated the relationship between the possible interfacial reactions and the presence of highly diffusive O-based defects in the metal oxide thin films deposited on the silicon substrate. Moreover, during the process of thin film growth itself it was demonstrated that O atoms can diffuse across the interface and form suboxides (12). One of the current solutions to prevent this low-κ interlayer formation during the deposition of the high-κ gate dielectric is to perform a post-deposition annealing under NH 3, N 2 O or NO thus promoting the growth of a nitride interlayer (HfSiN) (13). However it is also possible to incorporate nitrogen during the deposition process (14). The drawback of these methods is that the interlayer is also a low-κ. Another method studied to avoid the formation of a low-κ interlayer consists of first depositing a Hf metal thin film followed by oxidation (15). However, this method usually induces the formation of Hf silicide and/or silicate at the interface. An original way to promote an abrupt interface between high-κ and silicon substrate without degrading the overall properties is of high priority. In an attempt to simultaneously avoid oxidation of the silicon substrate during the growth of the oxide film and improve the electrical properties of the high-κ gate we put forth a novel approach based on the deposition of a metallic interlayer as a first step (16). This method has the advantage of reducing the interfacial oxide layer. In fact, this metal nanolayer acts as a barrier against oxygen diffusion and prevents oxidation at the interface between the silicon substrate and the high-k dielectric thin film. Moreover, a post-deposition annealing treatment induces the diffusion of the metallic barrier into the high-κ thin film without degrading the interface between the silicon substrate and the high-κ. Depending on the metal, atoms will diffuse into the material and fill interstitial sites or vacancies inside the metal oxide film without increasing the volume of the material. This kind of method was already used for the Mg incorporation in lanthanidebased high-κ by Koyanagi et al. (17). Nevertheless, in their case the metallic layer was deposited on the top of the high-κ thin film. Ultrathin diffusion barrier was already applied in the case of copper encapsulation for semiconductor device (18). With reference to the literature, an adapted metallic diffusion barrier to prevent diffusion of oxygen into the Si substrate should be selected. In addition, the diffusion of this metallic interlayer into the dielectric thin film upon post-deposition annealing under nitrogen should also enhance the electrical properties of the high-κ dielectric without inducing leakage current. Downloaded on to IP address. Redistribution subject to ECS 498 terms of use (see ecsdl.org/site/terms_use)

3 The thin films deposition was performed at 400 C for both interlayer and high-κ thin film by sputtering under an atmosphere of inert gas. In a first approach Mg metallic interlayer was investigated and by varying the thickness of this metal diffusion barrier, we studied its influence on both interface quality and electrical properties. Experimental Mg metallic interlayer and HfO 2 films were both grown on p-type (100) Si/SiO 2 (~ nm) using the planar rf-sputtering method from 2 Mg metal and HfO 2 targets respectively. Before the Mg thin film deposition, the silicon substrates were previously cleaned by HF-last solution (9ml of water, 1 ml of methanol and 0,75ml of fluoric acid 40%) for 120s before the deposition in the aim to remove the native SiO 2 from the silicon substrate. Mg metal interlayers were deposited at 400ºC in a pure Ar atmosphere (P=5.0µbar) with a radiofrequency power of 25 Watt. The deposition time ranged from 1 to 5 minutes depending on the thickness of the Mg interlayer. Following the Mg interlayer deposition, HfO 2 thin films were deposited also at 400ºC in an Ar atmosphere (P=5.0µbar) with a radiofrequency power of 30 Watt. The interlayer and HfO 2 film thicknesses ranged from 2nm to 5nm and from 3nm to 30nm respectively. The films were characterized by X-ray diffraction, X-ray Reflectometry, scanning electron microscopy and transmission electron microscopy (TEM). X-ray diffraction (XRD) measurements were done using a Philips X Pert MPD diffractometers using Cu K α ( nm) radiation. X-ray Reflectometry (XRR) measurements were performed using a Siemens D5000 diffractometer equipped with a Gobel mirror that produces parallel Cu K α ( nm) radiation equipped with a Ni-filter in order to remove traces of Cu K β radiation. An environmental scanning electron microscope (SEM) Quanta 200F equipped with a field emission gun was used to study morphology. High resolution transmission electron microscopy (HRTEM) studies were carried out on a JEM2010F operating at 200kV and disposing a point to point resolution of 1.9 Å and on a JEOL 2010 operating at 200 kv and equipped with LaB6 filament with a point-to-point resolution of 1.7 nm. Films were annealed at 800ºC using a RTA system furnace JIPELEC Jetfirst. Capacitance vs voltage (C-V) and current vs voltage (I-V) characteristics were measured on MOS capacitors formed by evaporation of gold electrodes though a hard mask. I-V and C-V curves were recorded using a HP4156B parameter analyser and a HP4284 precision LCR meter (in the range 100Hz-1MHz), respectively. The equivalent oxide thickness was calculated from the capacitance in the charge accumulation mode. Structural properties Results and discussion Two XRD θ/2θ scans performed at grazing incidence are presented in Figure 1 for HfO 2 films grown at 400 C on SiO 2 /Si substrate or on Mg intermediate layer previously Downloaded on to IP address. Redistribution subject to ECS 499 terms of use (see ecsdl.org/site/terms_use)

4 deposited on the top of silicon substrate. The thicknesses of the films are 14.0nm and 19.5nm respectively. We observe that the Mg interlayer does not influence the crystalline structure of the HfO 2 film and only the monoclinic structure is visible on the XRD patterns HfO 2 deposited on SiO 2 HfO 2 deposited on Mg layer I (a.u.) θ ( o ) Figure 1. Grazing incidence X-ray diffraction performed on HfO 2 thin films deposited at 400ºC on Mg intermediate layer (black line), on SiO 2 (full triangle) of 19.5nm and 14.0nm thick respectively. The films were characterized by X-ray reflectometry to measure the thickness and estimate the roughness and density. In most cases the experimental curves can be fitted using a simple bilayer model: an interfacial SiO 2 layer or an interfacial Mg layer and a HfO 2 film. Figure 2 shows two typical experimental curves obtained on HfO 2 film grown at 400 C on (a) SiO 2 /Si and (b) Mg intermediate layer. The simulated curves fit with the measured curves. XRR measurements performed on all the films deposited on silicon substrates with or without Mg intermediate layer showed a very smooth surface. In most cases, after annealing the contribution of the Mg metallic interface, usually characterized by a series of large shoulders or a lower general slope of the XRR pattern, is unobvious here. The comparison of the XRR patterns (Fig. 3a) of as-deposited curve (black line) and annealed curve (full squares) clearly shows an increase of the slope that is typical from a decrease of interlayer contribution. Moreover, the fact that the measured thickness remains constant during the annealing treatment depicts as-deposited dense films and direct diffusion of the Mg metallic interlayer inside the oxide thin film and maybe for a lower contribution inside the silicon substrate (Fig. 3b). In fact, as it was demonstrated for other elements like zinc (19), metallic atoms can diffuse into another material (oxide or metal) by filing vacancies or interstitial sites without increasing the overall volume. It has been recently reported that Mg diffusion into Hf-based dielectrics is beneficial for the effective mobility (μ eff ) and increases the reliability of the devices (20). This method based on the Mg diffusion was studied by Koyanagi et al. for La 2 O 3 high-κ dielectric but the Mg metal was deposited on the top of the metal oxide thin film (17). Downloaded on to IP address. Redistribution subject to ECS 500 terms of use (see ecsdl.org/site/terms_use)

5 Intensity (a.u.) Intensity (a.u.) Theta (degrees) Theta (degrees) Figure 2. X-ray reflectometry curves measured on HfO 2 film grown at 400ºC on (a) SiO 2 /Si substrate and (b) Mg intermediate layer. A thickness of 5.9 and 6.2nm, a roughness of 0.2 and 0.3nm and a density of 11.0 and 10.7g.cm -3 were estimated respectively from simulation calculation. Measured curves (black line) are compared to the simulated pattern (full triangles). Intensity (a.u.) Theta (degrees) Intensity (a.u.) Theta (degrees) Figure 3. X-ray reflectometry curves measured on HfO 2 film grown at 400ºC on Mg intermediate layer: (a) comparison between as-grown (black line) and annealed (full square) films, (b) X-ray reflectometry curve and the corresponding simulation measured on annealed HfO 2 film: a thickness of 11.4nm, a roughness of 0.4nm and a density of 9.8g/cm -3 were determined. In order to study the quality of the interface between the high-κ dielectric thin film and the silicon substrate, we investigated the morphology of this metallic interlayer using TEM. HRTEM images recorded from cross-section preparation confirmed that the films are smooth and present a high density. Figure 4a shows that a 6nm thick HfO 2 thin film grown on SiO 2 /Si substrate presents a usual SiO 2 interlayer of about 1.3nm. This corresponds to the native SiO 2 oxide on the surface of the substrate and to the growth of a low-κ interlayer during the deposition process itself. The comparison with a HfO 2 thin film deposited on a Mg intermediate layer (Fig. 4b) shows that only a small interlayer of about 0.4nm is visible for a deposited thin film of 19nm thick. This interlayer is Downloaded on to IP address. Redistribution subject to ECS 501 terms of use (see ecsdl.org/site/terms_use)

6 composed of Mg metal and no low-κ metal oxide is visible. This result demonstrates that the deposition of a metal oxide thin film on the top of a thin metallic layer deposited on a silicon substrate will not oxidize the metallic interlayer during the deposition in an inert gas environment. Figure 4. Comparison of two HRTEM micrographs obtained from cross-sections of: (a) 6nm HfO 2 thin film deposited on Si(100) substrate with a SiO 2 interlayer of 1.4nm, (b) 19nm HfO 2 thin film deposited on Si(100) substrate with a Mg intermediate layer of 0.4nm. Effect of the rapid thermal annealing treatment on the microstructure Thick interlayer coupled with thick HfO 2 films was first studied in order to investigate the degree of diffusion of the interlayer. Figure 5a shows a HRTEM image of a 28nm HfO 2 thin film deposited on the top of a 3nm thick metallic intermediate layer. Following a RTA treatment at 800ºC for 1minute under N 2 an important decrease of the thickness of the interlayer was observed. Mg atoms diffused directly inside the metal oxide thin films without increasing the thickness of the film. The thickness of the film decreases from 28nm to 26nm and simultaneously the Mg intermediate layer decreases from 3nm to 0.4nm (Fig. 5b). Moreover, the TEM observation showed that in that case, the RTA treatment does not induce any formation of low-κ interlayer between the high-κ metal oxide and the silicon substrate. Downloaded on to IP address. Redistribution subject to ECS 502 terms of use (see ecsdl.org/site/terms_use)

7 Figure 5. Comparison of two HRTEM micrographs obtained from cross-sections of thick HfO 2 films deposited on Mg interlayer: (a) without (b) with RTA treatment at 800ºC for 1min under N 2. The metallic intermediate interlayer decreases from 3nm to 0.4nm. In the case of a thinner metal oxide film apparently the intermediate layer cannot fully diffuse into the metal oxide thin film and saturation probably occurs. Figure 6a shows a TEM image of a 5nm thick film grown on a 3nm Mg intermediate layer. RTA treatment at 800ºC for 1 minute under N 2 does not allow the intermediate layer to fully diffuse into the metal oxide film. The intermediate layer thickness decreases from 3nm to 2nm. Figure 6. Comparison of two HRTEM micrographs obtained from cross-sections of thin HfO 2 films deposited on Mg interlayer: (a) without (b) with RTA treatment at 800ºC for 1min under N 2. The metallic intermediate interlayer decreases from 3nm to 2nm. Downloaded on to IP address. Redistribution subject to ECS 503 terms of use (see ecsdl.org/site/terms_use)

8 These first results showed the possibility to prevent oxidation of the silicon substrate during the deposition process by using a metal intermediate layer. This intermediate layer also prevents the low-κ formation during the RTA treatment. However, the thickness of the metallic intermediate layer seems to be dependent on the thickness of the metal oxide thin film deposited subsequently. In fact, it is highly probable that saturation like scenario occurs when the intermediate layer is too thick compared to the thickness of the dielectric high-κ thin film. Dielectric properties and leakage current The electrical properties of the dielectric thin films were studied for both as-grown and annealed thin films (Fig. 7). For as-grown films, as expected, the presence of the Mg interlayer contributes to greatly degrade the C-V and I-V curves. After annealing and metal diffusion, the electrical properties are strongly improved. C-V characteristics show a good behavior in accumulation (EOT~11.9nm) for a film thickness of 26nm. Nevertheless, small hysteresis effects and capacitance response in the inversion region indicate that interface and oxide traps have to be completely eliminated during the annealing. Further investigations are still needed to properly optimize the post-deposition thermal treatments. A higher temperature or longer annealing may be necessary to fully improve the electrical properties. Capacitance (F) 2.00E E E E-012 As deposited film 1kHz As deposited film 10kHz Annealed film 1kHz Annealed film 10kHz 4.00E Voltage (Volts) Figure 7. C-V characteristics of an as-deposited (empty and full squares) and annealed at 800ºC for 1min under N 2 (empty and full triangles) HfO 2 films deposited on Mg intermediate layer. Film thicknesses are 27 and 26nm respectively. Figure 8 shows that the leakage current is also improved after annealing. In fact, the accumulation current density is reduced by a factor of 10 3 at -10V, reaching a level of A/cm 2 and appears more stable than for the as-grown film. In a first approach, the RTA treatment showed a real improvement of the overall electric properties. Downloaded on to IP address. Redistribution subject to ECS 504 terms of use (see ecsdl.org/site/terms_use)

9 J L (A.cm -2 ) V (Volts) Figure 8. J-V characteristics of an as-deposited (empty circles) and annealed at 800ºC for 1min under N 2 (full triangles) HfO 2 films deposited on Mg intermediate layer. Films thicknesses are 27 and 26nm respectively. Conclusion We demonstrated the possibility to use a metal interlayer as an oxygen diffusion barrier for oxide thin film deposition on silicon substrate. The diffusion of oxygen through the metallic interface must be blocked. This should occur within a few atomic layers close to the interface film layer/substrate. The intermediate layer should not deteriorate the electrical properties. In fact, every precaution should be taken to ensure that the intermediate layer increases the effective mobility, flat-band voltage and decreases interfacial defects. Other experiments are under way and this first study puts forth the feasibility of this method to prevent the growth of a low-κ interface. Acknowledgments Financial support from Marie Curie (PERG05-GA ) and FCT grant SFRH/BPD/45136/2008 and the Norwegian research council is acknowledged. References 1. International Technology Roadmap for Semiconductors, 2. G. D. Wilk, R. M. Wallace, and J. M. Anthony, J. Appl. Phys., 89, 5243 (2001). 3. J. Robertson, Rep. Prog. Phys., 69, 327 (2006). Downloaded on to IP address. Redistribution subject to ECS 505 terms of use (see ecsdl.org/site/terms_use)

10 4. J. Robertson, J. Appl. Phys., 104, (2008). 5. J. W. Reiner, A. M. Kolpak, Y. Segal, K. F. Garrity, S. Ismael-Beigi, C. H. Ahn and F. J. Walker, Adv. Mater., xx, 1-20 (2010). 6. X. Hu, H. Li, Y. Liang, Y. Wei, Z. Yu, D. Marshall, J. Edwards, Jr., R. Droopad, X. Zhang, A. A. Demkov and K. Moore, Appl. Phys. Lett., 82, 203 (2003). 7. R. A. McKee, F. J. Walker, M. F. Chisholm, Phys. Rev. Lett., 81, 3014 (1998). 8. D.H. Looney, US Patent 2,791,758 (1957). 9. S. Stemmer, J. Vac. Sci. Technol. B, 22, 791 (2004). 10. C. Tang, R. Ramprasad, Phys. Rev. B, 75, (2007). 11. M. Kadoshima, M Hiratani, Y. Shimamoto, K. Torii, H. Miki, S. Kimura, T. Nabatame, Thin Solid Films, 424, 224 (2003). 12. M. H. Hakala, A. S. Foster, J.L. Gavartin, P. Havu, M. J. Puska and R. M. Nieminen, J. Appl. Phys., 100, (2006). 13. D. H. Triyoso, R. I. Hegde, J. Grant, P. Fejes, R. Liu, D. Roan, M. Ramon, D. Werho, R. Rai, L. B. La, J. Baker, C. Garza, T. Guenther, J. B. E. White and P. J. Tobin, J. Vac. Sci. Technol. B, 22, (2004). 14. Y. Senzaki, (U.S. Patent, WO/2005/050715, 2005). 15. Y. Oniki, Y. Iwazaki, M. Hasumi, T. Ueno and K. Kuroiwa, Jpn. J. Appl. Phys., 48, 05DA01 (2009). 16. E. Rauwel and A. Lourenço, Patent Application PCT-IB2009/ (2009). 17. T. Koyanagi, K. Tachi, K. Okamoto, K. Kakushima, P. Ahmet, K. Tsutsui, N. Sugii, T. Hattori, and H. Iwai, Jpn. J. Appl. Phys., 48, O5DC02 (2009). 18. Q.-Z. Hong and W.-Y. Hsu, U.S. Patent 6,077,774 (2000). 19. A.D. Smigelskas and E.O. Kirkendall, Trans. AIME, 171, (1947). 20. N. Mise, T. Morooka, T. Eimori, S. Kamiyama, K. Murayama, M. Sato, T. Ono, Y. Nara and Y. Ohji, IEDM Tech. Dig. p. 527 (2007). Downloaded on to IP address. Redistribution subject to ECS 506 terms of use (see ecsdl.org/site/terms_use)