DEFECT DYNAMICS IN DOPED CERIA ELECTROLYTES

Transcription

1 DEFECT DYNAMICS IN DOPED CERIA ELECTROLYTES By SOUMITRA SULEKAR A DISSERTATION PRESENTED TO THE GRADUATE SCHOOL OF THE UNIVERSITY OF FLORIDA IN PARTIAL FULFILLMENT OF THE REQUIREMENTS FOR THE DEGREE OF DOCTOR OF PHILOSOPHY UNIVERSITY OF FLORIDA 2017

2 2017 Soumitra Sulekar

3 To my family and friends

4 ACKNOWLEDGMENTS First and foremost, I would like to express my gratitude towards my advisor, Dr. Juan C. Nino. Without his guidance and constant support, this work and my Ph.D. would not have been possible. Throughout my time here at the University of Florida, he has been a constant source of inspiration. At times, when I felt lost, it was he who pointed me in the right direction and gave me motivation. His constant high standards and demand for improvement has given me a vision for perfection, and a work ethic which I will carry for the rest of my life. I thank Professor Perry, Professor Andrew, Professor Sigmund, and Professor Weaver, for being on my advisory committee and giving me their time and advice. At the Nino Research group, I have had the privilege and pleasure of working with some of the smartest, brightest and diverse group people I have known. I would like to thank all the past and present members of the group for their company, the stimulating discussions, and all the constructive criticism. I specially thank Mehrad Mehr and Ji Kim for their contribution to the reducing atmosphere sintering work, Paul Johns for always pushing me to grow better BiI3 single crystals, and Hiraku Maruyama and Mariia Stozhkova for their help with the MARMOT simulation validation work. I would also like to thank visiting researchers Andres Romero and Marcia Meireles for their help with the impedance testing of thin films under bias. Finally, I would like to thank undergraduate students Ji Kim, Tatiana Konstantis, Elisa Cristino, and Ryan Russell for the many hours they have spent helping with experiments. I would also like to thank Andres Trucco at the Nanoscale Research Facility at the University of Florida for his help with the electron probe micro-analysis work presented in 4

5 this dissertation. Without the help and support of all these collaborators and group members, this work would not be possible. I thank my family whose support and guidance has made me who I am today. I also thank my friends at the group, especially Mehrad and Ji, for putting up with me. I thank my roommates and friends amongst the Indian student community here who helped me make my time in Gainesville more enjoyable. A part of this dissertation is based upon work supported by the National Science Foundation Grant No. DMR Any opinions, findings, conclusions or recommendations expressed in this publication are those of the author and do not necessarily reflect the views of the National Science Foundation. 5

6 TABLE OF CONTENTS page ACKNOWLEDGMENTS... 4 LIST OF FIGURES... 9 LIST OF TABLES ABSTRACT CHAPTER 1 INTRODUCTION Statement of Problem and Motivation Scientific Approach Organization of Dissertation Contributions to the Field BACKGROUND AND MOTIVATION Fuel Cells Solid Oxide Fuel Cells Gadolinia Doped Ceria Ionic Conductivity Dopant Concentration and Defect Associates Dopant and Impurity Segregation Impedance Spectroscopy EXPERIMENTAL PROCEDURES Sample Preparation Bulk Samples Sintering under Reducing Atmosphere Thin Film Fabrication Profilometry X-Ray Diffraction Microstructural Characterization AC Impedance Spectroscopy DC I-V Measurement PROTOCOL FOR IMPEDANCE TESTING AND DATA ANALYSIS Common Mistakes Best Practices Definitions of Parameters

7 4.2.2 Selection and Fitting of Appropriate Equivalent Circuit Starting Values for Fitting Quality of Fit IMPEDANCE RESULTS FOR THIN FILM AND BULK SAMPLES Thin Film Samples Bulk Samples EFFECT OF A DC BIAS ON IMPEDANCE RESULTS Background Bias Effect on GDC Thin Films Characteristic Steps in Nyquist Plots under Bias Fitting and Analysis Mechanism Low Bias Medium Bias High Bias DOPANT SEGREGATION AND SINTERING UNDER REDUCING ATMOSPHERE Segregation and Defect Associates Fast firing and Microwave Sintering Sintering under Reducing Atmosphere Electron Probe Micro-Analysis Conductivity Measurements SUMMARY AND FUTURE WORK Summary Protocol for Impedance Data Analysis Impedance and Effect of DC Bias Sintering under Reducing Atmosphere Future Work Effect of DC Bias Sintering under Reducing Atmosphere A IMPEDANCE DATA FITTING WITH ZVIEW B DIELECTRIC POLARIZATION FUNCTIONS C THERMALLY STIMULATED DEPOLARIZATION CURRENT D COLOSSAL PERMITTIVITY IN BARIUM STRONTIUM TITANATE D.1 Introduction

8 D.2 Experimental procedure D.2.1 Fabrication D.2.2 Characterization D.3 Results and Discussion D.3.1 Dielectric Spectroscopy D.3.2 Impedance Spectroscopy D.3.3 Polarization mechanisms D Debye Model D Universal Dielectric Response Model D Thermal Hopping Polaron Model D.3.4 Internal Barrier Layer Capacitor D.3.5 Variable Range and Nearest Neighbor Hopping D.4 Summary E I DON T KNOW WHAT THIS MEANS BUT LIST OF REFERENCES BIOGRAPHICAL SKETCH

9 Figure LIST OF FIGURES page 2-1 Schematic of a solid oxide fuel cell Ionic conductivity for different fluorite oxide electrolytes with respect to temperature adapted from B.C.H. Steele Cubic fluorite unit cell of cerium oxide Doping and oxygen vacancy jump in acceptor doped ceria Grain ionic conductivity of different doped ceria electrolyte materials as a function of temperature after Gerhardt-Anderson and Nowick Conductivity as a function of dopant concentration in the (CeO2)1-x(Sm2O3)x system at different temperatures after Yahiro et al Arrhenius plots for the grain ionic conductivity of Sm/Nd co-doped ceria as shown by Omar et al Transmission electron micrographs showing segregation of siliceous phases Schematic of a grain boundary in an oxide ion conductor Atom probe tomography data for a grain boundary in 10 mol% Nd doped ceria adapted from Diercks et al Impedance response in a 3D perspective plots for a 10 mol% gadolinia doped ceria sample Schematic of complex impedance plot obtained using EIS for a polycrystalline electroded sample adapted from Omar Flow chart for conventional solid state processing of ceramic materials (left) and that for the co-precipitation route (right) Examples of green and sintered pellets of cerium oxide The magnetron sputtering setup at Universidad del Valle in Cali, Colombia used for deposition of GDC thin films Schematic of a gadolinia doped ceria thin film on top of a Pt/TiO2/SiO2/Si substrate with Pt electrodes on top adapted from R. Kasse Image of a gadolinia doped ceria thin film (left) and optical micrograph showing the surface of the film with the circular Pt top electrodes (right)

10 3-6 Graph showing an example of the profilometry data for a GDC thin film under study X-ray diffraction pattern for 10 mol% gadolinia doped ceria sintered sample A scanning electron micrograph showing the microstructure on the surface of a 10 mol% GDC bulk pellet A scanning electron micrograph of the surface of a GDC thin film Scanning electron micrographs of the edge of a gadolinia doped ceria film showing the different layers The setup for impedance spectroscopy of bulk samples at different temperatures The reactor setup used for EIS (left) and an example of an electroded bulk sample (right) Probe station setup for electrical testing of thin films Schematic of probe contact adapted from R. Kasse (left) and a picture of the same (right) for across plane impedance measurement Flow diagram for the measurement and characterization of material electrode system adapted from Macdonald Numbering systems for quadrants in the coordinate system used throughout this work Schematic showing shift in complex impedance plots and the respective equivalent circuits Example data set showing the difference between linear and log representations Sample data showing a complex impedance plot and the frequency explicit plot of theta for the same data which enhances the data in the blue box Imaginary part of the impedance as a function of frequency with α as a parameter. Figure adapted from Orazem et al Schematic of log Y against log ω with a low frequency plateau and a high frequency dispersion adapted from Abram et al An example of residuals for the real and imaginary parts of impedance Nyquist plot showing impedance data for a 267 nm 10GDC thin film at different temperatures

11 5-2 Complex impedance plot showing the data for a 10 GDC 267 nm thin film at 130ºC along with the equivalent circuit used to fit the data A plot of log Y versus log ω for estimating the values of CPE-P and CPE-T for the 10 GDC bulk sample Arrhenius plot showing the grain ionic conductivity for a single electrode on the 10GDC thin film accounting for error propagation Arrhenius plot showing the average grain ionic conductivity for multiple electrodes on a 10GDC thin film with 95% confidence bands Complex impedance data for a 10GDC bulk sample at different temperatures Arrhenius plot showing the average grain ionic conductivity of the 10GDC samples at different temperatures Schematic representation of the oxygen vacancy concentration and the space charge layer without any applied bias (left) and with an applied bias (right), as proposed by Guo and Waser Impedance complex plane plots for 8 mol% YSZ at different temperatures and DC bias values as shown by Masó and West where 10 V 43 V-cm Oxygen concentration in the region adjacent to the Pt cathode interface in a TiOx single crystal after degradation under 15 V bias determined using EELS as shown by and adapted from Moballegh and Dickey A schematic showing concentration of vacancies in an Fe-SrTiO3 film at high and low frequencies and the corresponding Nyquist plot showing an inductive loop, adapted from Taibl et al The brick layer model for a polycrystalline ceramic with the paths for conduction as shown by and adapted from Macdonald Schematic showing ionic and electronic conduction paths for a polycrystalline ceramic assumed to have a brick layer model as proposed by and adapted from Guo and Waser Inversion layer with high electron concentration near the grain boundary adapted from Guo et al Complex impedance plot showing the effect of a low DC bias on 10 mol% doped gadolinia doped ceria bulk specimen at 200ºC Nyquist plot showing the example of a DC bias effect on a 267 nm thick 10 mol% GDC film at 120⁰C

12 6-10 Nyquist plots showing the effect of a DC bias on a 267 nm thick 10 mol% GDC film at different temperatures A very detailed plot showing every step in the evolution of a 10 mol% gadolinia doped ceria thin film under bias at 130⁰C Nyquist plot showing characteristic steps in the evolution of the impedance response of a 10GDC thin film under increasing bias Frequency explicit plots showing the magnitude of impedance Z and the phase angle as a function of different DC bias values for a 10 GDC, 267 nm thin film Frequency explicit plots showing the real and imaginary parts of impedance (Z and -Z respectively) as a function of applied DC bias for a 10GDC 267 nm thin film Frequency explicit plot showing the real permittivity for different bias values for a 10GDC 267 nm film Proposed equivalent circuit based on the visual analysis of the data in different formalisms and similar data presented in literature Equivalent circuits used to fit impedance data shown in Figure 6-12 along with the respective bias values Plot showing the values of R1 (grain resistance) for different applied bias, obtained using equivalent circuit fitting of impedance data for a 10GDC 267 nm film at 130ºC Plot showing the values of R2 (grain boundary resistance) for different applied bias, obtained using equivalent circuit fitting of impedance data for a 10GDC 267 nm film at 130ºC Plot showing the values of R3 (representing electronic conduction) for different applied bias, obtained using equivalent circuit fitting of impedance data for a 10GDC 267 nm film at 130ºC Plot showing the values of L (inductance) for different applied bias, obtained using equivalent circuit fitting of impedance data for a 10GDC 267 nm film at 130ºC Schematic Brouwer diagram for acceptor doped ceria adapted from Eufinger et al Schematic of a gadolinia doped ceria sample under low bias

13 6-24 Leakage current as a function of time and different applied DC voltages for a 10GDC 267 nm thin film measured at 120ºC Schematic showing phenomena during impedance testing under medium bias in gadolinia doped ceria Schematic band diagrams showing the cathode and anode interface under bias Schematic showing phenomena during impedance testing under high bias in gadolinia doped ceria DC I-V measurement and complex impedance with matching resistances for a 10GDC 267 nm film at 130ºC under 2.1 V bias and oscillation voltage of 300 mv A sub-surface triple grain junction in Sm/Nd doped ceria obtained using focused ion beam. EDS line scans were conducted across this junction (Performed by Bruce Peacock at Medtronic Inc.) EDS line scans across a sub-surface triple grain junction in a Sm/Nd doped ceria sample sintered conventionally. Sm segregation is observed (Performed by Bruce Peacock at Medtronic Inc.) EDS line scans across the surface of a Sm/Nd doped ceria sample sintered in a microwave. Both Sm and Nd are relatively uniformly distributed (Performed by Bruce Peacock at Medtronic Inc.) Schematic of dopant and vacancy distribution at grain boundaries for a sample sintered in air (left) and for one sintered in H2 and re-oxidized (right) Appearance of a 10GDC control pellet sintered at 1600⁰C for 10 hours (left) and one sintered under 4%H2-N2 at 1100⁰C for 20 hours (right) WDS spectra from the LPET (top) and LLIF (bottom) detectors used to characterize Ce and Gd distribution using EPMA, shown here for a GDC conventional sample after sintering BSE image for 10GDC control sample EPMA area scan for Gd Lβ peak, for 10 GDC control sample EPMA area scan for Ce Lα peak, for 10 GDC control sample EPMA area scan for O Kα peak, for 10 GDC control sample Line scans of O, Gd and Ce concentration across a representative grain boundary in the 10GDC control sample

14 7-12 BSE image for 10 GDC sample sintered under 4%H2-N2 at 1100⁰C for 20 hours followed by re-oxidation at 900⁰C for 24 hours EPMA area scan for Gd Lβ peak, for 10 GDC sample sintered under 4%H2- N2 at 1100⁰C for 20 hours followed by re-oxidation at 900⁰C for 24 hours EPMA area scan for Ce Lα peak, for 10 GDC sample sintered under 4%H2-N2 at 1100⁰C for 20 hours followed by re-oxidation at 900⁰C for 24 hours EPMA area scan for O Kα peak, for 10 GDC sample sintered under 4%H2-N2 at 1100⁰C for 20 hours followed by re-oxidation at 900⁰C for 24 hours Line scans of O, Gd and Ce concentration across a representative grain boundary in the 10GDC sample sintered under 4%H2-N2 at 1100⁰C for 20 hours followed by re-oxidation at 900⁰C for 24 hours Normalized Nyquist plot showing the comparison between the 10GDC control and H2 sintered samples measure at 300⁰C in air Arrhenius type plot of grain conductivity with respect to temperature for the 10GDC control and H2 sintered samples Arrhenius type plot of total conductivity with respect to temperature for the 10GDC control and H2 sintered samples B-1 Schematic representing the complex plane plot for permittivity according to Debye theory (left) and the effect of the exponents and C-1 Schematic diagram of polarization and heating profile for TSDC measurement C-2 A schematic of an expected TSDC spectrum for doped ceria C-3 TSDC results showing the current density with respect to temperature for a 10 mol% gadolinia doped ceria sample with different polarizing temperatures and heating rates C-4 Arrhenius plots of the current density with respect to temperature for the two peaks in Figure C C-5 Plot showing the effect of polarizing temperature on TSDC peak intensity for a 10 mol% gadolinia doped ceria sample C-6 Plot showing the effect of different dopants and different dopant concentrations on TSDC peak intensity D-1 Variation of the real part of relative permittivity and losses (tan) as a function of frequency for the Ba1 xsrxtio3 nanoceramics at 300K

15 D-2 Variation of the real part of the relative permittivity and losses (tan) as a function of temperature measured at 1 khz for the Ba1 xsrxtio3 δ nanoceramics D-3 Impedance complex plane plots and Z /M spectroscopic plots at 170 K, and capacitance data at 150 and 170 K for Ba0.8Sr0.2TiO3 δ (a, c and e) and Ba0.2Sr0.8TiO3 δ (b, d and f) nanoceramics D-4 Variation of the real parts (a) and (c) and the imaginary parts (b) and (d) of permittivity as a function of temperature and at different frequencies for Ba0.8Sr0.2TiO3 δ and Ba0.2Sr0.8TiO3 δ nanoceramics D-5 Temperature dependence of relaxation frequency for Ba0.8Sr0.2TiO3 δ and Ba0.2Sr0.8TiO3 δ nanoceramics D-6 Variation of the real part (a) and (c) and the imaginary part (b) and (d) of permittivity as a function of frequency and at different temperatures for Ba0.8Sr0.2TiO3 δ and Ba0.2Sr0.8TiO3 δ nanoceramics D-7 r f vs. f plot in log log scales for (a) Ba0.8Sr0.2TiO3 δ and (b) Ba0.2Sr0.8TiO3 δ dense nanoceramics at different temperatures (40 300K) D-8 Activation energy values extracted from the hopping polarons model for Ba0.8Sr0.2TiO3 δ and Ba0.2Sr0.8TiO3 δ nanoceramics D-9 BST permittivity data fitted with IBLC model D-10 Frequency dependence of the conductivity at different temperatures for (a) Ba0.8Sr0.2TiO3-δ and (b) Ba0.2Sr0.8TiO3 δ D-11 NNH model applied to BST nanoceramics D-12 Temperature dependence of DC bulk conductivity of Ba0.8Sr0.2TiO3 δ nanoceramic sample E-1 M peak position frequency as a function of temperature and bias

16 Table LIST OF TABLES page 3-1 Sources of experimental errors involved in the impedance measurement and fitting for a GDC sample The values for equivalent circuit parameters obtained after fitting of the impedance data shown in figure D-1 Dielectric properties of the Ba1 xsrxtio3 δ nanoceramics D-2 Calculated activation energies and s values for BST compounds using three different analytical models D-3 Fitting parameters using the IBLC model D-4 Fitting parameters using the UDR model

17 LIST OF ABBREVIATIONS 10GDC AC At% BSE CPE DC EDS EIS EPMA GDC IT-SOFC I-V Mol% SEM Sm/NdDC SOFC SPS WDS Wt% XRD YSZ 10 mol% Gadolinia Doped Ceria Alternating Current Atomic Percent Backscattered Electron Constant Phase Element Direct Current Energy Dispersive Spectroscopy Electrochemical Impedance Spectroscopy Electron Probe Micro-analysis Gadolinia Doped Ceria Intermediate Temperature Solid Oxide Fuel Cell Current-Voltage Mole Percent Scanning Electron Microscopy Samarium Neodymium Co-doped Ceria Solid Oxide Fuel Cell Spark Plasma Sintering Wavelength Dispersive Spectroscopy Weight Percent X-ray Diffraction Yttria Stabilized Zirconia 17

18 Abstract of Dissertation Presented to the Graduate School of the University of Florida in Partial Fulfillment of the Requirements for the Degree of Doctor of Philosophy DEFECT DYNAMICS IN DOPED CERIA ELECTROLYTES Chair: Juan C. Nino Major: Materials Science and Engineering By Soumitra Sulekar May 2017 Gadolinia doped ceria is a well-established material use as electrolyte in intermediate temperature solid oxide fuel cells. Trivalent acceptor dopants such as gadolinium substitute the Ce 4+ ions and lead to ionic conductivity in ceria by creating oxygen vacancies, which act as charge carriers. Numerous doping schemes have been studied to elicit the highest possible ionic conductivity from these materials in the intermediate temperature range. During the sintering step of processing, these dopants, the accompanying oxygen vacancies and any impurities tend to segregate to the high energy grain boundaries. This high concentration of dopants at grain boundaries and triple points, and dopant-vacancy interaction makes these regions highly resistive. Many changes have been proposed to the conventional solid state processing route used to fabricate these materials. Techniques like co-precipitation of starting powders, fast firing achieved by various means, and grain size control have been successfully shown to improve the ionic conductivity. In this work, the effect of additional new stimuli on the defect equilibria, defect interactions and the behavior of grain boundaries was studied. The phenomenon of mixed ionic and electronic conductivity in gadolinia doped ceria thin films produced using magnetron sputtering under the effect of an applied DC 18

19 bias was studied. Electrochemical impedance spectroscopy was used to measure the change in impedance under applied biases of ~ 4-20 kv/mm and an alternating voltage of 300 mv at temperatures between 25⁰C and 350⁰C. The application of a DC bias produces a reversible decrease in both the grain and grain boundary resistances for GDC. Many acceptor-doped dielectrics have been shown to exhibit similar mixed ionic and electronic conductivity under the application of a DC bias. New features become visible in the Nyquist plots with increasing bias, drastically changing the material behavior. Particularly interesting is the appearance of inductive loops in the low frequency regime, at very high bias values, rarely seen for this kind of a system. Here this novel behavior was analyzed by fitting the data using equivalent circuits to understand the underlying mechanisms at play. Through this work, it was established that the change in behavior is attributed to electronic conduction through grain boundaries parallel to the direction of the applied field. As a prelude to this process a protocol for better and more accurate analysis of impedance data was established. Different impedance formalisms and different ways of visualizing data were studied and were shown to provide more information about the different phenomena at play, helped in identifying circuit elements for equivalent circuits, and in general better analyzing the data. Additionally, a novel method was proposed to arrest the segregation of dopants, and improve the ionic conductivity. Fast firing techniques commonly used towards such ends, exploit the kinetics of diffusion to solve this issue. In this approach, however, the energetics of the system are also modified, where gadolinia doped ceria is sintered under a reducing atmosphere. The reducing atmosphere changes the valence of Ce 4+ to Ce 3+, thus reducing the tendency of the Gd 3+ dopant ions to segregate. On re-oxidation, the 19

20 material returns to the previous state, except without any dopant segregation. The ionic conductivity improves as the resistance across the grain boundary drops, when compared with conventionally processed samples. Using electron probe micro-analysis, the distribution of dopants was characterized. It was shown that the dopants do not segregate in samples sintered under a reducing atmosphere and subsequently re-oxidized. A comparison of conductivity determined using impedance spectroscopy showed an improvement in conductivity as compared to the conventional processing route. 20

21 1. CHAPTER 1 INTRODUCTION 1.1. Statement of Problem and Motivation The world population as of March 2017 has been estimated at above 7.4 billion people. It has grown from about 6 billion in the year 2000 at a growth rate of almost 1.1% per year. 1 Such a high population growth rate combined with increased per capita energy consumption, has led to a continuous increase in demand for energy. 2 Fossil fuels are a major source of energy for the world. Given the non-renewable nature and shortage of fossil fuels, pollution caused by their extraction and use, and global warming and its effects on the environment and human habitat, there is a need to move towards more sustainable and clean energy systems such as solar cells, wind mills, fuel cells, and batteries. It also calls for sources which are portable and more adaptable to distributed systems. Fuel cells in particular show significant promise just in terms of the number of their potential applications. They can be used to power anything from utility power stations to cars, to consumer electronic devices. 3,4 Amongst the various fuel cell technologies under development, solid oxide fuel cells (SOFCs) are particularly attractive given their scalability, modularity, durability, portability, and fuel flexibility. 5 Various materials have been considered over the years as possible candidates for use in solid oxide fuel cells 6 with companies like Bloom Energy and Redox Power Systems currently using yttria stabilized zirconia and ceria based Sm/Nd co-doped systems respectively. Amongst the different components and materials, this work focusses on the ionically conducting electrolyte part of the SOFCs. The material of choice for this study is gadolinia doped ceria (GDC) owing to its relatively high ionic conductivity and thermal stability at intermediate temperatures (400⁰C - 600⁰C). 7 21

22 High operating temperatures of SOFCs reduces their portability, and places constraints on the materials that can be used for various components of the fuel cell stack, eventually making them unviable economically. The ionic conductivity and stability of the electrolyte material are the main limiting factors for low temperature SOFC use. In order for them to be economically viable and be able to be used in portable applications, materials that show good intermediate temperature ionic conductivity and stability are called for. Rare earth doped ceria compounds have been shown to be some of the best for SOFC electrolyte application. 7,8 Various processing techniques have been proposed for improving the ionic conductivity of doped ceria compounds in the intermediate temperature range. Ionic defects are what makes ionic conductivity in doped ceria possible in the first place. Any changes in the defect type, distribution, concentration, and mobility has the ability to drastically improve or degrade the electrical properties of the material. It is hence essential to understand and exploit these defects for better performance, and tailor the processing and operational conditions accordingly. Over the past decade, a lot of work has been done studying and optimizing various factors like the nature of defects, their interactions and the effect of different processing parameters and stimuli on these defects and the resulting change in ionic conductivity. This optimization has led to several commercial applications as mentioned before. With the basics of structure-property-processing relationships for fuel cell materials in place, this work takes the luxury to look at newer interesting phenomena, which could possibly open up other avenues and applications for the material, such as for mixed ionic and electronic conducting applications or for splitting of water. The effect of a DC bias and processing under reducing atmospheres and their effect on the distribution and 22

23 mobility of defects present in gadolinia doped ceria are the goal of this body of work. For this purpose, both bulk and thin film forms of gadolinia doped ceria are studied with the focus being on complex impedance, it being the electrical property of choice, which helps determine different conduction mechanisms Scientific Approach The focus of this dissertation is to understand the various defect mechanisms in rare earth doped ceria electrolytes in solid oxide fuel cells, with the goal of better tailoring them for intermediate temperature use. A detailed background about solid oxide fuel cells, the materials used, and the mechanisms responsible for ionic conductivity is first provided. The principal method used to measure ionic conductivity in ceramic materials is electrochemical impedance spectroscopy. The analysis of data using equivalent circuits and assigning physical models based on the different circuit elements however can be very challenging. Towards this end, the first part of the study looks at existing analysis techniques and compiles a protocol for impedance data fitting and analysis to give more reproducible and accurate results. This protocol is used throughout this body of work for the analysis of both bulk and thin film impedance data. The various factors affecting the intermediate temperature ionic conductivity in doped ceria materials are also discussed. Despite the extensive work done in this area, there is still little understanding about the underlying mechanisms and the defects responsible for the conductivity, the role of grains and grain boundaries, and their behavior under various stimuli. To study this, the present work looks at the effect of a DC bias on the complex impedance behavior in doped ceria materials. Novel mechanisms 23

24 are proposed to explain the interesting new effects being observed. To better understand the effects being observed here, DC I-V measurements performed at different sweep speeds are used to better inform the interpretation and analysis of impedance data. The second part of this dissertation looks at improving ionic conductivity by proposing new processing routes. Dopant and impurity segregation at grain boundaries and triple points during fabrication leads to increased resistance. Various processing techniques have been used to address this, and improve the ionic conductivity of doped ceria in the intermediate temperature range. These techniques however, focus only on exploiting the kinetics of the sintering process. This work exploits the thermodynamics of defects along with the kinetics, by sintering doped ceria samples under a reducing atmosphere, as compared to conventional techniques. The hypothesis is that the reducing atmosphere prevents segregation of dopants, and leads to improvement in ionic conductivity. The question is investigated using electron probe micro analysis and impedance spectroscopy Organization of Dissertation Chapter 2 provides the background information about solid oxide fuel cells, the materials of interest, and their relevant structural information. It discusses the existing knowledge about the underlying mechanisms for ionic conduction, the role played by defects, and the effect of various factors like dopant concentration, impurities, and processing conditions. In addition, the technique of electrochemical impedance spectroscopy is also introduced, given that a bulk of this work is based on this technique. 24

25 Chapter 3 details the experimental procedures used to fabricate and process the thin film and bulk ceria samples. It also covers the characterization techniques, both electrical and microstructural, used to analyze the samples. Chapter 4 introduces a protocol to be followed for impedance data analysis. This protocol was developed to reduce the ambiguity in complex impedance data analysis and get better, more accurate results. Chapter 5 shows typical impedance results for bulk and thin film doped ceria samples as a function of temperature, and applies the protocol described in chapter 4 to this data, to obtain ionic conductivity results. Chapter 6 focuses on the effect of a DC bias on the conductivity. It looks at the changes in complex impedance plots with increasing bias and looks at possible underlying defect mechanisms that can explain the observed unique behavior. Unlike prior studies which focused mainly on bulk materials, the focus here is on thin films. Bias values higher than those ever studied before are used here. DC current-voltage measurements are used as a way of verifying the complex impedance results. Chapter 7 discusses the effect of different processing routes on dopant and impurity segregation and the resultant effect on ionic conductivity. It introduces sintering under a reducing atmosphere as a means of reducing dopant segregation and improving ionic conductivity. Chapter 8 presents a summary of the main findings of this work and envisaged future work. In addition to the content above, extra information and other work performed by the author is included in the appendices. Appendix A details the steps for analysis of 25

26 impedance data. Appendix B discusses the different types of dielectric functions. Appendix C discusses thermally stimulated depolarization current as a way of studying defect associates. Appendix D presents work on colossal permittivity in barium strontium titanate ceramics where impedance spectroscopy was used to distinguish between different relaxation mechanisms. Lastly Appendix E lists interesting phenomena and trends observed by the author during the course of his work, which still remain unexplained Contributions to the Field As a part of this work, a protocol for impedance data analysis was established using best practices in existing literature and those developed in-house. Despite the technique of impedance spectroscopy being widely used, there is a lot of ambiguity and room for making errors in analysis of impedance data. There are numerous instances of erroneous interpretation of such impedance data in the literature, where inconsistencies are simply glossed over. This protocol provides a template for better identification of equivalent circuits, explains the significance of various parameters used in fitting, gives more accurate values for individual circuit parameters, and helps assess the quality of the fit. The study of complex impedance demonstrates the possibility of a novel mechanism in response to the bias. The study looks at thin film samples of gadolinia doped ceria at different temperatures and bias values, which has not been looked at before in literature. The values of bias applied (as high as 112 kv/cm) are higher than those in any study before. 15,16 The unique features observed in the complex impedance plots, indicate the injection of electrons and by extension the possibility of a change in 26

27 defect equilibria under bias. The trends are similar to a shift in the Brouwer diagram showing charge carrier concentration for different oxygen partial pressures. 15 The work on processing, for the first time successfully demonstrates that sintering under a reducing atmosphere and subsequent re-oxidation, reduces the segregation of dopants compared to conventional sintering techniques. The more even distribution of dopants across the grain boundaries leads to a decrease in resistance across grain boundaries, and an overall improvement in ionic conductivity. The conductivity increases by an order of magnitude in the samples sintered under reducing atmospheres as compared to conventionally sintered samples. This opens up a new avenue for ceramic material processing, where dopant segregation is not desired. Although the work performed here focusses mainly on gadolinia doped ceria, it can be easily extended to not only other dopants for ceria, but also to other oxide ceramic compounds where a controlled introduction of dopants and resulting defects results in favorable electrical properties. 27

28 2. CHAPTER 2 BACKGROUND AND MOTIVATION 2.1. Fuel Cells In today s energy-intensive world, we are in the need of a non-polluting, high efficiency power source. Fuel cells are a promising alternative to the current energy systems as they directly convert chemical energy to electrical energy without any intermediate steps. Unlike traditional fossil fuel based systems such as internal combustion engines, fuel cells do not have any moving parts. This reduces energy losses and makes them inherently more efficient. Instead of converting chemical energy to mechanical and then on to electrical, fuel cells produce electrical energy by an electrochemical reaction between a fuel (usually hydrogen or gaseous hydrocarbons) with an oxidant (air or oxygen). Heat is produced as a by-product. Fuel cells efficiencies can go up to 60% and even up to 85-90% if the heat produced as a byproduct is also used for other applications, as has been shown by Siemens Westinghouse in hybrid gas turbine fuel cell systems. 17 Although fuel cells still use fossil fuels as a source of energy, they are attractive because of their reduced greenhouse gas emissions, depending on the source of the hydrogen fuel. Compared to other renewable sources of energy, like solar power, fuel cells have lower capital cost and higher energy density. 18 They can also be combined with existing and legacy energy systems to improve their efficiencies, and reduce energy wastage. They can also be used in combination with renewables, for example, to store surplus solar energy in the form of hydrogen obtained using electrolysis of later, and later using it as a fuel for fuel cells. All these factors place fuel cell technologies at a unique position in the energy landscape, which warrants for their further development. 28

29 Fuel cells are made up of a cathode, an anode and an oxygen ion conducting electrolyte sandwiched in between the two. Fuel cells are usually classified on the basis of the electrolyte used. The different types of fuel cells that have been developed are polymer electrolyte membrane fuel cells (PEMFC), direct methanol fuel cells (DMFC), alkaline fuel cells (AFC), phosphoric acid fuel cells (PAFC), molten carbonate fuel cells (MCFC), and solid oxide fuel cells (SOFC). There are also reversible fuel cells, which produce electricity as described above, but can also be fed electricity to split water by electrolysis, enabling energy storage in the form of hydrogen. Depending on the type of electrolyte, the mechanism with which the fuel cell produces electricity changes. 19 Each different mechanism has its own issues and hence each design presents unique challenges. For example, PEMFCs and PAFCs need expensive catalysts and are sensitive to impurities, AFCs have a liquid electrolyte which is difficult to handle, MCFCs and SOFCs require high operating temperatures, amongst other challenges. 20 Depending on the various electrochemical reactions taking place in the cell and the constraints presented by the electrolyte, electrode and ancillary materials, the operating conditions like temperature, fuel, atmosphere and catalysts are selected. Hence, each type of fuel cell has an ideal set of operating conditions which decides its applications in the real world. The applications are usually divided into the broad areas of stationary and portable power generation. They have been used in a wide range of applications like the space program, unmanned aerial vehicles, in submarines, for fuel cell vehicles, and even residential power units. Since the term fuel cell was first established by Charles Langer and Ludwig Mond in 1889, 21 fuel cells have come a long way in terms of their applications, 22 where portable fuel cells have seen a rapid rate of growth in the recent 29

30 past and are moving towards wider commercialization, with several companies like Bloom energy, FuelCell Energy, Doosan Fuel Cell America, Watt Fuel Cell, Altergy, Redox Power Systems, and many more all over the world setting up commercial operations. Amongst the different kinds of fuel cells, solid oxide fuel cells are the focus of this study Solid Oxide Fuel Cells Solid oxide fuel cells, amongst the different types fuel cells, have a distinct advantage for auxiliary power, electric utility and distributed generation. 19 They do not require the use of expensive catalysts, the excess heat generated by SOFCs can be used for secondary operations, they are fuel flexible, are easy to handle, and have a long life expectancy, with all the components being solid. 5 SOFCs have shown efficiencies higher than 65% with possibilities for co-generation. 23 Figure shows the structure of a fuel cell and the associated reactions at the cathode and anode are given by equations (2-1) and (2-2) respectively. The fuel is fed to the anode and the oxidant is fed to a cathode. The electrode-electrolyte interface provides sites for the electrochemical reactions, whereas the electrolyte serves a diffusion medium for ions, with the electrons generated by the reactions usually flowing in the external circuit. 4 Two main types of solid oxide fuel cell designs have been looked at in literature, planar and tubular. 24 The schematic shown in Figure 2-1 is an example of a planar fuel cell stack. Various planar stack designs with different flow patterns have been proposed, but they have issues with sealing and temperature gradients. Tubular and micro-tubular designs offer the advantage of seal less design. Planar cells however have higher power densities compared to tubular designs and they can be manufactured with simpler lower 30

31 cost manufacturing techniques, making them popular. Planar cells can be anode supported, cathode supported, electrolyte supported, or even externally supported using the interconnect (shown here) or a porous substrate. The kind of cell design dictates the fabrication processes used and also places constraints on the materials used. Figure 2-1. Schematic of a solid oxide fuel cell. 5 Anode: 2 H2 O H2O 2e (2-1) Cathode: 1 2 O2 2e O (2-2) 2 The materials for solid oxide fuel cells are selected based on the design of the cell, the required electrical properties, chemical and structural stability, and matching thermal expansion coefficients. An ideal cathode, for example, must have mixed ionic and electronic conductivity, high porosity, and a thermal expansion coefficient matching that of the electrolyte. SrxLa1-xMnO3 (LSM) is a perovskite material that is commonly used and well- studied Similarly, the anode material should be porous, should provide 31

32 catalytic sites for electrochemical reactions, have low ionic conductivity, and be chemically and thermally compatible with other components. Ni-cermet anode materials are amongst the most commonly used Figure 2-2. Ionic conductivity for different fluorite oxide electrolytes with respect to temperature adapted from B.C.H. Steele. 34 The third component of a solid oxide fuel cell, and the focus of this study is the electrolyte. The electrolyte must be dense to be able to separate the fuel and the oxidizer. It must possess high ionic conductivity at the desired operating temperature for easy migration of oxide ions. It should be an electronic insulator, and should maintain its properties over a wide range of oxygen partial pressures, since the po2 could vary by as much as an order of magnitude between the anode and the cathode. 14 Various materials like yttria stabilized zirconia (YSZ), rare earth doped ceria, strontium/magnesium doped 32

33 lanthanum gallate, and bismuth oxide based electrolytes have been considered and studied for use as electrolyte materials for solid oxide fuel cells. 35 Amongst these, YSZ has been used extensively for high temperature (~1000⁰C) fuel cells. 6,7,35,36 The goal here, however, is to obtain enhanced ionic conductivity in the intermediate temperature range (400⁰C to 800⁰C). Figure 2-2 shows the ionic conductivities of some SOFC electrolyte materials. 7 Bi2O3 based compounds have the highest ionic conductivity in the intermediate temperature range. However, they are not thermally stable as they undergo an order-disorder transition around 600⁰C, making them unsuitable. The next candidate in the graph is gadolinia doped ceria (GDC). It is more stable than the Bi2O3 and has higher ionic conductivity than YSZ. Hence, GDC is the material of interest for this study. Gadolinia doped ceria has been studied extensively for ionically conducting electrolytes and mixed ionic-electronic conducting applications and even for applications in bilayer electrolytes. 13,29,32, Gadolinia Doped Ceria Pure stoichiometric ceria has a cubic fluorite structure as shown in Figure 2-3 with an associated lattice parameter of Å and space group Fm 3m. Each unit cell consists of Ce 4+ ions at the corners and the face centers of the cubic cell (Wyckoff position 4a), whereas the O 2- ions are located within the tetrahedral voids (Wyckoff position 8c). Ce 4+ ions have 8-fold co-ordination and the O 2- ions have 4-fold co-ordination. However, cerium oxide by itself is not a good ionic conductor. For ceria to conduct ions, it has to be doped with rare earth acceptor dopants. Substitution of Ce 4+ by trivalent dopant cations D 3+ (Gd 3+ in this case) causes the formation oxygen vacancies to maintain electro-neutrality as denoted by the Kröger-Vink notation in equation (2-3). 33

34 D (2-3) x 2O3 2D Ce 3OO V CeO2 O The vacancies created as a result of the doping allow for the discrete hopping of oxygen ions from one tetrahedral site to another, giving ionic conduction as shown in Figure 2-4. Figure 2-3. Cubic fluorite unit cell of cerium oxide. Figure 2-4.Doping and oxygen vacancy jump in acceptor doped ceria. 34

35 2.4. Ionic Conductivity The hopping of these vacancies is a thermally activated process. The electrical conductivity ( σ ) due to hopping is governed by the Arrhenius relation as denoted in equation (2-4) where E a is the activation energy. σ o is a pre-exponential factor, T is the temperature in Kelvin and E a T exp (2-4) o kt In a detailed form, this equation can be written as (2-5). 14 Here, o 2 Sm Hm V N a exp exp 2 qv T (2-5) o o o k k kt N is the number of oxygen sites per unit volume, V is the fraction of free O mobile oxygen vacancies, q v is the charge of an oxygen vacancy, a is the jump distance, θ o is the lattice vibration frequency and Δ Hm and Sm Δ are the enthalpy and entropy involved in oxygen diffusion. The conductivity also depends on the oxygen partial pressure (po2). Since diffusion of vacancies is driven by a concentration difference between the cathode and anode, a higher concentration difference, and a high subsequent partial pressure difference is essential for good ionic conductivity. With air at the cathode side, the lower the partial pressure of oxygen at the anode, the better. However, under such reducing conditions at the anode, Ce 4+ gets reduced and the following defect reaction takes place, promoting n-type conductivity and electron hopping paths in the electrolyte material. A similar electrochemical reaction can be induced by means of an electric field. The effect of a DC electric field has been discussed at length in Chapter 6. 35

36 Ce x Ce O x O 1 VO O2 2Ce (2-6) Ce 2 t ion ion (2-7) ion eon It is important to know exactly what fraction of the conductivity of a material is ionic. The ionic contribution to conductivity is measured using the ionic transference number, which is the ratio of ionic conductivity to total conductivity of a sample as shown in equation (2-7) where ion is the ionic contribution to conductivity and eon is the electronic contribution. A material must have a high ionic transference number and a low electronic transference number for SOFC electrolyte application. A detailed study on the thermochemical behavior of the undoped cerium-oxygen system has been performed by Chueh and Haile. 40 With increasing temperature, this reduction of ceria is further exacerbated, producing more electrons. This is one more reason that makes it imperative that the electrolytes for SOFCs be developed to operate at lower temperatures. On a side note, this redox behavior of ceria also makes it a possible for candidate for reversible fuel cells using solar thermochemical hydrogen production. 40, Dopant Concentration and Defect Associates Various authors have found that rare earth elements like gadolinium (Gd), neodymium (Nd) and samarium (Sm) are the best dopants for doped ceria. 42,43 Codoping strategies have also been studied as a means to improve the ionic conductivity. 11,17,18 Exhaustive work has been performed on the effect of various dopants on the ionic conductivity of doped ceria. 13,46 When using different dopants, the ionic conductivity of ceria and zirconia based ceramics has been shown to be affected by the radius mismatch between the host and dopant cations. 13,47 The higher the mismatch, the 36

37 lower the ionic conductivity. A larger ionic mismatch leads to a higher strain in the lattice, and the diffusion of vacancies is affected by the elastic strain energy of the lattice. 48 With higher dopant concentration, it would be expected that the grain ionic conductivity of the material also increases. However, this is not always the case, and usually a maximum in the ionic conductivity is observed at a certain concentration, above which the conductivity starts to fall again, as has been shown for both ceria and zirconia based systems. 42,47,49 Figure 2-6 shows a typical dopant concentration versus ionic conductivity behavior as reported by Yahiro et al. 49 Figure 2-5. Grain ionic conductivity of different doped ceria electrolyte materials as a function of temperature after Gerhardt-Anderson and Nowick

38 Figure 2-6. Conductivity as a function of dopant concentration in the (CeO2)1- x(sm2o3)x system at different temperatures after Yahiro et al. 45 In the distorted cubic structure of doped ceria, the vacancies tend to interact with the dopant cations creating defect associates. Such associates were first reported in ceria by Nowick and coworkers. 46,50,51 The interactions could be electrostatic due to charge differences on the defects or elastic interactions due to local stresses. These defect associates bind the oxygen vacancies, effectively reducing the number of movable vacancies. At lower concentrations, only dimers D V can be assumed to be formed, as they have been shown to be more likely to occur. 52 As the concentration A O increases, higher order associates such as trimers D A V O D x A and so on are formed. 53,54 The existence of defect associates can be proven using positron annihilation 38

39 spectroscopy as has been shown by Guo and Wang. 55 Defect associates can also be studied using the technique of thermally stimulated depolarization current as has been shown for multiple materials and has been detailed in Appendix A. 50,56 The presence of defect associates leads to a higher required temperature for ionic conduction as the activation energy for oxygen diffusion now consists of the energy required to break apart the defect associates i.e. the association enthalpy ( Δ Ha ) in addition to the migration enthalpy ( Δ Hm ). 57,58 It has been found that the migration enthalpy ( Δ Hm ) for oxygen vacancies is independent of the dopant concentration. 59 E a H H (2-8) m a Figure 2-7 shows the Arrhenius plot of the grain ionic conductivity for Sm/Nd codoped ceria for different dopant concentrations. 42 In the dilute regime, the conductivity increases with an increase in the dopant concentration. This has been explained on the basis of limited defect interactions, and thus the ionic conductivity depends mainly on the vacancy concentration. However, with an increase in dopant concentrations, more and more oxygen vacancies are bound in complexes, effectively leading to a drop in the ionic conductivity in the lower intermediate temperature range (< 450ᵒC). The grain ionic conductivity plots for higher dopant concentrations all converge at a point around 475ᵒC above which the behavior is flipped and the conductivity again starts to increase with increasing dopant concentration. Such behavior is commonly said to be following the Meyer Neldel rule and this trend has been reported for doped ceria materials by various researchers. 14,58,60,61 The transition temperature T corresponds to an order disorder transition in the ionically conducive material, at which point the conductivity is independent of dopant concentration and is a function only of the activation energy. It is 39

40 the transition between the stage where most carriers are bound to the stage where most carriers are free. 58 In many cases, a change in the slope of the conductivity plot is also observed at this transition temperature, sometimes sharp, sometimes gradual. Above this temperature, the activation energy drops, indicating that the defect associates have been dissociated and the vacancies are free. 48,52,62,63 The activation energy in this high temperature regime can be considered to be the migration enthalpy of the particular compound (assuming completely free vacancies), and the difference between the low and high temperature migration energies can be considered the association enthalpy. The values obtained from such measurements have been shown to agree well with calculated values. 47 Similar trends have been reported in other oxide ceramic systems, where the conductivity decreases with increasing dopant concentration at high dopant concentrations. 64,65 Defect associates clearly play a major role, and in order to better utilize doped ceria materials, it is essential that these defect complexes be better understood and the effect of processing on reducing the formation of defect associates be studied Dopant and Impurity Segregation Many studies over the years have come to the conclusion that a major culprit for lowering the ionic conductivity in oxide ceramics are the grain boundaries 14,55,66,67. The high resistance or the blocking nature of grain boundaries compared to the bulk has been ascribed to various reasons like, amorphous phases, impurities, misorientation at the grain boundaries and segregation of dopants. Due to their high energy, any anomalies present in the crystal structure, tend to accumulate at the grain boundaries during sintering. It is these anomalies that lead to blocking grain boundaries. 40

41 Figure 2-7. Arrhenius plots for the grain ionic conductivity of Sm/Nd co-doped ceria as shown by Omar et al. 42 Following are a few examples amongst various studies that look at dopant and impurity segregation: The conventional sintering process used for most ceramics, makes use of milling and mixing operations to get the desired particle size, and to add dopants and other additives. However, these steps tend to introduce siliceous impurities from the milling media into the ceramic powder. During sintering, it has been shown that these impurities segregate at the grain boundaries and at triple point junctions showing up as a glassy phase shown in Figure ,68 Gerhardt and Nowick have shown that the high grain 41

42 boundary resistance is due to the siliceous impurities and it virtually disappears when nearly silicon-free materials are used. Even a few hundred ppm impurities has been shown increase the resistivity in gadolinia doped ceria by up to 100 times. 66 One possible solution to reduce the amount of impurities in the samples can be the use of alternative processing routes like co-precipitation which avoid milling. Figure 2-8. Transmission electron micrographs showing segregation of siliceous phases. (A) Continuous layer of a siliceous phase in the grain boundary of 10 mol% GDC and (B) glassy phase formed at triple grain junction in 5 mol% Sm/NdDC as observed by using transmission electron microscopy. 14 Contrastingly, in high purity undoped ceria samples, Guo et al. 55,69 have shown that an amorphous siliceous phase is formed only at a few triple grain junctions and the grain boundaries are relatively clean. Despite the blocking effect from the siliceous phase being expected to be negligible, it was found that there is still a difference of about two orders of magnitude between the grain boundary and bulk conductivity. There has been a lot more focus on a mechanism involving space charge layers and the Mott-Schottky model at grain boundaries, to try and explain their blocking nature. Such blocking grain boundaries are observed not only in doped materials or materials with impurities, but even 42

43 in so called pure materials. The segregation of defects at grain boundaries, creates a space charge layer, forming a sort of Schottky-type potential barrier for conduction at the interface. 67,70 Figure 2-9. Schematic of a grain boundary in an oxide ion conductor. Schottky barrier grain boundary as is commonly hypothesized (top) and a model based on recent elemental distribution studies (bottom). Segregation of dopant is not necessary for explaining the top model. This model has a positively charged grain boundary core, with a high concentration of oxygen vacancies, which is compensated by oppositely charged defects, usually 43

44 acceptor ions, and a depletion of oxygen vacancies in the adjacent region. This model proposes a high concentration of vacancies at the grain boundaries and a depletion region around the grain boundaries, with a lower concentration of vacancies and a higher concentration of dopant ions. Figure 2-9 (top) shows a schematic of the space-charge grain boundary model for doped zirconia and ceria as proposed by Guo and Waser. 69 This model although widely accepted, has not been proven experimentally with actual concentration data for different species at grain boundaries. In fact, as is discussed later in this chapter, high resolution elemental distribution studies paint a slightly different picture which is depicted in the bottom part of Figure 2-9. Considerable amount of work has been done to explain the origin of blocking grain boundaries in oxide ceramics. For SrTiO3, it has been theoretically shown that grain boundaries in oxide ceramics are intrinsically non-stoichiometric and non-stoichiometry in the grain boundary cores is energetically favorable in undoped SrTiO3. 71 Electron energy loss spectra (EELS) at atomic resolution have established the coordination of the species at an atomic resolution, and provided evidence of the non-stoichiometry. 71,72 It has also been shown using atomic resolution analysis that 5 36⁰ [001] tilt grain boundaries in SrTiO3 have incomplete oxygen octahedra, which act as effective oxygen vacancies at the grain boundaries. 73 This also suggests that the extent of accumulation changes with the type of grain boundary. It has been established that the existence of vacancies at grain boundaries is an intrinsic behavior that is seen even in undoped materials. The grain boundary core has been proposed to have a positive charge due to this accumulation of vacancies. In the case of doped materials, for example in Mn doped SrTiO3, the dopant also tends to accumulate at the grain boundaries. During sintering, 44

45 the mobility of the acceptor dopant ions is high enough for them to segregate at the grain boundaries due to the high positive charge of the grain boundary core and to relieve elastic strain. 69 The dopant segregation itself however, was said to be insufficient to charge balance the vacancies at grain boundaries. 74 The positive core charge was thus hypothesized to cause a depletion of oxygen vacancies in the regions surrounding the grain boundary along with the accumulation of the dopants. Similar results have been shown for yttria stabilized zirconia (YSZ) where the vacancy accumulation at grain boundaries has been attributed to a structure relaxation. 75 Z-contrast STEM imaging and atomic resolution EELS of well-defined grain boundaries have been performed for both yttria stabilized zirconia and gadolinia doped ceria. 74 In YSZ, it was found that the yttrium segregates at the grain boundaries. EELS profiles across grain boundaries in GDC have shown similar results, where the Gd/Ce ratio increases at the grain boundary whereas the O/Ce ratio decreases. It was also found that about 70% of the Ce 4+ changes to Ce 3+ at the grain boundaries, leading to an excess of electrons near the grain boundaries. This proposed Schottky barrier model for the grain boundaries has been found to satisfactorily explain the observed electrical properties for grain boundaries. However, as said before, there has been no proof so far for the depletion or space-charge layer around grain boundaries. The segregation of acceptor dopants, at grain boundaries and triple point junctions has been looked at in much more detail recently, with the advancement in elemental characterization techniques. For example, Li et al. 76 have shown using laser assisted atom probe tomography in gadolinia doped ceria, that there is a segregation of dopants at the grain boundaries. However, contrary to the space 45

46 charge model, the Ce concentration was actually found to decrease, whereas there was no significant change in the oxygen concentration at the grain boundary. Figure Atom probe tomography data for a grain boundary in 10 mol% Nd doped ceria adapted from Diercks et al. 77 More recent work by Diercks et al. 77 using atom probe tomography for Nd doped ceria has shown segregation of dopants and oxygen vacancies at the grain boundaries, accompanied by a rise in Ce at the grain boundaries, as depicted in Figure The change in concentrations was found to be till about 4-6 nm from the grain boundary center, similar to that shown by Li et alerror! Reference source not found.. 76 The co-e nrichment of vacancies and dopants at grain boundaries was suggested to be consistent with the theory of defect-defect interactions. The electrostatic potential at boundaries was 46

47 calculated using the Poisson equation by Diercks et al. 77 and the results match with typical results grain boundary potentials measured using impedance spectroscopy for GDC. Recently, a different model has been proposed by Frechero et al. for YSZ using a combination of experimental and simulation techniques. 78 Like others, no depletion layer of oxygen vacancies was found. The Y ions segregated at grain boundaries are not sufficient to balance the charge of the positive vacancies. Using density functional theory, it was shown that the two electrons accompanying the formation of each oxygen vacancy, instead of localizing around the vacancy, go into empty electronic states in the grain boundaries. These grain-boundary induced electronic states act as acceptors, creating a negatively charged core and it is this negative charge which acts as a trap for vacancies and creates a barrier for ion transport at grain boundaries. This model contrasts with established models and needs to be further studied. It is important to be familiar with and understand the various proposed mechanisms responsible for blocking grain boundaries since the boundaries and surfaces play increasingly dominant roles as device sizes reduce. This knowledge can be used to modify processing conditions and obtain better performing materials and will be revisited in Chapter Impedance Spectroscopy Impedance spectroscopy (IS) is a technique that can be used to study the dynamics of charges in solids and liquids. More particularly, electrochemical impedance spectroscopy (EIS) is the subset of impedance spectroscopy where ionic conduction is the dominant mechanism, is of interest here. It involves the linear electrical response of a material to a small signal stimulus in the frequency or time domain. 79 The very first 47

48 examples of such experiments are by Randles (1947) and Jaffe (1952). Randles studied the kinetics of rapid electrode reactions using a capillary electrode immersed in a suitable solution, a method called polarography. 80 Jaffe studied polarization in electrolytic solutions using a sophisticated conductance cell. 81 It was Bauerle in 1969 who first dealt with impedance spectroscopy of ionic solids and measured their conductivity accurately. 82 Today it is widely used as a tool for investigating electrochemical systems. It is of particular importance because there usually exists a direct analogy between the impedance behavior of a material and the physical processes occurring in a material. The most common way of measuring impedance is by applying a single frequency current or voltage to a sample and measuring the resultant phase shift or amplitude of the resulting current at that frequency using fast Fourier transform analysis of the response. 79 When an electrical response is applied to a material, many processes take place inside it. Some examples are transport of charge carriers, transfer of charges at interfaces, oxidation and reduction reactions etc. All these processes are characterized by a specific frequency, at which they respond to the stimulus, thus helping in their identification. For the study of solid electrolyte materials for fuel cells, a few hundred mv is used as a stimulus in a frequency range of typically 0.01 Hz to 10 MHz, depending on the equipment used. The response is usually analyzed in terms of one of the following four formalisms: impedance (Z*), modulus (M*), admittance (Y*) and permittivity (ε*), all complex numbers. For most solid ionic conductors, the data is usually represented as a frequency dependent plot of Z where the real and imaginary parts of Z are as follows. Z Z iz (2-9) Z Re Z Z cos (2-10) 48

49 Z Im Z Z sin (2-11) The complex impedance is data is typically represented in the form of a Nyquist plot (also called complex impedance plot) where the frequency is implicit. The y axis is usually -Z (convention for capacitive systems) and the x axis is Z. Alternatively, it can also be represented in the form of frequency explicit plots (also referred to as Bode plots). The two kinds of plots and their interrelation is shown in Figure 2-11 in the form of 3D perspective plots. Figure Impedance response in a 3D perspective plots for a 10 mol% gadolinia doped ceria sample. The different planes show the complex plane and frequency explicit projections of the data. 49

50 Since all the processes occurring at the atomic and microstructural level in an ionic conductor have their own respective characteristic relaxation frequencies, they show up as different arcs on the Nyquist plot. A typical example is that of an RC circuit, with a fixed time constant. The response for such an element shows up as a semicircle in the first quadrant, where the diameter of the semicircle is the resistance (R) the top of the semicircle corresponds to the relaxation time (τ = RC) where C is the capacitance. If a process has a distribution of relaxation times, it leads to distortion of the semicircle, which is very common among real materials. Similarly, any arc in the fourth quadrant usually indicates that an inductance (L) is involved. The data obtained is thus usually fit to an equivalent circuit consisting of various circuit elements. Based on the values of the various circuit elements, inferences can be drawn as to the relaxation processes taking place in the material. Typical data for an electroded polycrystalline sample usually looks like Figure It usually has three sections, the first smaller arc denoting relaxation within the grain, the second larger arc denoting the relaxation across the grain boundary, and the third large arc representing processes at the electrode interface. Under ideal conditions, all the arcs are semicircular and the data is usually modelled using an equivalent circuit that consists of three pairs of parallel RC elements in series with each other. However, in many cases, the semicircles are depressed and the capacitance C has to be replaced by a constant phase element (CPE) in the circuit to simulate distributed time constants. The nature of CPE will be discussed further in Chapter 4. R1 and CPE1 thus denote grain contribution, R2 and CPE2 denote grain boundary contribution, and R3 and CPE3 denote electrode contribution. The arcs also frequently overlap to a varying extent, depending on the 50

51 characteristic relaxation times of the respective mechanisms and the difference between them. Similar relaxation times give more overlap between the arcs. The resistance values obtained from the fitting of the impedance data can be used to calculate the grain (from R1) and total ionic conductivity (from R1 + R2). The grain boundary conductivity is not calculated, because it is extremely difficult to calculate the area and thickness of all the grain boundaries in the sample. It can be calculated only in very specific conditions by making certain assumptions and using some special models depending on the material. 79 Hence only the grain conductivity and total conductivity are calculated in this work. The grain conductivity can be calculated by assuming the grain boundary volume to be negligible and taking the sample volume as the grain volume. Figure Schematic of complex impedance plot obtained using EIS for a polycrystalline electroded sample adapted from Omar

52 Conductivity can be calculated from resistance using the following relation, L RA (2-12) where R is the resistance, L is the length and A is the cross-section area of the sample. Further details about data fitting, circuit elements and the involved intricacies are discussed in Chapter 4. 52

53 3. CHAPTER 3 EXPERIMENTAL PROCEDURES 3.1. Sample Preparation Bulk Samples To prepare bulk samples, the conventional solid state processing route (shown in Figure 3-1) was modified, where instead of the mixing and milling operations, the coprecipitation technique was used to synthesize phase pure 10 mol% doped gadolinia doped ceria powder. The co-precipitation technique has been shown to produce phase pure powders with less siliceous impurities as compared to the conventional powder processing route involving powder mixing and ball milling. It also gives a smaller particle size which leads to better sintering kinetics. Thus high density pellets can be obtained using lower sintering temperatures and times. 14 For co-precipitation, stoichiometric amounts of cerium nitrate hexahydrate (Ce(NO3)3.6H2O, 99.5%, Acros Organics) and gadolinium nitrate hexahydrate (Gd(NO3)3.6H2O, 99.9%, Strem Chemicals) were mixed in de-ionized water forming an aqueous solution. Under magnetic stirring, an ammonium hydroxide solution (82-30 wt% NH3 solution in water, Acros Organics) was slowly added to this solution till the ph was raised to 12. With the addition of ammonium hydroxide, a brownish precipitate separates out. This precipitate was then washed with DI water and dried in a drying oven at 120 C for 12 hours. The reactions are detailed in equations (3-3) and (3-4). The conversion from Ce 3+ to Ce 4+ takes place in the solution at a high ph and the corresponding reactions for Gd 3+ and Ce 3+ forming the respective hydroxide precipitates are as shown in equations (3-3) and (3-4). 83 In case of low ph, the conversion from Ce 3+ to Ce 4+ does not take place in the solution, but instead occurs during drying and calcination steps in the presence of air. 53

54 1 xceno x GdNO 3 3 High ph Ce x 3NH OH Gd x 4 1 x 4 OH4x 3NH 4NO 3 O 2 aq 1 x H 2 2 O (3-1) 4 x 4 x Ce1 xgdx OH4x Ce1 xgdxo 4x H2O Ce1 xgdxo 4x H2O (3-2) aq O aq12oh aq 2H O 4CeOH 3 4 Ce (3-3) aq 3OH aq GdOH 3 Gd (3-4) 3 The dried powder was ground using a mortar and pestle. The ground powder was calcined at 900 C for 10 hours. The calcination temperature and time used were optimized previously. 14 The calcined powder was ground again using a mortar pestle and checked for phase purity using X-ray diffraction. For pressing into pellets, the powder was sieved using a 212 µm sieve. It was uniaxially pressed into disc shaped pellets under 150 MPa using a Carver Inc uniaxial press. This was followed by cold isostatic pressing under 250 MPa using an MTI corporation CIP-50M isostatic press. For this purpose, the pellet was sealed in a common rubber balloon, which was then evacuated and tied up. The sample at this stage is the green pellet. This green pellet was subsequently sintered at 1650 C for 10 hours in air with a heating and cooling rate of 200 C/hour in a box furnace (CM Furnaces 1600 Series Rapid Temp Furnace). The density (following ASTM B962-15) and dimensions of both the green and sintered pellets were measured. A flowchart in Figure 3-1 summarizes the co-precipitation process as against the conventional solid state processing route. 54

55 Figure 3-1. Flow chart for conventional solid state processing of ceramic materials (left) and that for the co-precipitation route (right). 55

56 Figure 3-2. Examples of green and sintered pellets of cerium oxide Sintering under Reducing Atmosphere To study the effect of sintering atmosphere, the pellets pressed using calcined powder as described above were sintered in a 4% H2-N2 atmosphere. The green pellets were sintered in a tube furnace (Barnstead Thermolyne Tube Furnace) at 1100 C for 20 hours under ~2 SCFH flow of 4% H2-N2 mixture (Airgas Inc.). The heating and cooling rate was maintained at 200 C/hr. The reduced GDC samples thus obtained were subsequently re-oxidized under an O2 (Airgas Inc.) atmosphere in the tube furnace at a much lower temperature of 900 C for 24 hours, with slow heating and cooling. The density and dimensions of both the reduced and re-oxidized samples were measured Thin Film Fabrication Gadolinia doped ceria (10 mol.% dopant concentration) thin films were prepared by John Edward Ordonez and Professor Maria Elena Gomez at Universidad del Valle in Cali, Colombia using a custom-made magnetron sputtering setup using a target made by the powder processing route as described above. A picture of the setup is shown in Figure 3-3. The films were deposited on a Pt/TiO2/SiO2/Si substrate maintained at a temperature of 550 C under an atmosphere of highly pure oxygen ( %) with a 56

57 base pressure of 1.2x10-4 mbar and a work pressure of 10-1 mbar. The Pt layer was approximately 200 nm thick and the TiO2/SiO2 layer around 504 nm thick as received (MTI Corporation). The deposition times were varied between 60 to 150 minutes to obtain films with varying thicknesses from nm. Based on the deposition times and film thicknesses, a sputtering deposition rate of 1 nm/min was estimated. The samples were annealed at 500 C for 2 hours to complete crystallization. Pt top electrodes 50 nm thick were deposited using DC sputtering (Kurt J. Lesker Multi-Source RF and DC Sputter System) with a shadow mask at room temperature to give a pattern of circular electrodes each with a diameter of ~100 µm. Figure 3-4 shows a schematic of the films whereas Figure 3-5 shows an example of a film. Figure 3-3. The magnetron sputtering setup at Universidad del Valle in Cali, Colombia used for deposition of GDC thin films. Photo courtesy of John Edward Ordonez. 57

58 Figure 3-4. Schematic of a gadolinia doped ceria thin film on top of a Pt/TiO2/SiO2/Si substrate with Pt electrodes on top adapted from R. Kasse. 45 Figure 3-5. Image of a gadolinia doped ceria thin film (left) and optical micrograph showing the surface of the film with the circular Pt top electrodes (right). Photo courtesy of author Profilometry The thickness of the thin films was measured using a Tencor AS500 profilometer equipped with a diamond tipped stylus. The film thickness was measured by calculating the drop in height when crossing over from the film onto the bottom electrode. An example profile for one off the GDC films is shown in Figure 3-6. Five different measurements were taken for each film and an average value was used. This value also 58

59 matched satisfactorily with the values obtained using scanning electron microcopy as described in the next section. Figure 3-6. Graph showing an example of the profilometry data for a GDC thin film under study. The lower part is the bottom electrode whereas the top part is the GDC film, and the difference in the heights is the thickness of the film X-Ray Diffraction Phase purity analysis was performed using a PANalytical X Pert Powder diffraction system to verify the complete dissolution of the gadolinia dopant in ceria. XRD patterns were obtained using Cu Kα radiation with a wavelength of nm. Figure 3-7 shows the diffraction pattern for a sintered 10 mol% gadolinia doped ceria sample. Comparing it with the calculated patterns for CeO2 and Gd2O3, it can be seen that the peaks are similar to those for CeO2 and no extra peaks of Gd2O3 are present in the diffraction pattern of the sample. This shows that the sample is phase pure as far as can be determined based on the resolution and sensitivity of the instrument. 59

60 Figure 3-7. X-ray diffraction pattern for 10 mol% gadolinia doped ceria sintered sample. The calculated spectra for CeO2 and Gd2O3 are shown for comparison. Intensities are normalized with respect to the highest peak for each pattern Microstructural Characterization Microstructural characterization was performed using optical microscopy and scanning electron microscopy (SEM, Cameca SXFive). For the analysis of bulk samples, the sintered ceramic samples were mechanically polished to a mirror finish using diamond lapping films down to 0.1 μm on an Allied Multiprep polisher. They were cleaned using sonication for 30 minutes. To make the grain boundaries visible, the samples were thermally etched at 1400 C for 1 hour with rapid heating ramp rates of 600 C/h. For the samples where dopant segregation during thermal etching is a concern, they were etched using a 25 vol% HF solution in DI water with an exposure time of 4 minutes. The samples were then either observed directly under an optical microscope or coated with an approximately 10 nm thick layer of carbon for SEM and related analysis. Figure

61 shows an example microstructure observed in a bulk sample. Electron probe microanalysis (EPMA, Cameca SXFiveFE) was used to determine elemental distribution and concentrations in the bulk samples (details of both instruments here). Scanning electron microscopy was used to analyze as fabricated thin films, both on the surface and the cross section. Figure 3-9 and Figure 3-10 show the surface and the cross section respectively of a GDC thin film as observed using SEM. Figure 3-8. A scanning electron micrograph showing the microstructure on the surface of a 10 mol% GDC bulk pellet. Figure 3-9. A scanning electron micrograph of the surface of a GDC thin film. 61

62 Figure Scanning electron micrographs of the edge of a gadolinia doped ceria film showing the different layers AC Impedance Spectroscopy Ionic conductivity measurements were performed using electrochemical impedance spectroscopy (EIS). A two-probe setup was used for both bulk and thin film samples. Figure The setup for impedance spectroscopy of bulk samples at different temperatures. Photo courtesy of author. 62

63 Figure The reactor setup used for EIS (left) and an example of an electroded bulk sample (right). Photo courtesy of author. The bulk samples were tested using a Solartron 1260 impedance analyzer and a custom-made quartz reactor. The flat faces of the samples were polished using SiC polishing paper, cleaned using a sonicator and electroded using Pt paint (CL , Heraeus). Each side was dried in a drying oven (details) for 1 hour at 120 C, following which the samples were fired at 900 C for 1 hour. The sample faces electroded with platinum were connected to platinum wires using silver paste. The Pt wires were in turn tied to the gold wire electrodes, shielded with Pt coated alumina tubes, which were connected to the Solartron 1260 using BNC connections. A Lindberg Blue M tube furnace was used to provide high temperatures. Complex impedance measurements were performed from 200 C to 650 C with an oscillating voltage of 500 mv in a frequency range from 0.1 Hz to 10 MHz, and DC bias from 0 V to 10 V under an air atmosphere. Nulling files for open and short circuit compensation were recorded for each data point before the actual sample measurement. Data was recorded using ZPlot software (Scribner Associates Inc.). The setup is shown in Figure 3-11 and Figure The thin film samples were tested using an Agilent 4924 precision impedance analyzer and a Micromanipulator Inc. probe station. Heating was achieved using a 63

64 hotplate and an infrared thermometer was used to measure the temperature. The test setup is shown in Figure 3-13 and Figure Across plane complex impedance measurements were performed from 25 C to 150 C with an oscillating voltage of 300 mv and an applied DC bias ranging from 0 V to 5 V. Open and short circuit compensation were performed to account for the contribution of the test setup to the measurement. The data obtained was fit to relevant equivalent circuits using Zview software (Scribner Associates Inc.). Fitting protocols as described later in Chapter 4 were used to obtain consistently good fits for the data. The quality of fit was quantified using the sum of squares values and residuals between the measured and simulated data. Using the grain and grain boundary resistance values obtained from fitting, the grain and total conductivity of the samples were calculated using equation (2-12). The conductivity plotted as a function of temperature follows an Arrhenius type equation shown in equation (2-4). The slope of these plots was calculated (as is shown in Chapter 5 and 7) to give the activation energy for conduction. Table 3-1. Sources of experimental errors involved in the impedance measurement and fitting for a GDC sample. Systematic errors Thermocouple calibration Chemical composition of samples Impedance analyzer calibration Processing furnace calibration Random errors Precision of temperature measurement Error in resistance values obtained from fitting Standard deviation in dimension measurement Sample shape effects It is important to note here the possible error sources involved in the experiment and the propagation of these errors to the final result. The experimental errors associated 64

65 with the testing of a sample can be divided into systematic errors and random errors. They are listed below in Table 3-1. The systematic errors involved can be neglected as they are not expected to change. All the experiments were performed with the same thermocouple and impedance analyzer calibrations. Any error in the chemical composition of the samples was avoided by using the same batch pf doped starting powders for making samples. Considering the sources of random errors, the temperature for the impedance measurement system has a precision of 0.1ºC for thin films and 1ºC for bulk samples. Equivalent circuit fitting using ZView gives a percentage error for each of the resistances used in the equivalent circuit. The error in dimension measurement can be calculated as a standard deviation for multiple values of the thickness and diameter of the disc shaped samples. Using the relationships for propagation of errors, the errors in different quantities can be calculated as follows: The error in cross sectional area is given by equation (3-5) where A is the area of a circle, and D is the diameter. D A A 2 D (3-5) Based on the error in resistance (R), thickness (l), and area (A), the error in conductivity can be calculated by equation (3-6). 2 l l 2 R R 2 A A (3-6) For plotting the Arrhenius plot of conductivity versus temperature, the error in (σt) is given by equation (3-7) and the error in 1000/T is given by equation (3-8). 65

66 T T avg avg avg avg 2 T T 2 (3-7) 1 1 T T 2 T (3-8) This should eventually lead to an Arrhenius plot with x and y error bars based on all the random errors mentioned above for a sample as is shown later in Chapter 5. It is after this point that the sample to sample variation can be taken into consideration by averaging for different samples processed and tested under the same conditions. Figure Probe station setup for electrical testing of thin films. Photo courtesy of author DC I-V Measurement The leakage current and current-voltage DC measurements were performed using an Agilent 4156C precision semiconductor parameter analyzer. The probe and heating setup was the same as described above for bulk and thin film samples. Leakage currents for the thin films samples were measured for the same bias values and temperatures as 66

67 used during impedance spectroscopy. The sweep speeds for I-V measurements were varied to match different frequencies in impedance data. The range for the I-V sweep was set at twice the oscillation voltage amplitude (mostly set at 300 mv) for impedance spectroscopy, with the bias value used lying in the middle of the sweep range. For example, to do a measurement equivalent to a 300 mv oscillating voltage and 2 V bias, the DC I-V sweep would be done from -1.7 V to 2.3 V, with the midpoint lying at 2 V. A pulse sweep measurement mode on the system was used. To match the sweep speeds with the frequency of different points on the complex impedance plot, the number of steps in the sweep range, the step size, and the integration time at each point was varied. A change in the integration time essentially modifies the pulse width at each of the voltage points. Using the Agilent 4156C system, which has three default integration times, short, medium and long, the short integration time mode was used which allows for the smallest possible integration time of 80 μs. The pulse width on the other hand, which is the sum of the pulse width and the hold time after each pulse was set to a minimum value of 5 ms. Such settings allow sweep speeds equivalent to frequencies in the range of a ~100 Hz. Figure Schematic of probe contact adapted from R. Kasse 45 (left) and a picture of the same (right) for across plane impedance measurement 67

68 4. CHAPTER 4 PROTOCOL FOR IMPEDANCE TESTING AND DATA ANALYSIS Figure 4-1. Flow diagram for the measurement and characterization of material electrode system adapted from Macdonald. 84 Impedance spectroscopy is the primary technique used to analyze relaxation mechanisms in ionically conducting materials as was described in Chapter 2. To be able to extract meaningful parameters with some physical significance, in this case to accurately determine grain and grain boundary contributions to the ionic conductivity, it is essential that the correct equivalent circuit model be selected and properly fit. This fitting 68

69 is usually done based on the well-known flowchart shown in Figure Based on the user s knowledge of the material-electrode system, a plausible physical model is proposed in the form of an equivalent circuit. This model is then fit to the complex impedance data usually using the complex non-linear least squares (CNLS) fitting technique. The fitting nowadays is usually done automatically using commercial software like ZView (Scribner Associates Inc.). Although this process seems simple enough in principle, it can become extremely complicated very quickly Common Mistakes If one is not careful, multiple things can go wrong while fitting of impedance data. The most obvious error is the use of an incorrect model. It is very easy to miss certain nuances during impedance data analysis, for example when using simple circuits with parallel RC elements in series, to model impedance data. Though this might work well in certain cases, it is a very ideal combination of circuit elements that does not apply to many practical material systems. 79 Most practical systems deviate from ideal Debye like behavior as they have a distribution of relaxation times, due to various reasons. Another mistake very easily committed is to go to the other extreme and keep adding elements to the equivalent circuit to get a good fit. With enough number of circuit elements, almost any data set can be fit. However, this circuit has little physical significance. Any number of circuits can fit a certain data set, if they have a lot of parameters. Each parameter used for fitting has to be used only because it has a certain physical significance in the expected material behavior. The correct equivalent circuit should have a proper experimental justification. Additionally, most literature does not provide information about the quality of fit for a particular model and data set. The reader thus has to take the extracted results 69

70 at face value without any proof. Quality of fit is a very important part of impedance data analysis. In fact, detailed quality of fit studies can help identify the correct model among different competing models. In the absence of a proper protocol for data fitting, there is very little reproducibility in the results. A single set of data can be fit using multiple equivalent circuits. The same set of data when analyzed by two different people can yield very different results. This calls for standardization of the procedure for fitting of impedance data. In brief, the different factors involved in the proper analysis of impedance data are: Physical significance of the different circuit parameters in fitting programs Selection of the correct equivalent circuit based on a physical model. Approximate starting values for parameters to be fit. Estimation of fitting quality Best Practices There has been some work towards developing strategies for accurate and reproducible analysis of impedance data. Abram et al. 85 have shown how to discriminate between competing model circuits using the four complex immitance formalisms, namely, impedance, modulus, admittance, and permittivity. They have also provided a guide to determine approximately accurate starting values of parameters for fitting. Macdonald has worked on a wide variety of models for impedance analysis in addition to all the strategies and detailed work on CNLS fitting. 9,86,87 The Help section of the Zview software also has a lot of useful information. The following is a compilation of best practices based on the factors listed above that should make more uniform and reproducible analysis of impedance data possible. 70

71 Definitions of Parameters To be able to perform fitting of data with ease, it is necessary to be familiar with the various circuit elements commonly used for fitting, their physical significance and the related math. Following is a list of parameters commonly used: Resistance (R): It is the obstacle to the flow of charge carriers. It forms the real part of impedance ( Z), with no imaginary component ( Z ) associated with it. Z R Z 0 (4-1) Capacitance (C): It is the geometrical capacitance associated with the grain, grain boundary or electrode. It contributes to the imaginary part of impedance, with no associated real component. It forms a semicircular arc in the first quadrant of the Nyquist plot when in parallel with R. Here ω is the angular frequency and the numbering for quadrants used throughout the document is as shown in Figure 4-2. Z 1 Z 0 (4-2) C Figure 4-2. Numbering systems for quadrants in the coordinate system used throughout this work. 71

72 Inductance (L): At low frequencies, it indicates the reversible storage of electric kinetic energy. It contributes to the imaginary part of the impedance, with no associated real component. Usually pushes data towards the fourth quadrant when it is a part of the circuit. Z L Z 0 (4-3) Constant phase element (CPE): It models the behavior of an imperfect capacitor (in non-homogenous systems). When in parallel to a resistor, it produces a depressed semicircle in the Nyquist plot. In Zview software, the CPE is defined by two values, CPE-T and CPE-P. Z CPE i P T i 1 (4-4) The P value here (CPE-P) determines the split of the impedance into real and imaginary parts. CPE-T is the equivalent of a capacitance, and it represents a perfect capacitor when CPE-P equals 1. When CPE-P equals 0, CPE-T is a resistor, and when it equals -1, it is an inductor. At CPE-P equal to 0.5, a 45⁰ line is produced in the plot, which indicates a Warburg element, sometimes used to model electrodes. In literature 84, the impedance of CPE is also given as, Z CPE γ A iω i 1 (4-5) where γ is a constant. A on the other hand, equals a cosnπ 2, where a is constant. CPE-P thus equals γ, and CPE-T equals A from equations (4-4) and (4-5). The value of CPE-P or γ is indicative of the amount of distribution in relaxation time. This representation of distributed time constants originated from 72

73 the Cole-Cole modification to the Debye relaxation relationship, which gives a depressed, but symmetric semicircle. 88 The associated mathematical expression for complex permittivity is denoted by equation (4-6). ε ω ε 1 Δε iωτ o 1 α (4-6) Here is the angular frequency, is the dielectric constant at infinite frequency, is the difference between the static and infinite frequency dielectric constants, and o is a generalized relaxation time. Other mathematical models for dielectric relaxation have also been proposed, 89,90 the details of which are included in Appendix D. The constant α in the Cole-Cole and other models for permittivity is should not be confused with the constant γ used for defining CPE. These constants although related are different. In addition to the common circuit elements, it also helps to know the different impedance formalisms which are defined as follows: 85 Admittance 1 Z Y (4-7) Relative permittivity 1 M (4-8) Y (4-9) i C o Relative electric modulus M ico Z (4-10) Here C o is the vacuum capacitance of the sample holder and electrode arrangement. Impedance is the combined the effect of reactance and ohmic resistance in a circuit which impedes the flow of current. Admittance, opposite to impedance is the ease with which current can flow. Permittivity is the measure of the electric field or flux formed in a material 73

74 as a function of charge, and as expected is dependent on the admittance and capacitance of the medium. It represents the opposition to field formation whereas modulus measures the opposite of that. It has been shown by Gerhardt that these different formalisms can be used to separate and magnify different effects in the materials under test. For example, the presence of a peak in the modulus with respect to frequency indicates localized relaxation, as opposed to long range conductivity in its absence. Similarly, a peak in the imaginary impedance can be related to space charge effects. Long range conductivity though clearly visible in the impedance formalism, but does not show up in the permittivity formalism Selection and Fitting of Appropriate Equivalent Circuit When testing a new material, a number of competing circuits must be considered, based on possible physical mechanisms the user can envisage in the material. One needs to have a fair knowledge about the material under study for this purpose. Since the objective of this work is to study gadolinia doped ceria, an ionic conductor, the typical response for a polycrystalline ionically conducting ceramic is considered. As shown in Figure 2-12 in Chapter 2, it typically consists of three arcs, grain in the MHz frequency range, grain boundary in the khz range and electrode in the Hz range. These frequency ranges can be used as guide to identify the contributing mechanisms, as they are fairly typical of ionic conductors, in a given temperature range. Under ideal Debye like conditions, such semicircular arcs are fit using parallel RC elements. In ionic conductors, the grain boundary resistance is usually much larger than the grain resistance, thus separating the two is easier. Similarly, a C value of 10-7 or higher is characteristic of space charge layer effects at electrode interfaces, nf range for grain boundary and pf range for grains. 85 As stated before, most materials have distributed time constants, as 74

75 opposed to a single constant. CPE is used to model such behavior, which shows up as depressed and distorted arcs. The value of α associated with the CPE signifies the distribution of time constants and the extent of depression of the semicircle in the complex plane plot. Often two or more relaxation processes have similar time constants and hence their arcs overlap and need to be de-convoluted and fit accordingly. In case the first arc does not begin at the origin, an appropriate extra circuit element/s (L, C, or R) is/are used in series to model this deviation. In case the graph is shifted along the x-axis, a series resistance is used, a capacitance is used for the first quadrant and an inductance for the fourth quadrant as is shown in. Same applies even between and at the end of the other arcs. For example, there could be a series resistance between two arcs, or there could be a resistance or even an inductance parallel to all the other circuit elements (as will be shown later in Chapter 6). As described in section 4.2.3, approximate initial values need to be estimated. Figure 4-3. Schematic showing shift in complex impedance plots and the respective equivalent circuits. 75

76 During fitting, as has been highlighted by Abram et al. 85, it is important to give full weight to the entire frequency range measured. The data must be viewed both in the linear scale and the log-log scale. Linear scale representation gives an initial visual overview, whereas the logarithmic scales allow more accurate assessment as it ensures equal weighting of the data. More features become visible in the log representation as can be seen from Figure 4-4. Figure 4-4. Example data set showing the difference between linear and log representations. Similarly frequency explicit plots can be used to separate out overlapping arcs in the complex impedance plots which are hard to distinguish. All four immitance formalisms, Z*, Y*, M*, and ε* need to be analyzed during fitting, as each of these highlights different circuit elements. For example, the Z formalism is dominated by 76

77 resistances, and Rgb being the dominant resistance, this formalism highlights the grain boundary contribution. The M formalism on the other hand, highlights the bulk contribution, since it is dominated by the inverse of capacitance, with 1/Cg being dominant. The correct equivalent circuit must give a good fit to all the formalisms. Figure 4-5. Sample data showing a complex impedance plot and the frequency explicit plot of theta for the same data which enhances the data in the blue box. As discussed in chapter 2, the data for any of the four formalisms in addition to the complex Nyquist representation, can also be represented by frequency explicit or spectroscopic plots (Figure 2-11). Low impedance values which might be harder to observe in the complex plane plots can be seen more clearly in frequency explicit plots as is shown in Figure 4-5. These plots make it easier to identify the number of relaxation mechanisms. For impedance and permittivity for example, each relaxation mechanism in the material, within the frequency range measured shows up as a peak in the Z and ε 77

78 versus frequency plots and valley in θ frequency explicit plots. Broader peaks imply more distributed time constants for the relaxation mechanisms. Slopes of these plots can thus be used to determine the value of α as has been shown by Orazem and Tribollet. 92 An example of the same is shown in Figure 4-6. Gerhardt has shown that frequency explicit plots in combination with various dielectric functions, can be used to distinguish between localized relaxation and long range conductivity. 91 For example, it was shown that overlapping Z and M peaks imply long range conductivity. Using frequency explicit plots, the change in the relaxation time for mechanisms with temperature can also be followed and studied easily. As such these data representation techniques can be used for other electroceramics to gain a better insight into the various phenomena at play. Data should generally be fit from low temperature (or DC bias) to high, with new circuit elements being added if and when they appear. At low temperatures, the analysis of the bulk response is easier. Higher temperature bulk response can then be fit using the n value obtained from the first fit as an estimate. Progressively, the grain boundary and electrode contributions can be fitted. 85 In case a circuit contains a large number of parameters, certain features may be fixed for the initial fitting runs, and the rest of the factors may be allowed to vary. The values of R, C (or CPE) or L as obtained from fitting should follow the expected temperature and frequency trends for the given material. For example, for GDC, ionic conductivity should follow the Arrhenius equation. There should be a drop in the CPE values for GDC with increasing temperature. Similarly, Re for a parallel electronic resistance introduced in doped ceria (looked at in Chapter 6) should drop with increasing bias. Any deviation from such expected behavior could be due to an incorrect circuit or fit. 78

79 The best circuit amongst different circuits with similar response can be determined from the residual analysis of the fit. An incorrect model will usually have high residual values and might even show high or low frequency tails, indicating a poor fit. After fitting, if it is still found that multiple circuits yield the same frequency response and low residuals, then additional experimental observations are required to validate a particular model Starting Values for Fitting Most fitting programs and algorithms require reasonably approximate starting values of all the circuit elements for fitting. Poor initial values can lead to poor fits (a false minimum) or even no fits at all. Based on the model to be fit, approximate initial values of the parameters need to be estimated. R and C values for parallel RC elements can be estimated either by hand fitting of individual arcs, or by the Fit Circle option in commercial software, if available. R is estimated as the x-axis intercepts of the arc and C is estimated from the relation RC=τ, where τ is the relaxation time for the mechanism (corresponds to the angular frequency ωmax at the highest point in the arc). As shown by Abram et al. 85, CPE values can be estimated by plotting the admittance (log Y vs log ω) as shown in Figure For low temperature data, this plot should contain a low frequency plateau, with a higher frequency dispersion region with a power law gradient equal to n (calculated from slope of the tangent). The intercept with the y-axis, is equal to log[a cos(nπ/2)]. Hence the values of A and n for CPE can be estimated. At higher temperatures, the high frequency gradient starts to disappear and a low frequency gradient appears, corresponding to the grain boundary dispersion. A and n values can be estimated just as for the grain. In case a clear slope is not visible in the measured temperature range, a typical value of n=0.6 can be assumed. The value of n (or α) can also be determined 79

80 from the slope of the Z versus log (frequency) plot as shown in Figure Similarly, if an inductance is present in the circuit, its value can be estimated from τ=l/r. Figure 4-6. Imaginary part of the impedance as a function of frequency with α as a parameter. Figure adapted from Orazem et al. 93 Figure 4-7. Schematic of log Y against log ω with a low frequency plateau and a high frequency dispersion adapted from Abram et al

81 After estimating the initial values, it is advisable to run a simulation of the circuit, to check whether it is close to the experimental data. A fitting routine should be run only after a satisfactory simulation Quality of Fit Once an appropriate physical model has been selected and its parameters have been fit to the impedance data, it is essential that the quality of fit be determined. This is the single most important factor that helps determine whether a particular model is correct or the CNLS routine gave a proper fit. The primary and easiest way of doing this is by visually checking that the fitted data matches well with the measured data. Another indicator is the actual and percentage error values for the different circuit elements, provided by the fitting software. Low error values are desirable. A percentage error below 5% can usually be tolerated, however, this threshold is usually subjective. Very large errors indicate an incorrect model, usually with more elements than required. The redundant elements however do not have any effect on the goodness of fit. The goodness of the fit can be determined by two parameters. The first is Chi- Squared, which is the square of the standard deviation between the measured and fitted data. However, given that the impedance values can vary by orders of magnitude, it is a relatively poor estimate of quality of fit. A data set with a poor fit at low impedance values, but a good fit at higher impedance values will give a low chi-squared value, thus giving an inaccurate analysis. A much better estimate of quality is the Sum of Squares. It is proportional to the average percentage error between the measured and fitted data. By looking at percentage values instead of absolute values, it gives equal weightage to all parts of the impedance curve, no matter what the magnitude. As per Macdonald and 81

82 Porter, proportional weighting is more accurate compared to modulus weighting for CNLS fitting. 87 Another really good measure of the quality of a fit is the analysis of residuals, as is frequently used in statistical analysis of data. 94 An example of such analysis has been shown by Masó and West 15. The values of residuals can help distinguish between a good and a bad model for the same set of data. More, importantly, any trends in residuals with frequency are indicative of an incorrect model. Residual analysis should in fact be reported with impedance analysis whenever possible, so that it gives the reader more confidence in the data. An example of residual data is shown in Figure 4-8. Figure 4-8. An example of residuals for the real and imaginary parts of impedance. Based on the practices described in this chapter, a detailed protocol with step-bystep instructions for performing impedance data analysis using ZView software was developed. The steps are detailed in Appendix A. 82

83 5. CHAPTER 5 IMPEDANCE RESULTS FOR THIN FILM AND BULK SAMPLES 5.1. Thin Film Samples Gadolinia doped ceria thin films were tested for impedance behavior. These films were later used to study the effect of bias, as is presented later in Chapter 6. This section discusses the impedance data for one such thin film and follows the fitting process. As an example, Nyquist plots showing the results of impedance spectroscopy for a 10 mol% GDC thin film as a function of temperature are shown in Figure 5-1. As expected, the arcs in the impedance plots shrink with increasing temperature, indicating in general, a trend of increasing conductivity. Figure 5-1. Nyquist plot showing impedance data for a 267 nm 10GDC thin film at different temperatures. The data shown here was fit following the protocol described in Chapter 4. An individual data set is shown in Figure 5-2. First step is the identification of an appropriate 83

84 equivalent circuit. A typical equivalent circuit for gadolinia doped ceria that has been used extensively in literature uses a parallel R-CPE combination to represent each arc in the data. The circuit used is shown in Figure 5-2. R1 and R2 represent the grain and grain boundary resistance respectively. Figure 5-2. Complex impedance plot showing the data for a 10 GDC 267 nm thin film at 130ºC along with the equivalent circuit used to fit the data. The Fit circle option in ZView software was used to estimate starting values for the resistances. The estimated values are R1 = Ω and R2 = 5.84x10 6 Ω. The CPE-P1 value was estimated as 0.8 by plotting log Y vs. log ω (Figure 5-3). The CPE- P2 values was assumed to be 0.6. The values of CPE-T1 = 1.02 x F, and CPE-T2 = 5.13 x 10-9 F were estimated based on the circle fit in ZView. Individual arcs were fitted first and the values obtained were used to obtain the final fit. The grain ionic conductivity was calculated based on R1 using the formula defined in Chapter 2. Similarly, the total ionic conductivity was calculated from R1+R2. 84

85 Figure 5-3. A plot of log Y versus log ω for estimating the values of CPE-P and CPE- T for the 10 GDC bulk sample. Figure 5-4. Arrhenius plot showing the grain ionic conductivity for a single electrode on the 10GDC thin film accounting for error propagation. 85

86 As the temperature increases, the conductivity of the films increases. The single arc at 25ºC becomes smaller and smaller until at about 50ºC a second arc appears. With further rise in temperature, both these arcs progressively become smaller. The low temperature data is fit using a parallel combination resistance and a constant phase element (R-CPE), whereas at higher temperatures, the two arcs can be reasonably fit using two parallel R-CPE combinations in series with each other. The fitting was done similar to the bulk sample mentioned in the previous section. The grain ionic conductivity can be calculated using the value of R1 obtained from equivalent circuit fitting and adjusting for area and width as per equation (2-4). Based on the error propagation discussion in Chapter 3, the total error for conductivity measurement of a film for a single electrode was calculated by considering the errors in the R values as obtained from ZView, errors in dimension measurement, and the error in temperature measurement. Figure 5-4 shows a plot of conductivity with respect to temperature including the respective x and y errors. The total error associated with the fitting, dimension measurement, and temperature measurement propagating to the conductivity of a sample is very small and will have minimal effect on the activation energy calculated. This is expected to be the same for all samples tested if all the instructions in the fitting protocol are followed. The conductivity values thus obtained for each sample can hence be trusted. Given that the same procedure and protocol is followed for measuring samples throughout this study, the error for these individual samples will be small. The only other major factor that can affect the conductivity is the sample to sample variation, which can be accounted for by testing multiple samples and presenting their combined results. The error introduced from different samples is much 86

87 higher than the error in conductivity measurement in a single sample and hence cannot be neglected. In the case of thin films, this can be accounted for by measuring the conductivity for different spot electrodes. For the 10GDC 267 nm thin film, the corresponding Arrhenius plot is shown in Figure 5-5. The plot could not be fit with a single slope as the data points lay outside the confidence bands (95%). Fitting the data with two slopes give a better with all the data within the confidence bands. This technique can be used to decide whether a single slope or multiple slopes for data fitting, and has been used throughout this work. Origin software takes care of the errors in conductivity and accounts for them during the calculation of the slope. Figure 5-5. Arrhenius plot showing the average grain ionic conductivity for multiple electrodes on a 10GDC thin film with 95% confidence bands. 87

88 The conductivity follows Arrhenius behavior and for a 267 nm thick 10 mol% gadolinia doped ceria film has activation energies of 1.34 ev and ev calculated from the slope of the graph in Figure 5-4 based on equation (2-4) Bulk Samples Figure 5-6. Complex impedance data for a 10GDC bulk sample at different temperatures. Bulk samples of 10 mol% GDC were tested using impedance spectroscopy as part of the study involving dopant segregation in Chapter 7. Impedance data for a 10GDC control sample sintered in air at 1600⁰C for 10 hours is shown in Figure 5-6. The grain ionic conductivity follows the Arrhenius relation and was plotted against temperature as shown in Figure 5-7. The slope of the line was used to calculate the activation energy, based on equation (2-4), where two slopes were found. The values of activation energy 88

89 calculated were 0.88 ev and 0.56 ev. The conductivity and activation energy values obtained are comparable to those found in literature. The trends in conductivity show that, as expected, the conductivity in thin films is higher than that for the bulk samples given that both have similar dopant concentrations. Figure 5-7. Arrhenius plot showing the average grain ionic conductivity of the 10GDC samples at different temperatures. 89

90 6. CHAPTER 6 EFFECT OF A DC BIAS ON IMPEDANCE RESULTS 6.1. Background There have been several studies on the conductivity of oxide electroceramics under the influence of a DC bias. A DC bias was initially used to study the nature of grain boundaries in acceptor doped ceria by Guo et al. 95, where individual grain boundaries showed non-linear current-voltage behavior, and the effective grain boundary thickness (electrical thickness) was found to increase with increasing bias. Work by Guo and Waser 69 involving yttria doped ceria, has attributed the change in behavior under bias to phenomena occurring at the grain boundaries. They use the space-charge model of grain boundaries to explain the observed behavior, as has been detailed earlier in Chapter 2. According to their work, at zero bias, the two space charge layers on either side of a grain boundary are symmetrical. However, on application of a DC bias, one space charge layer is depressed, while the other one increases in width as shown in Figure 6-1. Figure 6-1. Schematic representation of the oxygen vacancy concentration and the space charge layer without any applied bias (left) and with an applied bias (right), as proposed by Guo and Waser

91 Overall, using bias measurements approximated over a single grain boundary, it was shown that the total thickness of the grain boundary and the space-charge layers combined increases. It was also shown that the bulk properties were almost independent of bias, whereas, the effect on grain boundary resistance was significant. However, since the focus of the work was on non-linear properties of the grain boundaries, the mechanism behind the improved conduction was not further investigated. This was used to support the space charge theory for blocking grain boundaries. The effect of bias was studied in detail only much later by Masó and West 15. Their study concentrated on the effect of a small DC bias on the electronic conductivity in bulk yttria stabilized zirconia (YSZ) samples. A drop in resistance was observed under a DC bias, which was attributed to the onset of electronic conduction, and the possibility of variable oxidation states of oxide ions and their response to a DC bias. The corresponding complex impedance data is shown in Figure 6-2. It was found that it took about 10 minutes for the impedance response to stabilize on the application or removal of bias. The electronic contribution increases with increasing bias, and after a certain bias value, it becomes more dominant than the ionic contribution to conductivity. This happens at lower and lower bias values as the temperature is increased. The behavior was modelled using equivalent circuits where a resistance starts to appear parallel to the original equivalent circuit at low bias values (only low bias values were studied). This new resistance was attributed to electronic conduction introduced along a parallel pathway. 15 Similar resistance degradation has also been reported by Wang et al. 96 for Fedoped SrTiO3 single crystals. In this combined experimental and computational work, it 91

92 was found that an applied electric field induces migration of oxygen vacancies and establishes new local defect equilibria. It is this change in the local defect structure that causes a drop in the resistance. It was also found that oxygen partial pressure and temperature play a major role in this degradation mechanism. There has also been work on various other acceptor doped oxides like BaTiO3, CaTiO3 and BiFeO3 which have attributed field enhanced conductivity in these materials variously to ionization processes, reactions between oxygen and surface species, underbonded oxide ions, and unique electronic structure in defect complexes in these materials Figure 6-2. Impedance complex plane plots for 8 mol% YSZ at different temperatures and DC bias values as shown by Masó and West 15 where 10 V 43 V-cm -1. It is particularly interesting to look at work by Moballegh and Dickey which studied the effect of bias on single crystal TiO2-x electroded with Pt. 102 The use of a single crystal instead of a polycrystalline material paints a clearer picture. The Pt electrode interfaces exhibit Schottky contact behavior. As expected it was found that the applied electric field 92

93 induces a redistribution of point defects throughout the crystal, causing accumulation of Ti interstitials and oxygen vacancies at the cathode. The same is also corroborated by the Brouwer defect diagram for titania, 102 where under low oxygen partial pressures (reducing condition) causes an increases in oxygen vacancy and titanium interstitials. Such reducing conditions exist at the cathode under a DC bias. Figure 6-3. Oxygen concentration in the region adjacent to the Pt cathode interface in a TiOx single crystal after degradation under 15 V bias determined using EELS as shown by and adapted from Moballegh and Dickey. 98 Figure 6-3 shows the change in stoichiometry at the cathode interface as observed by Moballegh and Dickey using electron energy loss spectra (EELS). This modifies the Schottky barrier at the electrode and essentially degrades it. It was shown that degradation takes place in two regimes. In the low field regime, the electrical transport is dominated by local changes near electrodes, and results in macroscopic rectification behavior, with one of the electrodes being forward biased and the other being reverse biased, and leads to a drop in resistance when forward biased. However, at higher 93

94 voltages, the stoichiometry is altered so much that it leads to the formation of microstructural defects, in this case even a new phase. A significant change in the bulk stoichiometry can lead to the conduction mechanism itself changing in such modified regions, and in this case, it leads to an increase in resistance with time under an applied bias. Figure 6-4. A schematic showing concentration of vacancies in an Fe-SrTiO3 film at high and low frequencies and the corresponding Nyquist plot showing an inductive loop, adapted from Taibl et al. 16 This work was further strengthened by Taibl et al. 16 who have shown similar behavior in Fe-doped SrTiO3 thin films, and have supported the vacancy migration theory and stoichiometry variations under bias using characteristic inductive loops in the impedance spectra. The segregation of vacancies was achieved by using two different electrodes, only one of which was blocking to oxygen vacancies. The results were supported by DC I-V curves at different speeds, which exhibit different trends depending on the sweep speeds. The existence of inductive loops was explained on the basis of the time required for oxygen vacancies to redistribute after a voltage change, and hence 94

95 they were attributed to ion motion across the width of the film. Figure 6-4 shows a schematic, and a Nyquist plot with a low frequency inductive loop for Fe-SrTiO3. Since there is a possibility of electronic conduction under bias in GDC, it becomes pertinent to look at the considerable amount work on mixed ionic and electronic conductivity in ceria materials. Reducing atmospheres have been shown to introduce electronic conductivity in pure ceria materials, and turning them from poor ionic conductors to good electronic conductors. The associated reaction is shown in equation (6-1). 1 (6-1) VO O 2e 2 x OO 2 Guo et al. have shown that under a reducing atmosphere, the bulk conductivity of 1% yttria doped ceria increases only slightly, whereas there is a drastic increase in the grain boundary conductivity. 55 Assuming a brick layer model, charge carriers can travel either parallel to the current or perpendicular to the current direction. Thus grain boundaries can be either parallel or perpendicular to the direction of current flow. Since any conductivity across grain boundaries has to be in series to the bulk flow, as shown in the schematic in Figure 6-6, a more pronounced partial electronic conductivity at the grain boundaries was concluded to be due to conduction along grain boundaries parallel to the current flow. It has been shown that in such a scenario, and the relations,ion,eon R gb Rgb and R R hold true. The electrons generated per equation (6-1) tend to, ion gb, eon gb accumulate at the grain boundaries which eventually lead to such behavior. 95

96 Figure 6-5. The brick layer model for a polycrystalline ceramic with the paths for conduction as shown by and adapted from Macdonald. 79 Figure 6-6. Schematic showing ionic and electronic conduction paths for a polycrystalline ceramic assumed to have a brick layer model as proposed by and adapted from Guo and Waser. 69 Here R is the resistance, ion stands for ionic, eon stands for electronic, gb stands for grain boundary, and and denote grain boundary directions parallel and perpendicular to the current respectively. 96

97 Similarly, with nanocrystalline ceria, it has been shown that under reducing atmospheres a much higher conductivity is observed due to accumulation of electrons and depletion of oxygen vacancies in the space-charge layer. Such regions near the grain boundaries, within which electron concentration is higher than oxygen vacancy concentration were designated as inversion layers. The inversion layer thickness depends on temperature and oxygen partial pressure, and increases at higher temperatures and lower partial pressures, as more and more electrons accumulate at the grain boundaries, in essence decreasing the effective electrical grain boundary thickness. It is the presence of such inversion layers with high electron concentration which makes the grain boundaries more conductive than bulk. Hence the ions flow in the bulk and across the grain boundaries perpendicular to the current flow, whereas electrons flow along the grain boundaries parallel to the current flow with R,eon gb R, eon gb. This effect was shown for both acceptor-doped and undoped ceria bulk samples. 55,103 Figure 6-7. Inversion layer with high electron concentration near the grain boundary adapted from Guo et al

98 Such studies as the ones mentioned above are important because they demonstrate novel mechanisms of improving conductivity, introducing mixed ionic conductivity, or in other cases shed light on the possible degradation of properties in electroceramic devices. Figure 6-8. Complex impedance plot showing the effect of a low DC bias on 10 mol% doped gadolinia doped ceria bulk specimen at 200ºC. A similar study is performed here for gadolinia doped ceria, for which such an effect has not been studied. Preliminary tests on bulk samples of GDC show behavior very similar to that observed by Masó and West 15 as has been shown in Figure

99 Interestingly at relatively higher bias values, a small inductive loop is observed at low frequencies as shown in inset in Figure 6-8. To study this effect further, and understand it in more detail, this study looks at gadolinia doped ceria thin films. Due to the small thickness of the films, any applied voltage translates into very high electric fields, which have not been studied before for such effects Bias Effect on GDC Thin Films Figure 6-9. Nyquist plot showing the example of a DC bias effect on a 267 nm thick 10 mol% GDC film at 120⁰C. Inset is zoomed in at the origin. To study the effect of DC bias on the observed ionic conductivity and the complex impedance behavior of 10 mol% gadolinia doped ceria films, impedance spectroscopy was performed as described in the previous chapters under positive DC bias values 99

100 ranging from 0 V to 3 V at 10⁰C intervals up to 150⁰C. At every temperature, initially the bias values were measured at 0.5 V intervals. It was found that with increasing bias, the impedance response for the sample begins to change. The change is not much at low temperatures however, it becomes more and more pronounced with a rise in temperature. Figure Nyquist plots showing the effect of a DC bias on a 267 nm thick 10 mol% GDC film at different temperatures. A 267 nm film is considered here, for which the DC bias values used translate to fields of up to 112 kv/cm. Figure 6-9 shows the effects of increasing bias on the Nyquist for the aforementioned sample. With an increase in bias, the impedance arcs in the Nyquist plot progressively shrink and new features appear progressively. Figure

101 shows a comparison of similar data at different temperatures. It can be seen that these changes occur only above certain temperatures depending on the processing conditions for the films. With increased temperature, the effects of bias can be seen at progressively lower bias values Characteristic Steps in Nyquist Plots under Bias Figure A very detailed plot showing every step in the evolution of a 10 mol% gadolinia doped ceria thin film under bias at 130⁰C. To better understand the different stages in which bias affects the sample, even shorter bias intervals were used. Figure 6-11 shows a plot with detailed effects of bias, 101

102 and all the involved steps. It is interesting to note that at lower bias values the response moves towards higher impedance, and only after a certain point it starts moving towards lower impedance values as the applied bias is increased. These can be treated as two regimes in the impedance response change with bias. Figure Nyquist plot showing characteristic steps in the evolution of the impedance response of a 10GDC thin film under increasing bias. Individual plots are labelled A through H and later correlated with equivalent circuits. Using this figure, and based on the data for different films at different temperatures, five major steps can be identified in the change of behavior with bias. These steps are characteristic of the response of GDC thin films to DC bias. These are summarized in 102

103 Figure 6-12 for a 10 GDC thin film sample 267 nm thick at 250ºC. A few interesting features can be observed here. The arc ascribed to grain or bulk contribution does not change much with increasing bias. At some intermediate bias values, a third new arc appears. This is similar to the effect of temperature, where new additional arcs appear at higher and higher temperatures as newer relaxation mechanisms come under the experimental range. A pig tail like feature is also observed. Most interestingly, at higher bias values, the plot enters the third, and even fourth quadrant in some cases. Figure Frequency explicit plots showing the magnitude of impedance Z and the phase angle as a function of different DC bias values for a 10 GDC, 267 nm thin film. 103

104 Figure 6-13 shows the frequency explicit plots of the magnitude of impedance and phase angles for the same sample at 130ºC for different bias values. It can be seen that there is a very high change in the impedance at low frequencies (<10 4 Hz). In the low frequency range, the impedance progressively decreases and then around 2.2 V bias, it starts increasing again, and eventually stabilizes around 3 V. There is not much change in the impedance at higher voltages. There is also a change in the impedance response at higher frequencies, but it is relatively small. However, it is interesting to note that in the high frequency range, there is no switch in the trend of impedance magnitude with bias as can be seen in the inset. Impedance steadily decreases with increasing bias. Similarly, there is a very large phase shift at higher frequencies as bias is increased, where the phase shift decreases progressively with increasing bias and subsequently becomes negative. Such change in impedance and phase shift can only be explained by introduction and subsequent increase of an inductive response in the low frequency range. Looking at the frequency explicit plots for the real and imaginary parts of impedance, there is a change in both the real and imaginary parts of impedance, as can be seen in Figure In the low frequency range the change in the imaginary part is larger than that in the real part, indicating that although both resistive and reactive components are changing substantially, the change in the reactive contribution is higher. On the contrary, in the high frequency range, the behavior is reversed, with the resistive change being more dominant than the reactive change, although the change itself is relatively small (not shown here). In other words, in the low frequency range, most of the change in impedance is due to changes in capacitance and/or inductance (since they 104

105 make up the reactance), whereas in the high frequency range, most of the small change in impedance is due to resistance variation. The data in Figure 6-14 is plotted on a linear scale instead of a log scale because negative values are expected in both the real and imaginary impedance cases, and the data below the axis would have been lost in the log scale. Figure Frequency explicit plots showing the real and imaginary parts of impedance (Z and -Z respectively) as a function of applied DC bias for a 10GDC 267 nm thin film. It is also helpful to look at the permittivity formalism, as it sheds some more light on the phenomena at play. Figure 6-15 shows the frequency explicit plots for the real part of permittivity. The real part of permittivity, increases with the value of applied 105

106 bias.in the high frequency range, however there is a flip in the trend around 50 khz and starts decreasing. This flip can be seen in the inset of Figure There is no such corresponding change in the imaginary part of permittivity. This flip in trend means that at high frequencies the capacitive response of the sample is more dominant, whereas in the low frequency range the inductive response is dominant. A similar behavior is seen in the imaginary part of admittance as expected (not shown here). Figure Frequency explicit plot showing the real permittivity for different bias values for a 10GDC 267 nm film. Inset shows the same plot zoomed in to the frequency range of Hz. Here one must note that this inductive behavior becomes more and more dominant as the bias applied is increased, which leads to the plots crossing into the negative at lower and lower frequencies. This corroborates the observation about inductive behavior 106

107 from impedance and loss vs. frequency plots shown in Figure This information gained from the spectroscopic plots was used to determine the equivalent circuits for fitting Fitting and Analysis By fitting each of the data sets shown in Figure 6-12 using different equivalent circuits, an idea as to the various processes and changes taking place in the material behavior can be obtained. The trends in the values of circuit elements and the new elements appearing, provide crucial information. Each of these data sets was then fit to equivalent circuits as per the protocol in Chapter 4. The protocol becomes particularly important here, as at almost every step, the equivalent circuit changes and new elements are added. The behavior observed in Figure 6-11 has rarely been seen for oxide ceramics, let alone studied. Traditional interpretation of similar data has included inductive elements related to reversible storage of electric kinetic energy. One example is the poisoning of Pt anode in polymer electrolyte fuel cells (PEFCs), where a pseudo-inductive behavior is observed below 3 Hz. 79 Another example is that of Faradaic coupled reactions dependent on potential and surface coverage, where an inductive loop is observed under high potential. 92 Only the very recent work by Masó and West 15 and the work by Taibl et al. 16 bears a resemblance to the phenomena observed here. Hence, their template for fitting was used as a starting point. Multiple possible equivalent circuits were proposed based on prior knowledge from literature. The circuits were tested for fitting and the most probable circuit was identified from amongst them. The equivalent circuit proposed in this case contains parallel pairs of R and CPE in series with each other, for each of the arcs in the complex impedance plots. These arcs represent the grain and grain boundary 107

108 contribution. Additionally, as shown using the spectroscopic plots in the previous section, there needs to be an inductance parallel to these circuit elements. Any parallel inductive path needs to have a resistance associated with it, so a resistance was also included parallel to the inductance. This resistance has also been proposed by Masó and West for YSZ under bias. 15 The equivalent circuit proposed is depicted in Figure Depending on the shape of the individual plots, elements were added or removed from this circuit. Figure Proposed equivalent circuit based on the visual analysis of the data in different formalisms and similar data presented in literature. As shown in Figure 6-12, at 0 V bias the complex impedance plot shows two arcs, common for such thin films. This data can be fit with an equivalent circuit consisting of two parallel R-CPE pairs in series as shown in Figure 6-17, and as is commonly done for doped ceria. With increase in bias, the value of R2 first increases and then starts decreasing (as can be seen in figure for 0.5 V, 1 V and 1.5 V bias). In addition, a resistance R3 appears parallel to the previous elements. The equivalent circuit is shown in Figure At around 1.7 V bias, a third arcs appears, barely visible as a curve in the second arc. This arc is further enhanced at 1.9 V. Both of these data sets can be fit using the equivalent circuit shown in Figure An additional element CPE3 is needed in series here to properly fit the data. This element is possibly due to an electrode effect. 108

109 With further increase in bias, the third arc gets depressed and twists on itself creating a pigtail like shape. At this point, an inductor must be introduced into the circuit to be able to fit the data as shown in Figure With further increase in bias, the pig tail opens up and the arc crosses into the third quadrant of the Nyquist plot and then also eventually into the fourth quadrant. The equivalent circuit remains the same although the values of the circuit elements do change. Figure Equivalent circuits used to fit impedance data shown in Figure 6-12 along with the respective bias values. 109

110 Table 6-1. The values for equivalent circuit parameters obtained after fitting of the impedance data shown in figure. Element/Bias 0 V 1 V 1.5 V 1.7 V 1.9 V 2 V 2.1 V 2.8 V R1 (Ω) CPE1-T 1.7x x x x x x x x10-10 CPE1-P R2 (Ω) 1.2x x x CPE2-T 6.8x x10-9 1x x x x10-8 4x x10-9 CPE2-P CPE3-T x x x x x10-7 CPE3-P R3 (Ω) x x x L (H) With increasing bias, the values of R1, R2, R3, and L show an overall decrease. The value of R1 does not show much changes until at very high biases, and even then the change is very small compared to the changes in R2 and R3. R2 increases slightly at low biases followed by an abrupt drop. Around the same bias value as R2, R3 also shows a drastic drop in value. CPE1 (T and P) does not change much. CPE2-T similar to R2 increases at low bias and then decreases at higher values. CPE3-T decreases with increasing bias, and then as the plots enter the fourth quadrant, it increases. Traditionally 110

111 the three arcs as seen for 1.7 V bias, are usually ascribed to grain, grain boundary and electrode effects in doped ceria systems. 66,104 With increase in bias, there is a general decrease in the values of circuit elements as would be expected. With increasing bias, the electrode arc collapses first, followed by the grain boundary arc, whereas the arc representing bulk conductivity remains the same although at higher bias values, its corresponding resistance value is considerably lower. The time required for the behavior to stabilize is about seconds depending on the temperature. A higher time of about minutes is required for the behavior to get back to normal after removal of the bias. The values of the different circuit elements obtained using fitting for the various characteristic plots shown in Figure 6-12 are shown in Table 6-1. Figure Plot showing the values of R1 (grain resistance) for different applied bias, obtained using equivalent circuit fitting of impedance data for a 10GDC 267 nm film at 130ºC. 111

112 Figure Plot showing the values of R2 (grain boundary resistance) for different applied bias, obtained using equivalent circuit fitting of impedance data for a 10GDC 267 nm film at 130ºC. Figure Plot showing the values of R3 (representing electronic conduction) for different applied bias, obtained using equivalent circuit fitting of impedance data for a 10GDC 267 nm film at 130ºC. 112

113 Figure Plot showing the values of L (inductance) for different applied bias, obtained using equivalent circuit fitting of impedance data for a 10GDC 267 nm film at 130ºC Mechanism Based on the prior work in literature, visual analysis of data, the values of circuit elements obtained from fitting with equivalent circuits, and trends therein, a mechanism is proposed. The various phenomena observed are divided into three regimes, based on the three equivalent circuits and the bias values used Low Bias At zero bias, the impedance behavior of the films is as expected. The two arcs, small and large, can be attributed to the grain and the grain boundary relaxation respectively. The electrode contribution is not visible in this case as it is beyond the measurable frequency range, as is common with thin films. As a small bias is applied, the grain boundary resistance increases, with the grain resistance being almost constant as shown in Figure The small bias leads to the accumulation of positively charged oxygen vacancies at the grain boundaries and the 113

114 electrode. This exacerbates the already blocking nature of the grain boundaries further and leads to a rise in resistance of the grain boundaries as recorded in Table 6-1. The accumulation of vacancies at the cathode due to the bias leads to reducing conditions, which as per the schematic Brouwer defect diagram in Figure 6-22 should lead to a higher concentration of electrons. Figure Schematic Brouwer diagram for acceptor doped ceria adapted from Eufinger et al. 105 The small bias causes electrons to move into the sample from the cathode interface. Grain boundaries being good conductors of electrons, these electrons travel through grain boundaries parallel to the direction of applied field, to the opposite 114

115 electrode, thus establishing a parallel pathway for electronic conduction. A schematic of the sample under small bias is presented in Figure Figure Schematic of a gadolinia doped ceria sample under low bias. Figure Leakage current as a function of time and different applied DC voltages for a 10GDC 267 nm thin film measured at 120ºC. 115

116 The introduction of a parallel pathway with resistance R3 (although its value is very large) leads to a drop in the overall resistance and a rise in the leakage current as is shown in Figure A finite time is required to reach a steady state distribution of vacancies after applying bias. The same can be seen in the leakage current plot, where the current stabilizes around seconds, which corresponds well with the time required for the impedance response to stabilize (30-45 seconds) Medium Bias Platinum forms a Schottky barrier with rare earth doped ceria. As the applied bias is increased further, and platinum being a blocking electrode for oxygen vacancies, more and more vacancies segregate at the cathode. At the same time, more and more electrons accumulate at the interface from the side of the electrode. With increasing field, an increasing number of electrons can now jump across the barrier. With increasing bias, the current along grain boundaries increases and correspondingly, the value of the resistance R3 decreases. With the electrons moving across the electrodes in the voltage range, the electrode interface becomes visible in the impedance response within the measured frequency range. This is represented by the new CPE addition in the equivalent circuit, which decreases with increasing bias in the medium range. Thus, there are three arcs instead of two from the previous regime. As the bias is further increased, the arcs tend to become smaller. This indicates that the grain boundaries and electrode interface become more and more conductive. They also tend to become more circular and bend towards the real axis, indicating a change from capacitive towards resistive behavior, caused due to conduction of electrons. A schematic is shown in Figure

117 Figure Schematic showing phenomena during impedance testing under medium bias in gadolinia doped ceria. Arrows indicate the motion of electrons. Figure Schematic band diagrams showing the cathode and anode interface under bias. The process happening at the electrodes can be better understood from the schematic band diagrams of the electrode interfaces under bias shown in Figure With increasing bias, the barrier height at the cathode is reduced and it is easier for 117

118 electrons to flow from the Pt into the GDC, whereas at the anode, these electrons easily flow back into the Pt electrode and the external circuit High Bias At further higher bias values, above 2 V, more and more electrons flow across the electrodes and through the parallel grain boundaries, leading to the collapse of first the electrode arc followed by the grain boundary arc. The material starts exhibiting inductive behavior. This results in the arc twisting up on itself although it stays in the first quadrant. With increasing bias, the electrode and subsequently grain boundary arc move into the fourth quadrant. The inductive loops can be explained by following the line of reasoning used by Taibl et al. 16 summarized at the start of this chapter. The model proposed requires the assumption that the electronic current is much higher than the ionic current, which mostly holds true in this case. With increasing bias, despite the low contribution of ions to conduction, due to ion flux the vacancy segregation becomes even more concentrated at the cathode after a steady state is achieved. The AC voltage stimulus causes these vacancies to redistribute. However, their response depends on their mobility. At high frequencies, there is almost no change in the distribution, as the vacancies cannot oscillate with the AC voltage. At lower frequencies however, there is enough time for the redistribution of oxygen vacancies within a half cycle of the sinusoidal voltage signal. Thus every half cycle, as long as the ions can respond, a new vacancy distribution is formed. This migration of ions is in series to the electronic current and causes a negative phase shift, thus showing up as an inductive loop. 16 With increasing bias, there is even more vacancy accumulation, which accentuates the inductive loops. A schematic is shown in Figure

119 Throughout the different bias regimes, the arc representing grain contribution does not change much, except at very high bias values where it starts shrinking. It is only under very high biases, that the grain interior is also reduced, such that electronic conduction takes place. Figure Schematic showing phenomena during impedance testing under high bias in gadolinia doped ceria. Additionally, to verify the reasoning for the inductive loops, DC I-V measurements were performed at various sweep speeds. This measurement was based on the work by Taibl et al. to explain the change in vacancy distribution on the length scale of the sample. 16 The sweep speeds were varied as described in Chapter 3 to match the frequencies of the points where the complex impedance plot crosses the real axis. It was found that when the sweep speed matches the frequency of the point at which the complex impedance intersects the real axis, the resistance obtained from the slope of the I-V plot matches the value obtained for electronic resistance (R3) obtained from equivalent circuit fitting of the data. The corresponding data are shown in Figure

120 Figure DC I-V measurement and complex impedance with matching resistances for a 10GDC 267 nm film at 130ºC under 2.1 V bias and oscillation voltage of 300 mv. 120

121 CHAPTER 7 DOPANT SEGREGATION AND SINTERING UNDER REDUCING ATMOSPHERE Segregation and Defect Associates It has been shown that the composition and microstructure of a ceramic material have a strong effect on its ionic conductivity. 11,12,32,70, For example, the resistance to ionic conduction is much higher for grain boundaries than for the grains or the bulk of the material. 55,66,109 Various mechanisms have been proposed to explain this high resistance to ionic conduction across the grain boundaries. It has been shown that the high resistance of grain boundaries is due to the segregation of dopants and impurities at grain boundaries and triple point junctions. 14 Siliceous impurities present in the starting powder and introduced during processing lead to the formation of a glassy phase at grain boundaries and triple points. 14,55 Similarly, any other rare earth impurities and intentionally added dopants tend to segregate at grain boundaries during sintering as has been shown by multiple sources. 14,76,77 Atom probe tomography has shown that in Nd doped ceria, the Nd ions and oxygen vacancies segregate at the grain boundaries with the compositional difference extending up to 4-6 nm from the structural center of the boundaries as was summarized earlier and shown in Figure Conventional sintering procedures in general lead to a very high concentration of dopants at grain boundaries. As per equation (2-4), increasing the dopant concentration should lead to a higher concentration of vacancies, and higher ionic conductivity. However, at higher dopant concentrations, the positively charged vacancies form defect associates with the negatively charged dopant ions. The details of this phenomenon are summarized in Chapter 2. The defect complexes effectively lock in the oxygen vacancies, reducing the 121

122 ionic conductivity as dopant concentration increases. These defect associates lower the overall ionic conductivity, with the grain boundary resistance being the biggest detriment Fast firing and Microwave Sintering The key to getting good intermediate-temperature performance is to reduce the resistance of grain boundaries. Various solutions have been proposed with varying degrees of success to address this issue. The earliest and the simplest was to modify the processing so as to reduce the amount of grain boundaries. 107,108,110,111 Smaller starting powder size, and fast firing techniques can be used to obtain smaller grain sizes An interesting side effect of fast firing is that it also offers the opportunity to mitigate dopant segregation. This route takes advantage of the kinetics of diffusion and completes the sintering process before segregation of dopants takes place. However, except in very small samples, chances of thermal shock and cracking due to uneven heating are very high. It has been shown that microwave assisted sintering can be used to improve conductivity by sintering for a short amount of time (as low as one hour) compared to conventional sintering. 14,115,116 The short sintering time prevents segregation of dopants and impurities at grain boundaries and gives a more uniform distribution over the entire sample. The even heating throughout the sample gets rid of thermal shock and cracking issues. Work performed by the author in collaboration with Bruce Peacock from Medtronic Corporation showed that microwave sintering gives a more uniform dopant distribution compared to the conventional route. Focused ion beam (FIB) was used to extract samples of subsurface triple grain junctions (Figure 7-1) out of a bulk pellet specimen which were then analyzed. Figure 7-2 shows the energy dispersive 122

123 spectroscopy (EDS) line scans across a triple grain junction in Sm0.05Nd0.05Ce0.9O2-δ after conventional sintering. There is a definite rise in the concentration of Sm at the junction, Nd concentration distribution curiously does not change much. Contrasting that with microwave sintered samples (Figure 7-3), it was difficult to isolate triple grain junctions because of the small grain sizes, however, there was no discernible segregation of either Sm or Nd at any point in the analyzed area. The more uniform dopant distribution explains the higher observed conductivity. Figure 7-1. A sub-surface triple grain junction in Sm/Nd doped ceria obtained using focused ion beam. EDS line scans were conducted across this junction (Performed by Bruce Peacock at Medtronic Inc.). Despite the higher conductivity, both microwave and fast sintering require very specific conditions, and often due to poor processing practices lead to a drop in the density of the sintered ceramic as there is not enough diffusion for grain growth and densification to occur. Another technique that has been experimented with is spark plasma sintering (SPS) which is fast, gives low grain growth, and more uniform dopant distribution. 123

124 Figure 7-2. EDS line scans across a sub-surface triple grain junction in a Sm/Nd doped ceria sample sintered conventionally. Sm segregation is observed (Performed by Bruce Peacock at Medtronic Inc.). Figure 7-3. EDS line scans across the surface of a Sm/Nd doped ceria sample sintered in a microwave. Both Sm and Nd are relatively uniformly distributed (Performed by Bruce Peacock at Medtronic Inc.). 124

125 7.3. Sintering under Reducing Atmosphere The above-mentioned approaches have some drawbacks, and all of them try to solve the problem by taking advantage of the kinetics of dopant diffusion. Another possible way of approaching the problem is by modifying the energetics of the system along with the kinetics. The reason dopants segregate at the grain boundaries is to reduce the overall free energy of the system. The extent to which a dopant will form a uniform solid solution with ceria is dependent on several factors summarized as the Hume-Rothery rules. The primary factors that affect the solid solution are, atomic or ionic size, electronegativity difference, similarity of crystal structure and valency 117. All other factors being similar, it is the crystal structure mismatch, cation mismatch, and the defect charge difference between Gd +3 and Ce +4 that leads to the preferential segregation of Gd (or other similar dopants) at the grain boundaries, with the driving force being the reduction of grain boundary surface energy. 118 To overcome this hurdle, the effect of sintering under reducing atmosphere on the dopant segregation and ionic conductivity of doped ceria electrolytes was studied. The hypothesis is that by sintering GDC pellets in a reducing atmosphere of 4% H2-N2, the Ce +4 ions are expected to get reduced to Ce +3. Gd Ce charged substitution defects are thus not expected to form. All these factors combined are expected to lead to a more uniform microstructure without much dopant and vacancy segregation at the grain boundaries, thus improving the conductivity. A schematic is shown in Figure 7-4. Esposito et al. in their work on gadolinia doped ceria have shown that sintering in reducing atmospheres, produces highly defective GDC, and reduces the Gd/Ce cation mismatch leading to a faster rate of mass diffusion. 63 The grain growth and densification in 125

126 conventional gadolinia doped ceria is otherwise inhibited due to a space charge effect and is explained by the solute drag model. 119 Esposito et al. use this phenomenon to enable densification at lower sintering temperatures and also get a an increase in total electrical conductivity. 9 Figure 7-4. Schematic of dopant and vacancy distribution at grain boundaries for a sample sintered in air (left) and for one sintered in H2 and re-oxidized (right). To prove the hypothesis of uniform dopant distribution and higher conductivity in gadolinia doped ceria after sintering in a reducing atmosphere, control samples of 10GDC were fabricated using the co-precipitation route as described in Chapter 3. The densities obtained were in the range of ~97%. The other samples were sintered under a reducing atmosphere of 4% H2-N2 as described in Chapter 2. Figure 7-5 shows the appearance of the two kinds of samples. Control samples had a cream color, whereas, the reduced samples showed shades of gray-black depending on the sintering conditions. The reduced pellets were then oxidized at a lower temperature (900ºC) for 24 hours. Upon re-oxidation, the color of the samples becomes similar to that of the control samples. 126

127 Figure 7-5. Appearance of a 10GDC control pellet sintered at 1600⁰C for 10 hours (left) and one sintered under 4%H2-N2 at 1100⁰C for 20 hours (right) Electron Probe Micro-Analysis To determine the effect of processing on the segregation of dopants, electron probe micro-analysis (EPMA) was used. EPMA uses a combination of wavelength and energy dispersive spectroscopy (WDS and EDS), and makes possible minor and trace analysis with high spatial resolution (sub-micron scale). For quantification of the elemental distribution, the spectra standard materials were analyzed first. The standards used were Gd metal (SPI supplies) for Gd, CeF3 (SPI supplies) for Ce and andradite (Ca3Fe2Si3O12, P&H Developments Ltd. Geo Block MkII) for O, with the elemental concentration in each of the standards already known. To identify and quantify the elements, different peaks in the WDS spectra were used. The Lα peak was used for Ce, since it was the highest intensity peak in the energy range analyzed. It was measured using an LPET detector. For Gd, the Lβ peak was measured using an LLIF detector. This is because, as shown in Figure 7-6, the Lα peak for Gd coincides with the Lγ peak for Ce, thus making Gd detection very difficult. Similarly, a Kα peak is used to identify O using an LLIF detector. The Gd Lβ peak has a lower intensity compared to other peaks. Hence, for more accurate determination, longer collection times were used (10 ms). 127

128 Figure 7-6. WDS spectra from the LPET (top) and LLIF (bottom) detectors used to characterize Ce and Gd distribution using EPMA, shown here for a GDC conventional sample after sintering. 128

129 Figure 7-7. BSE image for 10GDC control sample. Figure Figure 7-10 show area scans for the GDC control sample and Figure Figure 7-15 show the same for a sample sintered under a reducing atmosphere and subsequently re-oxidized. Figure 7-11 and Figure 7-16 show representative line scans across a grain boundary for the same respective samples. To obtain as representative results as possible, multiple different area scans (total over 5000 μm 2 per sample) were performed on each sample. The initial data for each element is obtained only in terms of intensity. This data was then converted to at% from intensity by applying the information from the standards mentioned above. The line scans were obtained later from the area scan data during post-processing using SX Results software accompanying the equipment. 129

130 Figure 7-8. EPMA area scan for Gd Lβ peak, for 10 GDC control sample. Gd segregation is observed at grain boundaries and triple grain junctions. Figure 7-7 shows a backscattered image for a control 10 GDC sample. The corresponding EPMA area scan for the same area shows segregation of Gd at the grain boundaries and triple point junctions. As can be seen from the representative line scan data in Figure 7-11, the concentration rises from ~4 at% in the grain to ~10 at% at the grain boundary. Similar to the atom probe study by Diercks et al. 77, there is also a rise in the concentration of Ce, from ~32 at% in the bulk to ~49 at% at the grain boundary as can be seen from Figure 7-9 and Figure Oxygen concentration on the other hand, shows a drop in the vicinity of the grain boundary, from ~62 at% in the bulk to ~48 at% at the boundary. This indicates a segregation of oxygen vacancies at the grain boundaries and triple point junctions. These results are more or less consistent with what has been reported in literature so far. 76,77 130

131 Figure 7-9. EPMA area scan for Ce Lα peak, for 10 GDC control sample. Ce segregation is observed at grain boundaries and triple grain junctions. Figure EPMA area scan for O Kα peak, for 10 GDC control sample. Oxygen depletion is observed at grain boundaries and triple grain junctions. 131

132 Figure Line scans of O, Gd and Ce concentration across a representative grain boundary in the 10GDC control sample. In comparison, for a sample sintered under hydrogen, and re-oxidized, the area scans do not show any evidence of segregation at grain boundaries and triple points. Figure 7-12 shows the backscattered image for a sample sintered at 1100⁰C and oxidized at 900⁰C. The corresponding area scans for Gd, Ce, and O are shown in Figure Figure 7-15 respectively. The line scans in Figure 7-16 also show no segregation at the grain boundary, as expected. Hence, the segregation of dopants at grain boundaries and triple point junctions is avoided by sintering under a reducing atmosphere at a comparatively low temperature and subsequent re-oxidation. 132

133 Figure BSE image for 10 GDC sample sintered under 4%H2-N2 at 1100⁰C for 20 hours followed by re-oxidation at 900⁰C for 24 hours. Figure EPMA area scan for Gd Lβ peak, for 10 GDC sample sintered under 4%H2-N2 at 1100⁰C for 20 hours followed by re-oxidation at 900⁰C for 24 hours. A relatively uniform distribution of Gd is observed. 133

134 Figure EPMA area scan for Ce Lα peak, for 10 GDC sample sintered under 4%H2-N2 at 1100⁰C for 20 hours followed by re-oxidation at 900⁰C for 24 hours. A relatively uniform distribution of Ce is observed. Figure EPMA area scan for O Kα peak, for 10 GDC sample sintered under 4%H2-N2 at 1100⁰C for 20 hours followed by re-oxidation at 900⁰C for 24 hours. A relatively uniform distribution of oxygen is observed. 134

135 Figure Line scans of O, Gd and Ce concentration across a representative grain boundary in the 10GDC sample sintered under 4%H2-N2 at 1100⁰C for 20 hours followed by re-oxidation at 900⁰C for 24 hours. A relatively uniform distribution is observed. It is interesting to note that, for the control sample, the rise in Gd and Ce at the grain boundary and the corresponding drop in O most often do not happen at the same distance. Most line scans showed that the peaks and valleys in concentration at the grain boundaries were in fact a little off from each other as can be seen in Figure

136 7.5. Conductivity Measurements To study whether the changed processing technique has any effect on the ionic conductivity of GDC, impedance spectroscopy measurements were performed as described in Chapter 3. The measurements were performed at 50⁰C intervals from 200⁰C to 650⁰C, both while heating and cooling. There was very little difference observed in the Nyquist plots for heating and cooling, indicating that there was no oxidation of the samples during the measurement. Figure 7-17 shows the Nyquist plot at 300⁰C for the two types of samples normalized for their dimensions. As can be seen from the figure, the grain boundary resistance for the conventionally sintered sample is much higher than the grain boundary resistance for the sample sintered under reducing conditions. This is exactly as expected, since the EPMA results show that only the first sample has segregation at grain boundaries, and hence the higher resistance. Also, as can be seen from the inset in Figure 7-17, the grain resistance also follows a similar trend, although the difference between the two samples is not as much as the difference for the grain boundary resistance. The lower grain boundary resistance for the sample sintered under hydrogen can be explained by the fact that it now has a slightly higher dopant concentration and more even distribution compared to the control sample. Admittedly, such a change in grain and grain boundary resistance can also be brought about by a difference in grain sizes. However, as can be seen from Figure 7-7 and Figure 7-12, there is not much difference between the grain sizes of the two samples with their values being 2.64±0.15 μm and 2.46±0.36 μm respectively for the conventionally processed and reduced and reoxidized samples. The grain and total ionic conductivity for both the samples were calculated from the resistances and dimensions as explained in Chapter 2. The thickness of grain boundaries was neglected while calculating the grain conductivity. 136

137 Figure Normalized Nyquist plot showing the comparison between the 10GDC control and H2 sintered samples measure at 300⁰C in air. Figure 7-18 shows a plot of the grain conductivity for both groups of samples. There is not much difference between the grain conductivity for the two groups. On the other hand, there is a marked difference in the total conductivity of the two groups, with the reduced and re-oxidized samples being more conducting by almost an order of magnitude as shown in Figure For example, at 350ºC, the total conductivity for the conventionally sintered sample is 3.95x10-5 S/cm, whereas that for the reducing atmosphere sintered sample is 1.09x10-4 S/cm with a difference of 6.99x10-5 S/cm. On the other hand, the respective grain conductivities are 1.07x10-4 S/cm and 3.32x10-4 S/cm with a difference of 2.25x10-4 S/cm. The large difference in total conductivity but a much smaller difference in grain conductivity indicates that most of the change in conductivity is due to the modification of the grain boundaries. The reducing atmosphere sintering 137

138 and re-oxidation routine lowers the barrier at the grain boundary for oxygen ion transport. The slight if any increase in grain conductivity on the other hand can be explained by the fact that, since there is less segregation at the boundaries, more dopant ions and by extension more vacancies are uniformly distributed throughout the bulk. Figure Arrhenius type plot of grain conductivity with respect to temperature for the 10GDC control and H2 sintered samples. Both the grain and total ionic conductivity for the conventionally sintered samples shows a change in slope, and subsequently activation energy, around 400⁰C. This temperature is around the same temperature where the Meyer-Neldel rule is applicable, and the defect associates break apart. 14 Similar behavior has been observed by Esposito 138

139 et al. 63 Interestingly, the 4% H2-N2 samples do not show this change in slope. A possible reason for such an activation energy change could be the presence of a larger number of defects associates which become free above a certain temperature. The defect associates cannot be said to be just at the grain boundaries, but must be assumed to be distributed throughout the conventional samples, because both the grain and total conductivity show about the same change in activation energy (~ 0.3 ev). The reduced and re-oxidized samples probably do not have such associates and hence do not exhibit a slope change. Figure Arrhenius type plot of total conductivity with respect to temperature for the 10GDC control and H2 sintered samples. 139

140 As the temperature is increased, the difference between the grain and total conductivity for the reduced and re-oxidized samples becomes smaller and smaller, as is expected due the grain boundaries becoming more and more conductive. This trend is however not as strong in the conventionally sintered samples. This difference in behavior needs to be further explored to better understand the phenomena at play. For the purposes of this work however, there is a clear correlation between the segregation at grain boundaries and the conductivity. Since the process utilizes a reducing atmosphere, the contribution of electronic conduction cannot be completely ruled out. However, any electronic contribution has to be mostly through the grain boundaries parallel to the field as was discussed in the previous chapter. This should lead to the appearance of a new resistance parallel to the original equivalent circuit. This however does not happen, and for both the conditions, the impedance data can be satisfactorily fit using the same equivalent circuit as shown in Figure 7-17 indicating that the samples have been oxidized to a large extent after reoxidation. The same can be ascertained by the change of color from black/grey to cream color. Hence any electronic contribution to conductivity is expected to be minimal. For a more accurate conclusion, future work envisages transport number measurements to determine the electronic contribution to conductivity. 140

141 8. CHAPTER 9 SUMMARY AND FUTURE WORK 8.1. Summary Protocol for Impedance Data Analysis There is a need for a protocol for more standardized testing and analysis of impedance data, to get accurate and reproducible results. Such a protocol was compiled together based on best practices in literature. The identification of a correct equivalent circuit based on a plausible physical model is of utmost importance and various methods of ensuring the same were suggested. An understanding of the various relaxation mechanisms possible in a material is essential for identifying the correct model. This requires a better understanding of the response of various parameters, especially constant phase elements (CPEs). The mathematical nature of CPEs was presented in detail, and their relationship to other parameters like resistance, capacitance, inductance and Warburg elements were investigated. Various ways of identifying initial estimates of parameters for fitting were presented based on literature. Incorrect starting values for fitting can give wrong results. Different statistical ways for assessing the quality of fit were identified. Residual analysis can be used as a good measure of how good a fit is, and any trends in the residuals can show whether the equivalent circuit is appropriate. Following these practices should give better results from data fitting Impedance and Effect of DC Bias Impedance data for both bulk and thin film GDC samples were analyzed using the protocol described in Chapter 4. The films prepared using magnetron sputtering were tested for impedance under a DC bias. This is the first study of this kind on gadolinia doped ceria. The bias values used in this study are higher than any similar study 141

142 performed before for other materials. Under the application of a DC bias, new unique features appear in the impedance Nyquist plots for the films. Bias values ranging from 0 V to 5 V were tried. The complex impedance plots were fit to equivalent circuits. The change in behavior under bias was ascribed to the introduction of electronic conduction in the system in addition to the already present ionic conduction. The application of a bias causes the opening up of a parallel path for conduction of electrons, which becomes more pronounced at higher fields. Both bias and temperature affect this electronic conduction, with the effect of bias becoming more pronounced at higher temperatures. Overall, three regimes were observed in the effect of bias on GDC thin films. A low bias regime, where the grain boundary resistance increases due to segregation of vacancies at the boundaries. In this regime, although there is an electronic pathway, its resistance is very high. At higher bias values, in the second regime, due to the high bias, electrons are injected from the cathode and are conducted through the grain boundaries parallel to the field direction. With increasing bias, the conduction across grain boundaries also increases. In both the first and the second regime, the grain contribution to the response remains almost unchanged. At further higher bias in the third regime, inductive loops start to appear in the impedance data at low frequencies, which introduces an inductance in the equivalent circuit. This inductance is attributed to the possible redistribution of segregated vacancies near the cathode at low frequencies. The effect of bias was found to be reversible and independent of the polarity of the applied bias. However, there was a time lag (on the order of tens of seconds, depending on the temperature) for the material to return back to normal behavior on removal of bias. DC I-V measurements were also used to better understand the observed behavior. The 142

143 sweep rate of the of the I-V measurement was matched to the frequency of the impedance plot intercept with the real axis. The resistance obtained from the I-V measurement was found to match with the parallel resistance from the equivalent circuit analysis Sintering under Reducing Atmosphere It was shown that sintering under reducing atmospheres can be used to prevent dopant segregation. This was shown using gadolinia doped ceria as an example. The elemental distribution was characterized using electron probe microanalysis. In 10GDC samples sintered in air, area scans showed an increase in concentration of the dopant gadolinium, in addition to the increase in cerium and depletion of oxygen. The depletion of oxygen suggests a high concentration of oxygen vacancies. Such an elemental distribution reinforces the theory of defect associate formation as has been suggested before. Samples sintered under a reducing atmosphere in comparison, showed a relatively uniform elemental distribution. There was no segregation of either gadolinium ions or oxygen vacancies. With a more uniform dopant distribution and no vacancies bound at grain boundaries in the samples sintered in a reducing atmosphere (subsequently re-oxidized), they show both, a smaller grain boundary and grain resistance. Hence, the hypothesis, that by reducing the cation mismatch between the host and dopant ions, a dopant segregation can be prevented, was proven true with the help of the new technique of sintering under reducing atmospheres. However, a lot of questions are still unanswered. They are summarized in the next section. 143

144 8.2 Future Work Effect of DC Bias This work was the first time the effect of bias was observed on gadolinia doped ceria. However, the work performed only looked at thin films. Similar testing needs to be performed with bulk GDC. Thin films have generally been shown to behave every differently compared to bulk materials. This will help separate thin film effects from bias effects. The testing of bulk samples however will be challenging given that it will be very difficult to get comparable DC field levels in the bulk samples. The oscillating voltage for impedance and its relation to the DC bias magnitude is also expected to play an important role in the effect observed. To the knowledge of the author, no impedance measurement system exists yet which can reproduce such conditions. Even among thin films, further work can be envisaged. Transference number measurements need to be performed to calculate more accurately the electronic contribution under bias. The role of grain boundaries in this mechanism is not yet completely understood. Their effect can be separated by testing of epitaxial thin films in the across plane configuration. Such films should have no grain boundaries in the conduction path between the top and bottom electrodes. Additionally, in-situ characterization of the oxygen vacancy distribution under bias needs to be performed which will help bolster the vacancy segregation theory. Leakage current measurements at different temperatures and bias values can be used to measure the barrier height of the Pt-GDC interface as further reinforcement of the theories proposed Sintering under Reducing Atmosphere For the work on sintering under a reducing atmosphere, further work needs to be performed to ascertain a number of issues relating to the composition and electrical 144

145 properties of the samples. It is still not clear as to what percentage of the ceria, gets reduced, and what amount of the reduced oxides remain after re-oxidation. Although, the impedance plots showed little change between heating and cooling, and the equivalent circuit shows no new circuit elements suggesting significant electronic contribution to conduction in re-oxidized samples, accurate assessment of electronic contribution needs to be performed, as it is crucial and detrimental for the use of doped ceria in fuel cells. Transference number measurements using ionic blocking electrodes need to be performed to measure the electronic contribution. Although a lot of work has been done on understanding the effect of grain boundaries on ionic conduction, the mechanism behind the blocking nature of the boundaries is still under contention. Although this was not explicitly addressed in this work, it is clear that in order to tailor electrical properties of electroceramics, a fundamental knowledge of grain boundary behavior is essential. Once the fundamentals are established, the technique sintering in a reducing atmosphere can be better tailored by investigating different temperature and atmosphere combinations. The reducing atmosphere sintering technique can be applied to other ceramic materials where dopant segregation leads to degradation of their electrical and mechanical properties. The process however will be applicable only to those systems which show variable valency states like Ce 4+ and Ce 3+ in cerium oxide based systems. Various other factors like the ionic radii and crystal structure will also play an important role, which needs to be investigated in detail. Additionally, the time behavior of the reduced and re-oxidized sample needs to be investigated, to find out the endurance of the samples against re-segregation after prolonged use. 145

146 The technique can also be used to produce high density sintered oxide ceramics at lower sintering temperatures by exploiting the higher mass diffusion rates under reducing atmospheres as has been shown by Esposito et al. 59 Application of this technique to other material systems needs to be investigated. 146

147 A. APPENDIX A IMPEDANCE DATA FITTING WITH ZVIEW Following are the steps followed for fitting using ZView software (Scribner Associates Inc.) based on the best practices summarized in Chapter Import data for the entire temperature range into ZView. ZPlot software (Scribner Associates Inc.) provides the data in a format which can be read using ZView. For other formats (obtained for example using the Agilent 4924 Precision Impedance Analyzer), the data has to be arranged into the required column format for ZView first. 2. To ensure proper weighting of data over the entire frequency range, use log-log plots, unless otherwise needed. A linear frequency range plot can hide important features in the data. Zoom in to the data if needed to better see certain features. 3. Use the auto color option and view all the data at once in the Z* formalism for all temperatures. This will show trends in the data with respect to temperature and help in identifying possible equivalent circuits. 4. For most oxide ionic conducting materials, three arcs will be completely or partially visible depending on the frequency range. They can be assigned from higher to lower frequency to the grain, grain boundary and electrode interface contribution respectively depending on the associated capacitance values. Bulk arcs usually have capacitance in the F range, grain boundary in the F range and, electrode interface around F. The arcs can also be identified on the basis of the frequency ranges they lie in, where the bulk is in the MHz range, grain boundary in the khz and electrode interface in the Hz range, although these 147

148 may vary widely depending on the material, its processing and measurement conditions. 5. Observe data in both Z and M formalisms, to clearly identify the number of arcs. Each relaxation mechanism will give a separate peak in both these formalisms. 6. Each arc can be usually fit with a parallel combination of R and CPE, as defined in Chapter 5. Based on the number of arcs, create a tentative equivalent circuit. 7. Calculate approximate starting values for all the components. R can be calculated either by visual observation where the diameter of the semicircle is the resistance, or by using the fit circle option in Zview for each arc separately. Select sections of the plot by moving the slider at the top of the Zview window. The fit circle option also gives a C value. However, to get a better estimate of the values for CPE-P and CPE-T, plot Y against log ω. The slope is CPE-P and the intercept with the Y-axis can be used to calculate CPE-T as shown in Chapter A CPE can be used even in place of a pure capacitor (C), as it can also model a capacitor, where CPE-P is 1. In case the electrode interface part of the data is a straight line instead of a curve, it can be modelled using just a CPE instead of an R-CPE parallel combination. 9. With the starting values in hand, perform a simulation for the values and the equivalent circuit. This will give a clear idea if the circuit behavior and initial values are far off from the data. Adjust the starting values accordingly if needed. 10. After obtaining a satisfactory simulation result, perform fitting using the fitting option. Individual arcs can be fit one by one if needed, by fixing the remaining parameters, and keeping only the R and CPE values for that part of the data free. 148

149 11. On fitting, the calculated plot should better match the measured data, compared to the simulation. 12. Check the data and the fit in all four formalisms, namely Z*, Y*, M* and ε*. Visually inspect the data and make sure that it fits equally well in all the formalisms. Any marked deviation in any of the formalisms indicates an incorrect equivalent circuit, given that the fit is good for other formalisms. Change the circuit accordingly, based on knowledge of the material, and repeat the process. 13. In case the arc does not begin at the origin, select appropriate extra circuit element/s (L, C, or R) to model this deviation in series with all the other elements in the beginning of the circuit. A shift along the x axis indicates a series resistance. The starting point in the first quadrant indicates an extra capacitance, whereas a starting point in the fourth quadrant indicates an inductance. 14. Start fitting data from the lowest temperature to the highest in the measured range. Usually, the parameter values change consistently in a progression with changing temperature. Thus, the fit at a certain temperature can be directly used to obtain a fit for the next higher temperature and so on. This strategy greatly speeds up the process and works satisfactorily unless new mechanisms and parameters are being introduced. 15. It needs to be noted that after fitting, the values obtained for the different parameters should make physical sense. 16. The % error values for each of the parameters should be below 5%, in addition to the visual confirmation of the fit. 149

150 17. The sum of squares and chi-squared values should be as low as possible. The smaller these values, the better the fit. A good fit should have chi-squared lower than 0.01 and sum of squares around or lower than To verify if there is any systematic error in the fit due to an incorrect circuit, the residual values for the fit can be plotted against frequency, using the residual option in Zview. For a good fit, the residual values should be low and there should be no visible trend with respect to frequency. 150

151 B. APPENDIX B DIELECTRIC POLARIZATION FUNCTIONS The original theory on dielectric polarization and the related equations were proposed by Debye. 120 The related equation for the complex permittivity is given as follows. 1 i (B-1) Here s, with s and being the static and infinite frequency dielectric constants, and is the relaxation time for a given temperature. On a complex plane plot, the Debye relaxation shows up as a perfect semicircle with the two intercepts being the static and infinite frequency dielectric constants. The highest point in the plot indicates the dielectric relaxation frequency corresponding to the relaxation time. A schematic is shown in Figure B-1. However, most materials do not have a single relaxation time constant. In fact, they exhibit a distribution of time constants. Following are a few of the important modifications to the Debye formalism to account for distributed time constants. The Cole -Cole 88 model shown in equation (B-2), introduces an exponent, which accounts for depression of the semicircle in the complex plane. When 0, the relaxation is stretched on the frequency scale, as the time constants become more distributed. This modification accounts for arcs that are depressed, but are still symmetric. Figure B-1 shows the effect of increasing value of on the complex plane plot. 1 1 i (B-2) 151

152 Another modification to the formalism has been proposed by Davidson and Cole 90 which introduces a factor as shown in equation (B-3). This change introduces an asymmetric nature in the data as shown in Figure B-1. This function can be used to fit data when the plot is not depressed, but is asymmetric. 1 i (B-3) A combination of the above mentioned approaches was proposed by Havriliak and Negami 121,122 where both and are used as shown in equation (B-4). This expression takes care of both, a wider distribution and asymmetry in the distribution of time constants. 1 i 1 (B-4) The Havriliak-Negami expression can be easily converted to the other expressions by assuming 0 (Davidson-Cole) and 1 (Cole-Cole) or both (Debye). Figure B-1. Schematic representing the complex plane plot for permittivity according to Debye theory (left) and the effect of the exponents and. In addition to these there are some other distributions like the ones by Kirkwood- Fuoss, Frohlic, and Matsumoto-Higasi, which apply to specific cases and are not discussed here. 152

153 C. APPENDIX C THERMALLY STIMULATED DEPOLARIZATION CURRENT As discussed in Chapter 2, defect complexes in doped ceria hinder the movement of oxygen vacancies. Defect complexes have dipole moments and thus their orientation can be influenced by an applied electric field. This fact can be exploited using thermally stimulated depolarization current (TSDC) measurements to gain an insight into the different kinds of complexes and their dynamics and also that of the free oxygen vacancies in a given sample. Figure C-1. Schematic diagram of polarization and heating profile for TSDC measurement. 123 Typically, in TSDC, a sample is polarized under a constant electric field (E p ) at an elevated polarization temperature (T p ). The possible defects present in the system such as defect complex dipoles and free vacancies will respond to this field and form a polarized metastable charge or dipole distribution. The sample is then cooled with the field still applied, so that the alignment is frozen. The field is subsequently removed and the sample is heated with a controlled heating rate. Figure C-1 shows a schematic of the steps described above. With increasing temperature, the lattice vibrations will activate the motion of charges or aligned dipoles. The charge distributions or polarized states 153

154 then undergo relaxation at specific temperatures, giving rise to a current in the external circuit which first increases with temperature and then decays when the supply of charges is depleted or the dipoles are randomized. A current peak will thus be observed where dipolar disorientation, ionic migration or release of charges from traps is activated and a complete picture of temperature dependent relaxations can in theory be obtained in the form of a TSDC spectrum. 56, Figure C-2. A schematic of an expected TSDC spectrum for doped ceria. All mechanisms contributing to polarization which are temperature dependent can be measured separately using this method, namely orientation polarization of permanent dipoles or of dipoles induced by the electric field, space charge polarization, and electrode effects. This can be done provided the corresponding relaxation times differ considerably. In rare earth doped ceria, the two main mechanisms of interest are dipolar polarization of 154

155 the defect associates at relatively low temperatures and space charge polarization at high temperatures due to ionic movement. Figure C-2 shows a schematic of the expected TSDC spectrum for doped ceria. Preliminary TSDC testing was performed for acceptor doped bulk ceria samples in the low temperature range. Factors such as polarizing temperature, heating rate and the dopant were varied. Figure shows the TSDC spectra for two gadolinia doped ceria samples. The temperature control was achieved using a Cryodyne refrigerator. Current measurements were performed using an Agilent 4156 Precision Semiconductor Analyzer. It also has a built-in voltage source which was used to apply the polarizing voltage. Figure C-3. TSDC results showing the current density with respect to temperature for a 10 mol% gadolinia doped ceria sample with different polarizing temperatures and heating rates. It can be seen that the data is very similar to that expected from the schematic. The different peak heights are due to the polarization difference, which is shown 155

156 separately later, whereas the position and width of the peaks is altered due to the different heating rates. The data obtained can be used to determine the activation energy of the rotation of defect complexes (and the motion of vacancies in the high temperature range). An expression for TSDC current density was derived by Bucci and Fieschi Pe Tp Ea 1 kt Ea JD T exp exp exp (C-1) o kt o Ea kt Here P e T p is the equilibrium polarization at polarization temperature, T p. is the heating rate, E a is the activation energy and o is the relaxation time at infinite temperature. This discharge current represents an asymmetrical curve, the amplitude of which is a linear function of the previously applied field. The first exponential which dominates in the low temperature range represents the initial rise of current with temperature. The second exponential dominating at higher temperatures is responsible for gradually slowing the current rise and then depresses it rapidly. 127 To determine the activation energy for dipolar polarization, the initial rise method by Garlick and Gibson. 128 The current density of the initial part of the peak was plotted in an Arrhenius form against temperature and the slope of the plot was used to determine the activation energy as shown in Figure C-4. Figure C-5 shows the effect of different polarizing temperatures on TSDC results for a gadolinia doped ceria sample. As expected, a higher polarization temperature leads to a higher TSDC peak as there is more polarization. However, the position of the peak is constant indicating that the kind of defect complexes are the same. Peak positions act as a sort of a fingerprint for identifying different associates, for a given constant heating rate. 156

157 Figure C-4. Arrhenius plots of the current density with respect to temperature for the two peaks in Figure C-3. Figure C-5. Plot showing the effect of polarizing temperature on TSDC peak intensity for a 10 mol% gadolinia doped ceria sample. Figure C-6 on the other hand shows the effect of using different dopants and different dopant concentrations, all other conditions remaining the same. It was found 157

158 that a higher dopant concentration leads to smaller peaks. This could possibly be because of more complicated and bigger associates forming at higher dopant concentrations, which require higher temperature and applied fields for polarization. The formation of different kinds of defect associates also leads to the peaks having different widths and being slightly shifted from each other. Figure C-6. Plot showing the effect of different dopants and different dopant concentrations on TSDC peak intensity. A similar approach can be used to study vacancy migration in oxide ceramic materials is sufficiently high temperatures are used for polarization. This preliminary data presented here shows that TSDC can be a useful supplement to traditional electrical characterization techniques by providing more information about the energetics for polarization of different complexes and vacancy migration, and thus needs to be further studied. 158

159 D. APPENDIX D COLOSSAL PERMITTIVITY IN BARIUM STRONTIUM TITANATE * D.1. Introduction Barium strontium titanate (Ba1 xsrxtio3, BST) is an intensively studied and wellknown material for various electronic applications such as capacitors, 129 positive temperature coefficient resistors, 130 phase shifters, 131 and gas sensors. 132 BST compounds are synthesized through a variety of methods like co-precipitation, 133,134 sol gel synthesis, 135 hydrothermal, 136 and solid-state reactions. 9 Conventionally sintered BST bulk ceramics show high relative permittivity with low losses ( r = 10 3 and tan = 0.03) and a variable Curie temperature. 137,138 Since the turn of the century, there has been renewed interest in compounds with colossal effective permittivity They have been studied because of their high technological potential, especially as dielectrics for capacitor applications. These materials, usually metal oxides, can be fabricated as bulk materials and/or thin films. Different techniques have been used to achieve high dielectric response in such materials An ideal colossal permittivity material should exhibit wide windows with temperature- and frequency-independent response. Among bulk materials, different oxides such as CaCu3Ti4O12 (CCTO), ,150,151 Li Ti co-doped NiO, 152 ferrites, 153,154 and reduced perovskites 155,156 show remarkably high dielectric permittivity which is * This section is comprised of the work presented in the following journal articles: S. Dupuis, S. Sulekar, J.H. Kim, H. Han, P. Dufour, C. Tenailleau, J.C. Nino, and S. Guillemet- Fritsch, Colossal permittivity and low losses in Ba1 xsrxtio3 δ reduced nanoceramics, J. Eur. Ceram. Soc., 36 [3] (2016). S. Sulekar, J.H. Kim, H. Han, P. Dufour, C. Tenailleau, J.C. Nino, E. Cordoncillo, H. Beltran-Mir, et al., Internal barrier layer capacitor, nearest neighbor hopping, and variable range hopping conduction in Ba1 xsrxtio3 δ nanoceramics, J. Mater. Sci., 51 [16] (2016). 159

160 temperature and frequency independent in a broad range. Such high permittivity is attributed to a number of intrinsic and extrinsic interfacial mechanisms. For example, Lunkenheimer et al. have shown that polarization effects at the electrode and material contact contribute to the apparent high dielectric constant values in CCTO. 151,157 The intrinsic contribution on the other hand is attributed to hopping polarization, depletion layers, 158 and insulating domain and grain boundaries with respect to semiconducting grains and domains. 159 Moreover, in the case of barium titanate (BT), the electrode effect has been separated out to be about 15 % by Han et al. 160 Noble metals like Au and Ag form Schottky contacts with BT, whereas Al electrodes form ohmic contacts. The electrode effect on colossal permittivity can thus be estimated by subtracting the permittivity obtained for Al electrode from that measured with Au. Overall, it has been shown that for barium titanate, depending on processing conditions, the relative contributions to colossal permittivity are approximately 65 % hopping polarization, 20 % interfacial polarization, and 15 % electrode effects. 160 Fast firing processes, such as spark plasma sintering (SPS) or microwave sintering, have been employed to achieve colossal permittivity in BT based ceramics. 133, In these fast-fired materials, mixed valence state of the cations due to extrinsic defects, localized in the vicinity of grain boundaries, has been proposed as a mechanism at the origin of colossal permittivity. 160,164 In addition, it has been shown that semi-conductive grains are separated by thin insulating grain boundaries, leading to an internal barrier layer effect (IBLC) for colossal permittivity in BT. 160,164,165 The properties of BT can be tuned by the substitution of Ba 2+ by Sr 2+ cations. The aim of the work presented here was to understand the effect of Ba Sr substitution on the dielectric 160

161 properties of a series of Ba1 xsrxtio3 (0 x 1) solid solutions and netter understand the origin of colossal permittivity and the involved underlying mechanisms. D.2. Experimental procedure D.2.1. Fabrication The co-precipitation method similar to that described in chapter 3 was used to prepare the BST nanopowders. BaCl2 2H2O (Prolabo), SrCl2 6H2O (Sigma-Aldrich), and lab-made TiOCl2 were weighed in appropriate proportions, dissolved in water, and added to an ethanolic oxalic acid solution. After a 5 h aging, the solution was centrifuged and dried for 12 h at 80 C. The powders were then ground and sieved before calcination at 850 C for 4 h. Spark plasma sintering (SPS) was carried out using a Dr. Sinter 2080 device from Sumitomo Coal Mining (Fuji Electronic Industrial, Saitama, Japan) in order to densify the BST nanopowders. The oxide powder (0.5 gm) was loaded in the graphite die (8 mm diameter) and the powders were sintered at 1150 C in vacuum (residual cell pressure <10 Pa). The powders were heated at a rate of 25 C/min, with a 3-minute dwell time at 1150 C before the electric current was switched off and the pressure was released. A thin carbon layer, due to graphite contamination from the graphite sheets, was observed on the as-sintered pellets surfaces, as has been reported before 161, and was removed by polishing the surface. Finally, the SPS sintered ceramics were annealed for 15 minutes at 850 C in an oxidizing atmosphere and quenched in air. D.2.2. Characterization The chemical composition of the different oxide powders was determined using inductively coupled plasma-atomic emission spectroscopy (ICP-AES) with a JY 2000 device (Horiba Jobin Yvon, Kyoto, Japan). The morphology of the powders was observed 161

162 with a field emission gun scanning electron microscope (FEG-SEM, JSM 6700F, JEOL, Tokyo, Japan) and the particle size was determined by ImageJ software. 166 The grain boundaries thicknesses were observed with a high resolution transmission electron microscope (HRTEM, JEM 2100F, JEOL, Tokyo, Japan). The crystalline structure was investigated by X-ray diffraction analysis using a D4 Endeavor X-ray diffractometer (CuKα1 = nm and CuKα2 = nm; Bruker AXS, Karlsruhe, Germany) from 20 to 80 (2-theta). The density of the pellets was determined by the Archimedes method using an ARJ 220-4M balance (KERN, Murnau-Westried, Germany). 167 Prior to electrical measurements, the flat faces of the ceramic disks were coated with thin gold electrodes (thickness 30 nm) by sputtering (108 Auto, Cressington Scientific Instruments, Watford, U.K.). The relative permittivity and the dielectric losses were obtained from impedance measurements using a 4294A Precision Impedance Analyzer and an E4980A Precision LCR Meter (Agilent Technologies, Palo Alto, CA) in the range of khz at room temperature and an applied AC voltage of 1 V. For temperature dependence of the dielectric properties, the electroded samples were placed in a closed cycle cryogenic workstation (CTI 22, Cryo Industries of America, Manchester, NH) and measurements were taken as a function of temperature ( K). D.3. Results and Discussion Only the results pertaining to the electrical characterization of the materials under study are discussed here, since it was performed primarily by the author. The microstructural characterization was performed by the other collaborators mentioned above. 162

163 D.3.1. Dielectric Spectroscopy The dielectric response of the BST (0 x 1) nanoceramics measured as detailed above is shown in Figure D-1. Figure D-1. Variation of the real part of relative permittivity and losses (tan) as a function of frequency for the Ba1 xsrxtio3 nanoceramics at 300K. As can be seen in Figure D-1, colossal permittivity up to 10 5 with low dielectric losses (tan < 0.05) was achieved for most of the compositions (0 x 0.6). The values 163

164 for ε r and tan measured at 1 khz and 300 K are reported in Table 2. It was observed that the relative permittivity and dielectric losses of BST compounds gradually decreased as Sr content increased. Table D-1. Dielectric properties of the Ba1 xsrxtio3 δ nanoceramics. Composition r (1 khz, 300 K) tan (1 khz, 300 K) TCC (10 3 K 1 ) BaTiO 3 δ Ba 0.8Sr 0.2TiO 3 δ Ba 0.6Sr 0.4TiO 3 δ Ba 0.4Sr 0.6TiO 3 δ Ba 0.2Sr 0.8TiO 3 δ SrTiO 3 δ The BST nanoceramics samples in this work exhibit much higher permittivity compared to the results in the open literature. For instance, Fu et al. prepared the solid solution BaxSr1 xtio3 ceramics via solid-state reaction followed by conventional sintering, and reported permittivity values at room temperature and for 1 khz, ranging between for increasing barium content. 137 The combination of mechanosynthesis and spark plasma sintering has been used for the first time for the Ba Sr Ti O system by Hungría et al. 168 While the ceramics exhibited nanosize grains, low permittivity values were observed, 1400 for BaTiO3 and 200 for SrTiO3 respectively. Gao et al. used an organosol synthesis to prepare Ba0.6Sr0.4TiO3 nanoparticles with an average grain size of 35 nm and followed it by spark plasma sintering to prepare nanoceramics showing a maximum permittivity value of These examples show the importance of each step of the ceramic process to obtain controlled colossal permittivity values in the BST ceramics: oxalate co-precipitation to synthesize homogeneous powder of controlled 164

165 morphology, size and stoichiometry, SPS sintering to obtain ceramics with nano-size grains and reduced titanium cations and a short annealing treatment to retain oxygen sub-stoichiometric compounds. Figure D-2. Variation of the real part of the relative permittivity and losses (tan) as a function of temperature measured at 1 khz for the Ba1 xsrxtio3 δ nanoceramics. 165

166 The permittivity and the losses of BST compounds as a function of temperature ( K) are shown in Figure D-2. Colossal permittivity can be observed over a wide temperature range ( K). The ferroelectric paraelectric transition, corresponding to the tetragonal cubic phase transition was seen only for pure BT ceramics by a peak of ε r occurring at the same temperature (TC = 396 K) whatever the frequency up to 100 khz. The temperature coefficient of capacitance, TCC (variation of capacitance between K), is determined according to equation (D-1): 1 Cmax Cmin TCC C310 K 450K 310K (D-1) The lowest value of TCC, 44 ppm.k 1, observed for the composition SrTiO3 δ (Table 2), is lower than the values reported for temperature stable capacitors, i.e., in the BaTiO3- Bi(Zn1/2Ti1/2)O3-BiScO3 system. 133 D.3.2. Impedance Spectroscopy To analyze the behavior of the different regions of the samples, i.e., grains and grain boundaries, impedance measurements were carried out as a function of frequency over the temperature range from 120 to 473 K. Analysis of the impedance complex plane plots for a high Ba-content sample and a high Sr-content sample at 170 K (Figure D-3), showed an asymmetric arc of resistance R1 at high frequencies. Assignment of the main impedance arc to grain regions is supported by the representation of the same impedance data as Z M spectroscopic plots. The peak in the M plot corresponds to the region of the sample with the smallest capacitance ( Fcm for Ba0.8Sr0.2TiO3 δ and Fcm for Ba0.2Sr0.8TiO3 δ), and therefore, to the grains. This also corresponds to the almost frequency independent, but 166

167 temperature dependent plateau at high frequencies in the spectroscopic plots of C. Thus, R1 corresponds to the sample bulk resistance and is in the order of 3500 Ω-cm for Ba0.8Sr0.2TiO3 δ and 7500 Ω-cm for Ba0.2Sr0.8TiO3 δ at 170 K. Figure D-3. Impedance complex plane plots and Z /M spectroscopic plots at 170 K, and capacitance data at 150 and 170 K for Ba0.8Sr0.2TiO3 δ (a, c and e) and Ba0.2Sr0.8TiO3 δ (b, d and f) nanoceramics. The solid data points in (a) and (b) refer to frequencies of 200 and 4.5 khz. 167

168 In the spectroscopic plots for C, a second plateau is observed at lower frequency with capacitance Fcm and Fcm at 170 K for Ba0.8Sr0.2TiO3 δ and Ba0.2Sr0.8TiO3 δ, respectively, which might be attributed to a conventional (but high permittivity) grain boundary, C2. Therefore, for both samples, the impedance data may be represented ideally by an equivalent circuit containing two parallel RC elements in series. D.3.3. Polarization mechanisms Figure D-4. Variation of the real parts (a) and (c) and the imaginary parts (b) and (d) of permittivity as a function of temperature and at different frequencies for Ba0.8Sr0.2TiO3 δ and Ba0.2Sr0.8TiO3 δ nanoceramics. 168

169 To investigate the relaxation phenomena observed in BST nanoceramics, the dielectric properties of each composition were measured as a function of temperature ( K) at different frequencies. Figure D-4 shows the dielectric data for one Ba-rich (x = 0.2) and one Sr-rich composition (x = 0.8), respectively, which exhibit distinctly different dielectric relaxation behavior. In the following sections, the possible mechanisms, explaining the temperature stable dielectric properties of BST compounds by using corresponding physical models such as Debye relaxation, universal dielectric response (UDR), and hopping polarization models are discussed. D Debye Model Debye-like dielectric relaxations were observed for both compositions, and the maximum of ε r shifts to higher temperature as frequency increases, indicating that frequency dependent relaxation processes may exist in the compounds. In the Debye model, the relaxation frequency and the activation energy can be extracted by using the equation below: O Ea exp kbt (D-2) where O, k B, and E a are the pre-exponential factor, the Boltzmann constant, and the activation energy for relaxation, respectively. The relaxation temperatures at different frequencies were extracted from the maximum of r for each of the BST compounds and plotted in the Arrhenius form to determine the activation energy. 169

170 Figure D-5. Temperature dependence of relaxation frequency for Ba0.8Sr0.2TiO3 δ and Ba0.2Sr0.8TiO3 δ nanoceramics. It can be clearly seen in Figure D-5 that Ba0.8Sr0.2TiO3 δ shows two different slopes corresponding to two activation energies, while no distinct slope change was observed for Ba0.2Sr0.8TiO3 δ. This result indicates that, similar to BT, 160 BST compounds with high barium content might have two different polarization mechanisms, possibly hopping polarization combined with interfacial space charge polarization, while Sr-rich BST might have only one polarization mechanism. D Universal Dielectric Response Model It is also well known that Jonscher s universal dielectric response (UDR) model can be applied to explain dielectric polarization in colossal permittivity materials, as described by the following equations, 170 r s tan f 2 O s 1 O (D-3) 170

171 Tf s f r A (D-4) where O and s represent the temperature dependent constants, O and f are the permittivity of free space and experimental frequency ( f 2 ), respectively, and A T tan s 2 is equal to O O vs. log f log r f more highly localized Thus one can extract the value of the exponent s by plotting. An s value as closer to 1 implies that the polarization charges are Figure D-6. Variation of the real part (a) and (c) and the imaginary part (b) and (d) of permittivity as a function of frequency and at different temperatures for Ba0.8Sr0.2TiO3 δ and Ba0.2Sr0.8TiO3 δ nanoceramics. 171

172 Figure D-6 shows the real and imaginary parts of dielectric permittivity for BST (x = 0.2) and BST (x = 0.8) samples as a function of frequency ( khz) at different temperatures ( K). Dielectric relaxation occurs at each temperature, given that distinct relaxation peaks of imaginary part of permittivity were observed for the compositions. Furthermore, the relaxation peaks shift to lower frequencies as temperature decreases, which indicates that thermally activated relaxation phenomena are involved. Figure D-7. r f vs. f plot in log log scales for (a) Ba0.8Sr0.2TiO3 δ and (b) Ba0.2Sr0.8TiO3 δ dense nanoceramics at different temperatures (40 300K). 172

173 Figure D-7 presents r f vs. f plots in log log scales for the same samples. For the Ba-rich BST (x = 0.2) compound, high temperature slope is close to 1, which is different from the value of the low temperature slope, indicating that dielectric polarization is more localized at higher temperatures. As has been shown in literature, the slope change in log r f vs. f log plot as temperature decreases is associated with the hopping polarization which becomes inactive at lower temperatures due to insufficient energy to overcome energy barrier for polarization. 160 For the Sr-rich BST compound (x = 0.8), no slope change was observed for the different temperature regions. Thus, one can expect that hopping polarization might not be significant in Sr-rich BST compounds. D Thermal Hopping Polaron Model To investigate the behavior of Sr-rich compounds, it is important to recall the thermally activated hopping polaron (THP) model, 172 where the maximum of r is proportional to the number of polarons participating in hopping polarization. r max 2 N 3k T B (D-5) N N O Ea exp kbt (D-6) Nand represent the number of hopping polarons and the hopping dipole moment respectively. N O and E a are the pre-exponential factor and the activation energy related with relaxation of hopping dipoles respectively. By substituting equation (D-5) into (D-6), the equation for the thermally activated hopping polaron model can be obtained as below. 173

174 T max NO 3k B 2 Ea exp kbt (D-7) Thus, activation energy for hopping polarization can be calculated from the ln max T vs. 1 T plot. Figure D-8 shows the same for BST compounds (x = 0.2 and 0.8). It should be noted that, if hopping polarization is present in colossal permittivity material, activation energy of hopping polarization at high temperature region is comparable to the difference of activation energies at high and low temperatures obtained by using Debye model (Figure D-5). Figure D-8. Activation energy values extracted from the hopping polarons model for Ba0.8Sr0.2TiO3 δ and Ba0.2Sr0.8TiO3 δ nanoceramics. This statement seems to hold true for the case of Ba-rich BST sample (x = 0.2), where the activation energy difference from Debye model (0.081 ev) is well comparable with the activation energy for hopping polarization in the high temperature region (0.036 ev). However, for Sr-rich BST (x = 0.8), the value of ln max T remains constant at 174

175 different temperatures, indicating that no thermally activated hopping process is present in Sr-rich BST compounds (Figure D-8). Thus, one can conclude that the colossal permittivity in Ba-rich BST compounds is due to hopping polarization combined with interfacial polarization, while mostly interfacial polarization is responsible for Sr-rich BST compounds. Table D-2 summarizes calculated activation energy and extracted s values for BST (x = 0.2 and 0.8) compounds by using Debye, UDR, and THP models, respectively. The two BST compounds, Sr-rich and Ba-rich, were again selected for the analysis since those compounds exhibit most distinct dielectric properties in terms of polarization mechanisms. As observed by De Souza et al., 173,174 BaTiO3 exhibits lower oxygen diffusion and surface exchange coefficients D cm s and O,850 C k O,850 C cms respectively than SrTiO3 D cm s and O,850 C k O,850 C cms 1. Therefore, the faster diffusion of oxygen during the post annealing treatment in BST compounds, compared to BT, leads to an increase of the Ti 3+ to Ti 4+ oxidation rate, which results in the decrease of hopping dipole concentration in the material with increasing Sr concentration. Furthermore, it is well known that ferroelectricity of BST decreases as Sr content increases, and transformation from the ferroelectric phase to the paraelectric phase occurs when the Sr content increases above ,176 It is thus clear that depending on the concentration of Sr in BST nanoceramics, colossal permittivity is a result of interfacial polarization at insulating grain boundaries, and thermally activated hopping polarization in the semiconducting grains. The following sections discuss these in more detail. 175

176 Table D-2. Calculated activation energies and s values for BST compounds using three different analytical models. Ba 0.8Sr 0.2TiO 3 δ Ba 0.2Sr 0.8TiO 3 δ Debye model (E A, ev) Low temp High temp UDR model (s value) Low temp High temp THP model (E A, ev) Low temp D.3.4. Internal Barrier Layer Capacitor High temp The interfacial polarization at the grain boundaries is modelled using the internal barrier layer capacitor (IBLC) model. The IBLC model can be described by Koop s equivalent circuit consisting of capacitive, conductive, and a constant phase element in parallel and/or in series. For colossal permittivity materials, electrical heterogeneities between grains and grain boundaries drive the properties. 150 According to the Koop s equivalent circuit, the grain and grain boundary responses are built in series and each part is composed of a C parallel circuit, described by the following equation. 177 g gb, g gb,dc 1P C i g 1 P i C i gb g g,dc o gb gb,dc i o 1 1P i C i gb 1 P 2 2 b C i g 1 o gb gb,dc g g,dc o (D-8) is the DC conductivity of grain and gb, dc is the DC conductivity of grain boundary in g,dc the frequency-independent part of Jonscher s model. 0, i,, and are, respectively, the permittivity of vacuum/sample at infinite frequency, the imaginary unit, the angular frequency, and the ratio of grain boundary thickness on average grain size. In addition, equation (D-8) points out a P contribution representing the conductive and capacitive g gb 176

177 trends of grains and grain boundaries. A value of P close to 1 indicates a conductive behavior while a value close to 0 implies a capacitive response. Finally, C is a function g gb of P g gb, as given by the equation (D-9) where g gb, O is the static conductivity of grains/grain boundaries. C g gb g gb,o g gb 0.5 cos1 P (D-9) Experimental data for Ba1 xsrxtio3 δ nanoceramics (0 x 1) are plotted in Figure D-9 and the fitted curves using equation (D-9) are presented. The different fitting parameters ( P g gb, g gb, C g gb,, and ) are shown in Table D-3. For all the compositions, they are in good agreement with the experimental data (R 2 > 0.997, except for SrTiO3 where R 2 = 0.950). As discussed above, the electrical properties of SrTiO3 are not driven by the thermally activated hopping polaron model, and thus this particular composition is excluded from the following discussion. Figure D-9. BST permittivity data fitted with IBLC model 177