Electrical characteristics of Gd 2 O 3 thin film deposited on Si substrate

Transcription

1 Electrical characteristics of Gd 2 O 3 thin film deposited on Si substrate Chizuru Ohshima*, Ikumi Kashiwagi*, Shun-ichiro Ohmi** and Hiroshi Iwai* Frontier Collaborative Research Center* Interdisciplinary Graduate School of Science & Engineering**, Tokyo Institute of Technology

2 OUTLINE 1. Introduction 2. Experimental procedure 3. Experimental results - Electrical C-V, J-V - Surface and interface AFM, XPS 4. Conclusions

3 ITRS 2001 Year L g (nm) EOT Background V dd (V) High-k High performance Low power Requirements for High-k Film uniformity Thermal stability Low leakage current Small densities of interface state and fixed charge High mobility High reliability

4 Purpose In order to improve film uniformity interface state density leakage current we investigated surface treatment for Si substrate before High-k deposition. We used High-k Gd 2 O 3 thin film which is one of the rare earth oxides.

5 Properties of Gd 2 O 3 La Ce Pr Nd Sm Eu Gd Tb Dy Ho Er Tm Yb Lu Band Gap (ev) ZrO 2 HfO 2 Gd 2 O 3 La 2 O 3 Pr 2 O 3 Sm 2 O 3 Gd 2 O 3 Dy 2 O 3 Er 2 O 3 Yb 2 O 3 Ce 2 O 3 Nd 2 O 3 Eu 2 O 3 Tb 2 O 3 Ho 2 O 3 Tm 2 O 3 Lu 2 O 3 Dielectric constant : 8-20 Band gap : 5.4 ev Lattice energy : kj/mol Crystal structure of Gd 2 O 3 System Cubic Monoclinic A Lattice Constant (nm) b c

6 Experimental procedure n-si(100) SPM, HF dip HF-last Chemical oxide Chemically oxidized by H 2 O 2 for 30 min Gd 2 O 3 deposition by MBE Substrate temperature: 250 o C Annealing in O 2 at 400 o C for 5min Al electrode deposition

7 Amorphous Gd 2 O 3 film deposition MBE equipment Heater Thickness monitor Electron beam (5 kev) E-gun Growth chamber Si substrate Sintered Gd 2 O 3 target Back ground pressure ~10-10 Torr Pressure during deposition ~10-8 Torr Substrate temperature 250 o C

8 Electrical characteristics (T phy =5.3 nm) Deposition Temp. : 250 o C, RTA: 400 o C in O 2 for 5 min 2.5 Capacitance (µf/cm 2 ) Leakage Current (A/cm 2 ) Voltage (V) EOT +1V HF-last : 1.66 nm (2.02 nm) C. Oxide : 1.69 nm (2.05 nm) CET : Capacitance Equivalent Thickness Voltage (V) Leakage current +1 V HF-last : 1.24x10-3 A/cm 2 C. Oxide : 4.05x10-7 A/cm 2

9 Electrical characteristics (T phy =3.5 nm) Deposition Temp. : 250 o C, RTA: 400 o C in O 2 for 5 min Capacitance (µf/cm 2 ) Leakage Current (A/cm 2 ) Voltage (V) EOT +1V HF-last : 1.60 nm (1.84 nm) C. Oxide : 1.58 nm (1.89 nm) Voltage (V) Leakage current +1 V HF-last : 1.0x10-2 A/cm 2 C. Oxide : 6.0x10-6 A/cm 2

10 Electrical characteristics (T phy =2.8 nm) Deposition Temp. : 250 o C, RTA: 400 o C in O 2 for 5 min 2.5 Capacitance (µf/cm 2 ) Leakage Current (A/cm 2 ) Voltage (V) EOT +1V HF-last : 1.42 nm (1.72 nm) C. Oxide : 1.37 nm (1.67 nm) Voltage (V) Leakage current +1 V HF-last : 1.28x10-3 A/cm 2 C. Oxide : 9.67x10-4 A/cm 2

11 A possible reason for the dependence of physical thickness thick films thin films As deposition Gd 2 O 3 Si SiO 2 SiO 2 RTA: 400 o C in O 2 for 5 min SiO 2 poor silicate SiO 2 rich silicate Thermal oxide like silicate

12 AFM images before and after annealing Deposition Temp. : 250 o C, Physical thickness : 5.3 nm 0.5 mm x 0.5 mm, z : 5 nm / div. As deposition RTA: 400 o C in O 2 for 5 min RMS: nm RMS: nm RMS: nm RMS: nm

13 RMS: nm RMS: nm RMS: nm AFM images after annealing Deposition Temp. : 250 o C, RTA: 400 o C in O 2 for 5 min 0.5 mm x 0.5 mm, z : 5 nm / div. T phy =5.3 nm T phy =3.5 nm T phy =2.8 nm RMS: nm RMS: nm RMS: nm

14 Interface state density (Terman method) Deposition Temp. : 250 o C, RTA: 400 o C in O 2 for 5 min Surface state density (/evcm 2 ) Physical thickness (nm)

15 Leakage mechanism P-F plot 1.2 Energy barrier of P-F J/E (A/Vcm) T phy =5.3 nm HF-last T phy =2.8 nm HF-last T phy =5.3 nm C. Oxide T phy =3.5 nm HF-last T phy =2.8 nm C. Oxide T phy =3.5 nm C. Oxide φ B (ev) E 1/2 (V/cm) 1/ Physical thickness (nm)

16 Si2p XPS spectra Deposition Temp. : 250 o C, Take off angle : 45 o Si-O Si2p HF-last Si-O/Si-Si 0.56 Intensity (a.u.) C.Oxide HF-last C.Oxide 0.72 After deposition T phy =3.5 nm RTA: 400 o C in O 2 for 5 min C.Oxide HF-last Binding energy (ev) 95 Before deposition

17 Conclusions We investigated the effect of surface treatment for Si substrate before Gd 2 O 3 deposition. Chemical oxide reduced the leakage current at same CET conditions. Chemical oxide reduced the interface state density. Chemical oxide suppressed the surface roughness after annealing.

18 Conclusions (continued) Gd 2 O 3 MIS capacitor showed excellent electrical characteristics EOT: 1.58 nm (CET: 1.89 nm) Leakage current: 6.0x10-6 A/cm 2. However, it should be noted that the merit of chemical oxide decreased when the Gd 2 O 3 EOT is less than 1.4 nm.

19 Acknowledgements This work was partially supported by Semiconductor Technology Academic Research Center (STARC) and Grant-in-Aid for Scientific Research Priority Areas (A): Highly Functionalized Global Interface Integration.