IEEE CPMT Symposium on Green Electronics, Chalmers University of Technology, Gothenburg

Transcription

1 IEEE CPMT Symposium on Green Electronics, Chalmers University of Technology, Gothenburg On May 24 th, the IeMRC participated in the IEEE CPMT Symposium on Green Electronics at Chalmers University of Technology, Gothenburg, Sweden. The symposium began with a welcome presentation by Professor Johann Lui in which he outlined the ICT work taking place at the University. There were around 200 staff employed in this field. Examples of the areas of activity included wide band gap devices and circuits, terahertz electronics, and ferroelectric devices. Work was also being undertaken on superconducting and quantum devices. Johann then gave a presentation on the development of a novel micro-cooling system using carbon nanotubes (CNT). He also outlined the possibilities for using nanotubes in transistor structures. There had been a rapid increase in the power dissipation of ICs and heat removal was becoming a critical factor in determining device lifetimes. The concept being explored at Chalmers was to grow CNT coolers onto the silicon. These were produced in a channelled format and water was pumped through the channels. Simulations had shown that heat transfer efficiency improvements of more than 15% could be achieved. Other configurations had also been considered, such as the incorporation of a CNT layer between the silicon and a heat sink. Work was also underway to develop nano-size lead-free solder particles (eg they were working on SAC, Sn57Bi and SnCoCu alloys). It was known that the melting points of the alloys dropped as the particle size reduced into the nano region and it was thought necessary to get down to around 10 nm particle size in order to have an appreciable effect. So far, samples produced had only shown small reductions in meting points of around 3 C. Carbon nanotubes were also being investigated in ultra fine pitch flip chip interconnections by using them in anisotropically conductive adhesives. Work had also been performed to embed SiP modules directly within a liquid crystal substrate. Multilayer structures were formed using BCBs as the dielectric. The second paper was given by Otto Andersen of the Western Norway Research Institute and it was on an EC funded project on green electronics cooperation between China and Europe (EC-GEPRO). The objectives of the project were focussed on green electronics design, assembly and materials. There was an emphasis on life cycle impacts and work was also being carried out on lead-free alloys, halogen-free circuit boards and other new substrate materials. They were organising two conferences on green electronics. The third presentation was from Jianfeng Lu of the Shanghai Commission of Science and Technology, China and he discussed science and technology developments in Shanghai. There were 8 ministry affiliated universities and 22 local universities as well as 29 vocational training schools and many other facilities. (Shanghai has a population of 18 million people.) He discussed how innovation was encouraged and supported in the area. There were many business incubators and high tech business parks. The R&D spend for Shanghai in 2006 was 2.5% of GDP compared to 1.5% for the whole of China. Funding was in the region of 20 billion RMB with half coming from industry and half from government. In 2006 Shanghai had produced over 2500 patents. The strategy was to continuously develop and grow the innovation capability. There was also a good deal against the backdrop of lots of international cooperation.

2 Martin Goosey of the IeMRC in Loughborough University then gave an overview of the green electronics projects the IeMRC was supporting in the UK. He began by outlining the mission of the IeMRC and its modus operandi and stated that there were currently over 30 projects being supported with around 5 million of funding. The green electronics projects supported included work on lead-free solders, printed electronics and batteries, rapid identification of polymers and the use of ultrasonics for texturing surfaces used in electronics manufacturing. A brief outline of some of these projects was given and the presentation concluded with a description of the IeMRC s links with other organisations involved in green electronics. Martin Goosey presenting details of the IeMRC s Green Electronics Projects Dag Andersson of the IVF then presented followed with a presentation on the future of lead-free soldering from the ELFNET perspective. ELFNET was the European lead-free network project that had recently been completed having run from 2002 to It looked at solders, components, intermetallics, reliability, processes and environmental issues and involved involving partners from around Europe. There were also a number of large-scale projects within ELFNET eg INNOLOT, IMECAT, COST531 etc. The ELFNET website could can be found at Key deliverables had been a solder alloy database, the ELFNET roadmap and a reliability book on failures and testing. Dag mentioned some of the new SAC alloys such as the 1% silver alloy i.e. low silver SAC alloys, which give much better performance with respect to brittle failures. Replacements for high temperature tin-lead alloys had been difficult to find but and there was a programme running for the next three years to look at these materials in more detail. He also highlighted that there were still concerns about lead-free reliability as there was often complex and conflicting data. Brittle failures were one of the main reliability issues with lead-free alloys. Halogen-free boards were currently 30% more expensive than conventional laminates and there were also concerns about their drilling and processing. ELFNET had also written a colour book which summarisesd the state of the art on lead-free quality issues and all known joint failure mechanisms. This was is due to be published by Springer in the near future and its aim was is to provide guidelines for companies.

3 The final presentation of the morning was given by two speakers from Shanghai University and they covered green electronics research in the SMIT Center centre at the University, which currently had has 33,000 students. The SMIT centre was is a joint activity between Sweden and China and was carrying out work on electronics assembly, reliability and thermal management, as well as in many related areas. Examples of the electronics assembly and testing equipment in the centre were given. The final part of the presentation was on heat removal in electronics packaging and the potential advantages of using nanofibres of silicon carbide. Fibres were produced using an electrospinning process and that could be varied to alter the properties of the fibres could be varied by altering the parameters of the electrospinning process. SiC nanoparticles had been incorporated into adhesives that were used at thermal interfaces. The thermal resistance of samples had beenwere measured using the ASTM E 1530 test method and dielectric strengths of approximately 6.0 kv/mm had been achieved. The first session of the afternoon was from Cristina Andersson of Chalmers University and was on the effect of thermal cycling on the reliability of lead-free PBGA and 0805 components. Crack initiation and propagation were found to be similar for both device profiles. Good agreement was found between FEM simulations and experimental results regarding critical joint locations and the random behaviour of cracks. The impact of thermal cycling on shear strength was also investigated i.e. via dynamic ageing. Devices were sheared after ageing for both reflow and wave soldered SMD components eg 0805 and Crack lengths per component and crack propagation paths were both examined. The microstructure of the joints and the intermetallic layer thicknesses were also examined after ageing and it had been found that the shear strength decreased during thermal cycling as a result of microstructural coarsening and crack propagation. Shear strength measurements were found to be a good way of measuring the fatigue damage happening inside the solder joints during thermal cycling however, they werebut not a good measurement tool for indicating when failure would take place. The next presentation was on the electrical characterisation of inkjet printed interconnections on flexible substrates and was given by Botoa Shoa from Chalmers University. The work reported here had focussed on inkjet printing and recyclable wood fibre based RFID tags. Silver nanoparticle based inks were being deposited using a Xaar print head. Inkjet printed interconnects had been designed and fabricated on polyimide substrates and their performance characterised. Krystyna Bukat of the Tele and Radio Research Institute in Warsaw then gave a presentation on RoHS implementation in Poland. The RoHS Directive came into force in Poland on July 1 st and a subsequent survey of Polish manufacturers had revealed a number of transition issues such as not being able to source compliant components. Many companies had stocks of non-compliant components,; 25% of respondents had more than 90% non-compliant stocks of components. After 10 months of being required to be compliant only 31% of companies claimed to be fully compliant and many claimed to be unsure. 70% of respondents were relying only on written statements of conformity from their suppliers and only 20% were requesting material declarations. About 70% of respondents stated that RoHS compliance had increased their costs. Overall the

4 conclusion was that achieving compliance with the RoHS Directive was very complicated, especially for small and medium sized organisations. There was no knowledge of any prosecutions having taken place yet for non-compliance. The next presentation was given by Bjorn Carlberg from Chalmers University and was on imprinted conductive adhesive arrays for transfer and formation of carbon nanotube interconnects. CNT interconnects could offer high thermal and electrical conductivities with good mechanical properties and the ability to fabricate small feature sizes. The interconnects were deposited using an imprinting method with a silicon mould that was formed in silicon using conventional processing routes. The mould was coated with a release agent and then pressed into a thermoplastic adhesive. The mould was then removed, to leave the adhesive on the original substrate but having the features of the mould. Successful CNT bump transfer had been demonstrated and they were characterised to determine if Ohmic contacts had been produced. The V-I curves indicated that they were indeed Ohmic. Overall, this technique offered a low-cost fine-pitch interconnect process at the wafer level. It was a simple scalable process that was compatible with current microelectronics fabrication technology. The last session of the day began with a presentation on lead-free solders in the evaluation at of thick film conductive pastes. This was given by Markus Detert of the Technical University in Dresden. Preliminary work had focussed on the design of a suitable test vehicle based on the requirements of IPC Components used in the evaluation varied from 0402 to 1206 in size and the test matrix included wetting, visual inspection, mechanical testing and cross sectioning. Aging was carried out at 150 C for 336 hours according to JEDEC 22-A103C, and this was subsequently extended to 1000 hours. The wetting tests showed that the lead-free pastes had different wetting profiles to conventional solder pastes. The work had indicated that the existing standards, such as DIN 41850, were only suitable for lead-containing products and that adjustments would be needed for future lead-free products. Peng Sung of Chalmers University then presented information on interfacial reactions and intermetallic compounds in solder joints for electronics packaging. He discussed the intermetallics formed when soldering onto both copper and nickel substrates with lead-free solders such as the various SAC alloy compositions. With SAC alloy soldering on nickel the interfacial layer was tin-nickel-copper. TEM had also indicated the presence of a phosphorus rich layer. With tin-cobalt-copper alloys the intermetallics were CoSn 2 and Cu 6 Sn 5. The impact of soldering between two differing substrates had also been assessed, as had the influence of solder masks. The final presentation of the symposium was given by Grazyna Koziol of the Tele and Radio Research Institute in Warsaw and was on the quality issues associated with the lead-free reflow soldering process. A wide range of lead-free components had been evaluated with a number of different solder pastes. The pastes had also been evaluated via slump, spread, coalescence and SIR testing. Lead-free PCB finishes were evaluated as received, as well as after aging under various standard conditions. It was found that all of the evaluated solder pastes evaluated wetted the lead-free finishes in the fresh state but, after ageing, the wetting depended upon the flux and the finish type eg an OSP finish heated for 24 hours at 125 C gave very poor wetting. Nickel-gold board finishes gave the best results after aging. Studies had also been

5 made of nickel electroformed stencils as part of a more detailed evaluation of the influence of the solder paste printing process. Stencil aperture design was found to be an important factor. The importance of optimising the reflow profile for lead-free alloys was also highlighted, with data given showing its influence on solder coalescence. Overall this one day symposium proved to be very interesting and there was a lot of information presented from work carried out in Sweden, China and Poland, as well as from Germany and the UK. There was clearly a strong link between Chalmers University and the University of Shanghai that had resulted in much high quality research being conducted. It was agreed that future similar events would be very useful. Martin Goosey 24 th April 2007