Dynamic Stress Measurements of Electronic Devices During Active Operation

Size: px
Start display at page:

Download "Dynamic Stress Measurements of Electronic Devices During Active Operation"

Transcription

1 2017 IEEE 67th Electronic Components and Technology Conference Dynamic Stress Measurements of Electronic Devices During Active Operation Markus Feißt, Eike Möller, Jürgen Wilde Laboratory for Assembly and Packaging Technology Department of Microsystems Engineering IMTEK University of Freiburg, Germany Abstract In this work an investigation on dynamic stress development during switching operation of power electronic devices is presented. Two measurement techniques were used to analyze the behavior of devices which were mounted with electrically conductive adhesives. A self-heated silicon test chip with CrNi-thin film strain gauge structures was developed. The heating function enables simulation of thermal operating conditions and comparison of passive and active heating. Digital Image Correlation was used as a contactless technique for reference measurements in active operation. The out-ofplane deformation of assembled IBGTs on Al2O3-DCB substrates was measured. Both methods were used for timeresolved measurements of the stress development. Thermo-mechanical stress, dynamic stress measurment, power electronic devices, strain-gauge chip, Digital Image Correlation Nevertheless, the transient stress development during switching operation is less known. For power modules, which are operated at high frequencies, this information will help in analyses closer to the real application conditions. In this work two methods, a self-heated test chip and temporally resolved DIC, were used to investigate this behavior. II. MEASUREMENT SETUP AND THEORY A. Self-heated silicon stress test chip A test chip was developed, which is able to self-heat intrinsically and measure the surface deformation with strain-gauge structures simultaneously. I. INTRODUCTION Thermally induced stress is a major failure cause for power electronic devices. The difference in the coefficients of thermal expansion (CTEs) between the silicon device and the substrate lead to stress development. Often Direct Copper Bonded substrates (DCB) are used because of their thermal performance. Both after the die attachment process and during active operation, the different thermal elongations of the materials lead to deformations and stresses. Especially for power electronics where high temperatures occur during the switching cycles the stress effects are significant. Crack formation and propagation limit the function and will lead to failure. Different methods to determine packaging-induced stresses have been investigated. Using strain gauges on the chip surface in addition to functional structures or on separate test chips is one approach. Implanted resistors with high gauge factors were used often for microelectronic packaging analysis [1], but are limited in their maximum temperature of operation. Therefore metal alloys with small temperature coefficient of resistance (TCR) like CrNi were also evaluated [2]. These devices are more simple to use and can measure the stress development under operating conditions. Another approach are contactless optical techniques like Digital Image Correlation (DIC) which have the ability to operate up to 500 C [3]. For power electronic devices the static behavior under thermal load for active and passive heating has already been investigated [4],[5]. Figure 1. Cross section through the silicone-based stress test chip. The concept is based on a lightly doped p-silicon wafer with heavily doped layers on both sides for enhanced metalsemiconductor contact. The chip can be contacted via distributed surface contacts and the metallized backside so that the bulk silicon is used as a resistive heater. The measurement structures are electrically isolated from bulk silicon over an oxide layer. For the strain gauges, a Figure 2. Surface structures of the test chip. Ni-temperature sensor (left) and CrNi-strain-gauges in 0 -, 90 -, and 45 -direction (right) /17 $ IEEE DOI /ECTC

2 CrNi-alloy was used because of its high resistivity and low-temperature coefficient. The temperature sensors are made of Ni. Strain-gauges in 0 (x), 90 (y), and 45 (xy) directions are structured on the chip surface and periodically distributed over the area with Ni-temperature sensor structures and heating contacts in between. The size of the test chip can be selected individually by the dicing process. The sensing resistor provides contact pads for four-point measurement with bonding wires up to 150 μm in diameter. In order to get the temperature-depended change in resistance as baseline for the stress measurement, each needs to be characterized in the unmounted and stress-free state first. The detailed manufacturing process is described in [6]. The strain-depended resistance R(T, ) can be derived with equation 1. (R(Τ, ) R(Τ)) / R(Τ) = k ε (1) Here R(T) is the temperature-depended resistance determined from the stress-free measurement and k is the gauge factor. NiCr-alloys normally show gauge factors of approximately k 2. Assuming a planar stress condition for the chip with much larger lateral dimensions compared to its thickness the stress for every direction can be calculated using Hook s law. In combination with anisotropic stressand strain-tensors for 100-silicon the stress values dependency of the measured strain is taken as follows [7]: σ xx = GPa ε GPa ε90 (2) In order to perform the measurement, the surface has to be prepared with a stochastic pattern. Figure 3 shows the principle of 3D-measurement. Two cameras take pictures of the sample from different angels in a stereoscopic setup. The digitized information, which consists of pixels with different gray values, is assigned to facets. These facets are used by the DIC algorithm to detect the surface topography of the measured object. The relative coordinate system of the measurement is defined by calibration process which also compensates the influences of radial and tangential distortions of the lenses and orientations and positions with respect to the global coordinate system of the cameras. The bending stress state of electronic devices can be derived from the in-plane and out-of-plane deformation of its surface. In this case, silicon-based Insulated Gate Bipolar Transistors (IGBT) mounted on Direct Copper Bonded (DCB) substrates were investigated. Due to the different CTEs of the materials copper changes stronger in length than silicon and bending occurs in the mounted assembly. This can be observed as out-of-plane deformation with the DIC-measurement. The strain in the chip surface can be calculated from its curvature which is derived from the warpage and the chip thickness t. Subsequently, the stress can be calculated using Hooke s law. ε Bending = t chip / 2 (5) σ Bending = E chip t chip / 2 (6) σ yy = 10.9 GPa ε GPa ε90 (3) σ xy = GPa ε GPa (ε0 +ε90 ) (4) B. Digital Image Correlation With Digital Image Correlation (DIC) a contactless optical measurement system was used to investigate the surface deformation of assembled electronic devices. III. SAMPLE PREPARATION AND EXPERIMENTAL SETUP Both, the silicon test chip and the IGBTs, were mounted adhesively as an example for lead-free die-attachment methods. An epoxy-based electrical conductive adhesive EC 242 from Polytec-PT, Germany, was used. Its epoxy matrix is filled with silver particles to achieve electrical and thermal conductivity. The adhesive was manually dispensed onto Al 2O 3-DCB substrates. Afterward, the test chip as well as the IBGTs were placed by a vacuum pick & place tool and pressed towards the substrate to get a homogeneous mounting layer. The adhesive was cured in a heating chamber at 150 C for 30 min. Electrical connections of the top side were made with 300 μm Al bonding wires. TABLE I. PROPERTIES AND DIMENSIONS OF TEST SPECIEM Material Properties Dimensions Si-test chip = 2,6 ppm/k 8x8x0,3 mm³ Si-IGBT = 2,6 ppm/k 9x8x0,525 mm³ DCB eff = 8 ppm/k 36x27x1,2 mm³ EC 242 from Polytec-PT T<TG= 44.4 ppm/k Thickness: μm Figure 3. Shematic principle of Digital Image Correlation in stereo configuration for 3D surface measurement. 508

3 Figure 4. Adhesively bonded test chip on Direct Copper Bonded substrate. Used cells for strain measurement (center position) and temperature (corner position). A. Setup for silicon test chip For this investigation, quadratic chips with 8 mm edge length were diced out of the wafer by a dicing saw. Figure 4 shows a mounted chip in the configuration for stress measurement. There are 16 complete heating contacts on each chip. In the center position, where the largest stress value is expected, a strain gauge cell is located. The temperature was measured at the corner position. In addition, a second configuration was used, with temperature sensors only, to determine the difference between corner and center position. For characterization, the measurement cells were connected to PCBs and the floating chip (only fixed by the wires) was put into a heating chamber. As a reference, the temperature up to 150 C was simultaneously measured with Pt1000 temperature sensors. After mounting and curing, active operation measurement was performed on a watercooled heat sink. The whole measurement setup can be seen in figure 5. The power supply for active heating was able to provide a maximum power of 320 W. For dynamic measurement a power MOSFET was used for switching to ensure high signal edge steepness in the excitation cycle. The measurement values are simultaneously recorded with an Agilent 34970A data acquisition unit with up to 13 values per second. First, the general heating function of the chip was tested by applying stepwise voltages until a temperature of 200 C is reached in the center position. Afterwards, dynamic stress measurement was performed with an excitation frequency of f = 0.25 Hz and a voltage of V = 12 V. B. Setup for Digital Image Correlation The optical measurement was performed on silicon-based IGBTs from Hitachi with an area of 9.7 x 9.7 mm² and a thickness of 525 μm. After adhesive bonding and connecting gate and emitter with Al-wires, the surface pattern was applied. For high contrast first a white coating of TiO 2 was spray coated using an airbrush system. Afterwards heat resistant black varnish was sprayed on top for the pattern. The passive measurements were performed on a heating plate, which is arranged in a small vacuum chamber with an observation window on top. Together with laminar air flow over this chamber, this setup reduces convection above the sample to increase the stability of the image. For active measurement a water-cooled copper heat sink was used. A function generator was connected to the gate of the IGBT for switching between V G = 0 V and V G = 9 V. The applied collector-emitter voltage was V CE = 6 V. An excitation frequency of f = 0.5 Hz was selected. The surface temperature was determined by Pt1000 temperature sensors in an independent measurement under the same conditions. The measurement system used was Aramis 5M manufactured by Gesellschaft fuer optische Messtechnik (GOM), Germany. The system was configured to a frame rate of 6 pictures per second for the duration of 3 seconds. Figure 5. Setup for active test chip measurement. Figure 6. Insulated Gate Bipolar Transistor on Direct Copper Bonded Substrate before and after application of the stochastic surface pattern. 509

4 Figure 8. Temperature change on the chip surface compared between corner (red) and center (black) position over the dissipated power in the heating resistor. Figure 7. DIC measurement setup for active operation with heat sink and power supply and function generator for excitation. IV. RESULTS AND DISCUSSION From the characterization the linear thermal coefficients of resistance (TCR) can be extracted. The values for the strain gauge and temperature sensors on the chip surface are shown in table II. The TCR for the temperature sensors lies in the expected range for that material. The high values of pure nickel are not reached, probably due to impurities and oxidation of the metal. The TCR of the strain gauges is higher than comparable values for chromium-nickel alloys. This leads to a higher cross sensitivity against temperature of the stress measurement. TABLE II. TCR OF SENSOR STRUCTURES Structure Material TCR ± (ppm/k) Strain gauge CrNi ± 9.5 Temperature sensor Ni ± Figure 9. Simulated temperature distribution using Finite-Element- Method for V = 25V potential difference over the heating resistor. The heating concept was successfully tested. The metalsemiconductor contacts showed a good ohmic behavior and heating up to 200 C could be achieved. The temperature distribution was analyzed using a chip with temperature sensors in the center and the corner position. The change in temperature shows a linear dependency against the dissipated power in the heating resistor which represents the thermal resistance of the whole assembly. The temperature in the corner position is approximately 16% lower compared to the center. For a better estimation, the distribution was electrothermally simulated using finite element analysis. Material data and boundary conditions for cooling were adapted to the experimental setup. The heat distribution for V = 25 V potential difference on the heating resistor is given in figure 9. The Maximum temperature is T max = 200 C under the inner metal contacts. In contrast to active IGBT, where the power is dissipated in the whole chip and the maximum temperature is in the center, we achieve more distributed hot spots. Nevertheless, maximum temperature difference over the chip is 43 K. The center position in between, where the highest stress values are expected, is assigned for a strain gauge structure. 510

5 Figure 10. Stress development on the test chip surface in y-direction for passive (red) and active (blue) heating. A comparison for active and passive stress in y-direction over the temperature in the chip center is given in figure 10. Passive heating was done in a laboratory oven between 50 C and 125 C, active heating on the water-cooled heat sink with up to 70 W of power dissipation in the chip. Power was held for several seconds before each measurement so temperature equilibrium can be assumed. Stress is increasing for lower temperatures as the assembly stays stress-free while the bonding process until the permanent joint is formed. Values of over 50 MPa were measured at room temperature. Active and passive heating are showing a similar behavior for the stress development. The dynamic measurement was performed using a frequency of f = 0.25 Hz meaning a switching operation is performed every 2 seconds. A voltage of V = 12 V was applied in the on-state leading to a current flow of I = 5 A. Consequently, the dissipated power alternates between 0 W and 60 W. The temperature and thermo-mechanical stress development over time is illustrated in figure 11. The temperature range is between 21.5 C and 90.0 C. The temperature response for heating and cooling shows a slightly different behavior. For cooling down the system needs less time hence the high stress values in the switching cycles are reached faster. Table III shows the values in x- and y-direction for comparison. The chip undergoes a temperature difference of T = 68.5 C on each switching cycle leading to change in stress of xx = 28.6 MPa and yy = 29.7 MPa. TABLE III. MAXIMUM AND MINIMUM VALUES OF STRESS DURING ACTIVE AND PASSIVE HEATING. xx yy Tmax = 90.0 C 27.3 MPa 23.3 MPa Tmin = 21.5 C 55.9 MPa 53.0 MPa Figure 11. Dynamic analysis of thermo-mechanical in-plane stress with temperature in a silicon stress test chip. With optical measurement the surface deformation during active and passive heating as well as mechanical stress development during switching cycles was analyzed. The surface topography of the adhesively bonded IBGTs was measured and a polynomial fit was used to estimate the curvature of the surface. The mechanical stress was thereafter calculated with equation 5 and 6. For calculation the Young s Modulus of silicon in [111]-direction E = 189 GPa was used [8]. As the initial curvature of the IBGT is unknown in this chase, we only give results for the change in thermo-mechanical stress. In figure 12 the stress development for passive and active heating is compared starting from room temperature. Passive heating was performed on a ceramic heater. For active heating the assembly was clamped on a heat sink. For enhanced cooling thermal conducting paste was applied in between. For both cases, active and passive heating the mechanical stress is decreasing with higher temperatures. For passive heating the change in stress for a temperature difference of T = 135 C is at = MPa. For active heating a maximum temperature change of T = 77 C was reached with a stress change of = -8.8 MPa. 511

6 Figure 12. Stress change measured by DIC for passive (red) and active (black) heating of the IGBT. The dynamic measurement was performed with the same setup used for the static active heating. The gate voltage was controlled by a function generator and switched with a frequency of f = 0.5 Hz between V G = 0V and 9 V. Figure 13 shows the results of the dynamic analysis. The short cycle time of 2 seconds is not enough for the system to gain a thermal equilibrium. Therefore the temperature is switching between T min = 40 C and T max = 105 C. The stress development is corresponding the temperatures and is within the range of = 8.3 MPa. The stress development was recorded with 6 pictures per second so the time-resolved resolution is 0.17 sec. V. CONCLUSION This work describes two different solutions for transient stress measurement of electronic devices. On the one hand, a self-heated silicon-based test chip with CrNi strain gauges was successfully developed, manufactured and tested. On the other Digital Image Correlation was used to analyze the surface topography and calculate the stress over the change in curvature. Both systems provide a time-resolved resolution which is suitable for measurement of high switching frequencies. For both systems dynamic analyses for adhesively bonded chips on DCB-substrates were performed. The advantage of the test chip is the uncomplicated measurement setup and the fact, that measurement can be performed in encapsulated housings. The optical system compared to the test chip can be used for measurement of the electronic device itself. It although provides information about the whole surface. ACKNOWLEDGMENT The authors would like to thank Polytec-PT GmbH, Germany, for providing the adhesives for the investigations. Figure 13. Dynamic analysis of mechanical stress using DIC for a switching frequency of f = 0.5 Hz. REFERENCES [1] R. C. Jaeger, J. C. Suhling, M. T. Carey and R. W. Johnson, "A piezoresistive sensor chip for measurement of stress in electronic packaging," Electronic Components and Technology Conference, Proceedings., 43rd, Orlando, FL, 1993, pp [2] D. Pustan, E. Rastiagaev, J. Wilde, In Situ Analysis of the Stress Development during Fabrication Process of Micro-Assemblies in Proc. 59th. IEEE Electronic Components and Technol. Conf. (ECTC), San Diego, May 26-29, 2009, pp [3] R. Zeiser, S. Ayub, J. Hempel, M. Berndt, J. Wilde, Mechanical Stress Analysis of Packaged Pressure Sensors for Very High Temperatures, in Proc. 46th International Symposium on Microelectronicy (IMAPS), Orlando, 30 September 3rd October, 2013, pp [4] E. Möller, A. Schiffmacher, A. Wijaya and J. Wilde, "In Situ Measurement of Stress Development in ECA for Die-Attachment of Electronic Devices," 2016 IEEE 66th Electronic Components and Technology Conference (ECTC), Las Vegas, NV, 2016, pp [5] A. Wijaya, E. Möller and J. Wilde, "Thermal stress characterization of power electronics with digital image correlation," th Electronic System-Integration Technology Conference (ESTC), Grenoble, 2016, pp [6] M. Feißt, Multifunktionaler siliziumbasierter Testchip für die Aufbau- und Verbindungstechnik in der Leistungselektronik, Master Thesis, University of Freiburg, [7] D. Pustan, M. Lapisa, M. Rieber, E. Zukowski and J. Wilde, "Combination of Modern Test Methods for Thermo-mechanical Deformation Analysis in Flip-Chip-Assemblies," st Electronic Systemintegration Technology Conference, Dresden, 2006, pp [8] M. A. Hopcroft, What is the Young s Modulus of Silicon? in Journal of Microelectromechanical Systems, Vol. 19, No.2, 2. April 2010, pp