SPECIFICATION USER: USER'S MODEL : MODEL: ELECTRO-MECHANICS [RECEIPT] Hereby received specification. -1/20- RECEIVED CHECK APPROVAL

Transcription

1 SPECIFICATION USER: PRODUCT : ESD LC FILTER ARRAY USER'S MODEL : MODEL: [RECEIPT] Hereby received specification. y m d RECEIVED CHECK APPROVAL / / / ELECTRO-MECHANICS -1/20-

2 DOCUMENT NO. DESIGN CHECK APPROV. DATE / / / SPECIFICATION USER: PRODUCT : ESD LC FILTER ARRAY USER'S MODEL : MODEL: APPROVAL MEMO ELECTRONIC DEVICE DIVISION SAMSUNG ELECTRO-MECHANICS CO., LTD. 314, MAETAN3-DONG, YEONGTONG-GU, SUWON, GYUNGGI-DO, KOREA TEL : FAX : /20-

3 REVISION HISTORY OF SPECIFICATION Revision No. DATE CONTENT REVISED REMARKS Established New items added BLANK -3/20-

4 1. SCOPE This specification is applied to Chip ESD LC Filter Array in electric equipment. It is possible to change the specification under the documentary agreement between design engineers of each party. 2. PART NUMBER CODE EXAMPLE) EMIX 21 A 280 F N P E "EMIX" means Chip ESDLCFilterArrayof SAMSUNG ELECTRO-MECHANICS CO., LTD SIZE Size indicates Length(L) and Width(W) of Chip ESD LC Filter. CODE DESCRIPTION OF CODE X 1.25 (mm) Type of Filter CODE A B C DESCRIPTION OF CODE Array 4 line : Normal Array 4 line : Low Capacitance Array 4 line : High attenuation Nominal Capacitance [=C1+C2] CODE DESCRIPTION OF CODE pf pf Working Voltage CODE READING CODE READING A 3.3V D 12V B 5.6V E 14V C 9.0V F 18V -4/20-

5 Chip Thickness CODE N A B DESCRIPTION OF CODE STANDARD THICKNESS THINNER THAN STANDARD THICKNESS THICKER THAN STANDARD THICKNESS Termination & Plating CODE External Electrode Plating P Ag Ni/Sn S Ag/Pd/Pt Q Ag epoxy Ni/Sn PACKAGE TYPE CODE B C D E T DESCRIPTION OF CODE BULK PAPER TAPE, 7 REEL PAPER TAPE, 13 REEL EMBOSSED TAPE, 7 REEL EMBOSSED TAPE, 13 REEL -5/20-

6 3. CONFIGURATION AND EQUIVALENT CIRCUIT L W T a b c Equivalent circuit Mark Dimensions (mm) Mark Dimensions (mm) L 2.00 ± 0.2 a 0.50 ± 0.1 W 1.25 ± 0.2 b 0.25 ± 0.1 T 0.80 ± 0.1 c Terminal NO. Terminal name Terminal NO. Terminal name,,, IN / OUT, GROUND,,, OUT / IN Structure Material 1 Body ZnO based body material 2 Internal electrode Ag / Pd 3 Termination Ag 4 Plating Ni / Sn External Electrode Structure Ag Termination Ni Plating Sn Plating -6/20-

7 4. RECOMMENDED LAND PATTERN [UNIT : mm] A B C D E F G P 0.6± ± ± ± ± ± ± ± RATING 5.1. Working temperature range 40 ~ Storage temperature condition 40 85, 70%RH max Evaluating condition Item Evaluating condition Remarks 1MHz, 0.5Vrms LCR meter 1mA Source meter Ileak Vdc = 18V Source meter ESD HBM (C=150pF, R=330Ω) (IEC standard, level 4) ESD simulator 50 Sample 50 E Attenuation [db] S.G. Attenuation(I.L) = 20log(E0/E1) E0 : Level without EMI Filter, E1 : Level with EMI Filter Measuring Equipment : E5071B Min. 20 (From 700 MHz To 2,500 MHz) -7/20-

8 6. ELECTRICAL CHARACTERISTICS 6.1 EMIX21A280FNPE Specifications Part Number Capacitance 1MHz) [pf](typ.) [C1+C2] Cut-Off Freq. [MHz] (Typ.) Attenuation [db] 500MHz 800MHz 1000MHz 1800MHz EMIX21A280FNPE 28(±20%) 270 Min. 10 Min. 30 Min. 30 Min. 20 Part Number Working Voltage Max.(Vw) [V] Varistor Voltage(Vb) [V] Leakage Current (Ileak) [Vdc:18V] EMIX21A280FNPE 18 45(±20%) < Typical Graph -8/20-

9 6.2 EMIX21A390FNPE Specifications Part Number Capacitance 1MHz) [pf](typ.) [C1+C2] Cut-Off Freq. [MHz] (Typ.) Attenuation [db] 500MHz 800MHz 1000MHz 1800MHz EMIX21A390FNPE 39(±20%) 200 Min. 20 Min. 30 Min. 25 Min. 20 Part Number Working Voltage Max.(Vw) [V] Varistor Voltage(Vb) [V] Leakage Current (Ileak) [Vdc:18V] EMIX21A390FNPE 18 28(±20%) < Typical Graph -9/20-

10 7. RELIABILITY TEST Item Test condition Performance Operating temp ~ +85 Storage temp. and humidity 1. Solder Heat Resistance 2. Solderability 3. Reflow Test Store as initially packaged. (Preheat) 1. Temp. : 100~ Time : 1 min. (Solder) 3. Dipping temp. : 260±5 4. Dipping Time : 10±1sec. (Preheat) 1. Temp. : 100~ Time : 1min. (Solder) 3. Dipping temp. : 245±5 4. Dipping Time : 4±1sec. Preheat condition : 100~130, 60~120sec. Peak temp.: 250 max Specimens are soldered twice with the above condition then kept in room temperature and humidity for 24 hours before measurements. temp Preheating Soldering Cooling Soldering Temp 250 T ~50 sec Preheating Temp , 70%RH max. 1. No appearance damage 2. More than 75% of terminal should be covered with lead. 3. Varistor Voltage(Vb) : <±10% 1. More than 90% of terminal should be covered with lead. 1. No appearance damage 2. Satisfy electrical characteristics 3. Varistor Voltage(Vb) : <±10% 60 60~120 6 time (sec) 4. Adhesion Strength Size 2012 Wmin. (kgf) 1.2 Apply pressure to specimen soldered on PCB 1. No mechanical damage -10/20-

11 Item Test condition Performance 1. Solder the specimen on PCB and bends until 1mm for the speed of 0.5mm/sec. Duration time : 3sec. (PCB: glass epoxy board, thickness:0.8mm) R Bending Strength 1 1. No mechanical damage 2. Varistor Voltage(Vb) : <±10% unit: 6. Temp. Cycling Test 7. Heat Load Resistance 8. Humidity Load Resistance 9. High Temp. & High Humidity with Bias 10. ESD life 1. Step1 : -40±3, 30±3min 2. Step2 : +125±3, 30±3min 3. Number of cycle : 30 times Test characteristics after keeping in room temperature for 24±2Hr. 1. Temp. : +85±2 2. Applied voltage : Working Voltage 3. Time : 500±24hr. Test characteristics after keeping in room temperature for 24±2Hr. 1. Temp. : +40±5 2. Humidity : 90~95%RH 3. Applied voltage : Working Voltage 4. Time : 500±24hr. Test characteristics after keeping in room temperature for 24±2Hr. 1. Temp. : +85±5 2. Humidity : 85±5%RH 3. Applied voltage : Working Voltage 4. Time : 120±12hr. Test characteristics after keeping in room temperature for 24±2Hr. 1. Voltage : 8kV (Level 4 - Contact) 15kV (Level 4 - Air) 2. Polarity :, 3. Repeat : 10times (one-second interval) Test characteristics after keeping in room temperature for 24±2Hr. 1. No mechanical damage 2. Varistor Voltage(Vb) : <±10% 1. No mechanical damage 2. Varistor Voltage(Vb) : <±10% 1. No mechanical damage 2. Varistor Voltage(Vb) : <±10% 1. No mechanical damage 2. Varistor Voltage(Vb) : <±10% 1. No mechanical damage 2. Varistor Voltage(Vb) : < ±15% ESD gun (IEC standard) C=150pF, R=330Ω -11/20-

12 8. PRECAUTIONS Stages Precautions Technical Considerations 1. PCB Design Pattern configurations (Design of Land-patterns) 1. When Chip ESD LC Filters are mounted on a PCB, the amount of solder used (size of fillet) can directly affect Chip ESD LC Filter performance. Therefore, the following items must be carefully considered in the design of solder land patterns: (1)The amount of solder applied can affect the ability of chips to withstand mechanical stresses which may lead to breaking or cracking. Therefore, when designing land-patterns it is necessary to consider the appropriate size and configuration of the solder pads which in turn determines the amount of solder necessary to form the fillets. (2)When more than one part is jointly soldered onto the same land or pad, the pad must be designed so that each component's soldering point is separated by solder-resist. Excess solder can affect the ability of chips to withstand mechanical stresses. Therefore, please take proper precautions when designing land-patterns. (1) Examples of good and bad solder application Not recommended Recommended Mixed mounting of SMD and leaded components lead wire of component Solder-resist Component placement close to the chassis -12/20- Hand- Soldering of leaded components near mounted components Chassis Solder (for grounding) lead wire of component Soldering iron Solder-resist Solder-resist 2. Soldering Selection of Flux 1. Since flux may have a significant effect on the performance of Chip ESD LC Filter, it is necessary to verify the following conditions prior to use; (1)Fluxusedshouldbewithlessthanor equal to 0.1wt%(Chlorine conversion method) of halogenated content. Flux having a strong acidity content should not be applied. (2)When soldering Chip ESD LC Filters on the board, the amount of flux applied should be controlled at the optimum level. (3)When using water-soluble flux, special care should be taken to properly clean the boards When too much halogenated substance (Chlorine etc.) content is used to activate the flux, or highly acidic flux is used, an excessive amount of residue after soldering may lead to corrosion of the terminal electrodes or degradation of insulation resistance on the surface of the Chip ESD LC Filter Flux is used to increase solderability in flow soldering, but if too much is applied,a large amount of flux gas may be emitted and may detrimentally affect solderability. To minimize the amount of flux applied, it is recommended to use a flux-bubbling system Since the residue of water-soluble flux is easily dissolved by water content in the air, the residue on the surface of Chip ESD LC Filter in high humidity conditions may cause a degradation of insulation resistance and therefore affect the reliability of the components. The Cleaning methods and the capability of the machines used should also be considered carefully when selecting water soluble flux.

13 Stages Precautions Technical Considerations 2. Soldering Soldering Temperature, time, amount of solder, etc. are specified in accordance with the following recommended conditions Preheating when soldering Heating : Chip ESD LC Filter components should be preheated to within 100 to 130 of the soldering. Cooling : The temperature difference between the components and cleaning process should not be greater than 100. Chip ESD LC Filters are susceptible to thermal shock when exposed to rapid or concentrated heating or rapid cooling. Therefore, the soldering process must be conducted with a great care so as to prevent malfunction of the components due to excessive thermal shock Recommended conditions for soldering [Reflow soldering] Temperature Profile TEMP Preheating Soldering Cooling Soldering Temp 250 T 150 Preheating Temp 30~50 sec ~120 6 TIME (sec) 3. Cleaning Cleaning conditions 1. When cleaning the PC board after the Chip ESD LC Filters are all mounted, select the appropriate cleaning solution according to the type of flux used and purpose of the cleaning(e.g. to remove soldering flux or other materials from the production process.) 2. Cleaning conditions should be determined after verifying, through a test run, that the cleaning process does not affect the Chip ESD LC Filter's characteristics. 1. The use of inappropriate solutions can cause foreign substances such as flux residue to adhere to the Chip ESD LC Filter, resulting in a degradation of the Chip ESD LC Filter's electrical properties (especially insulation resistance). 2. Inappropriate cleaning conditions (insufficient or excessive cleaning) may detrimentally affect the performance of the Chip ESD LC Filters. (1)Excessive cleaning In the case of ultrasonic cleaning, too much power output can cause excessive vibration of the PC board which may lead to the cracking of the Chip ESD LC Filter or the soldered portion, or decrease the terminal electrodes' strength. Thus the following conditions should be carefully checked; Ultrasonic output Ultrasonic frequency Ultrasonic washing period Below 20 w/l Below 40 khz 5 min. or less -13/20-

14 Stages Precautions Technical Considerations 4. Post cleaning processes Application of resin coatings, molding, etc. to the PCB and components. 1. With some type of resins a decomposition gas or chemical reaction vapor may remain inside the resin during the hardening period or while left under normal storage conditions resulting in the deterioration of the Chip ESD LC Filter's performance. 2. When a resin's hardening temperature is higher than the Chip ESD LC Filter's operating temperature, the stresses generated by the excess heat may lead to Chip ESD LC Filter damage or destruction. 3. Stress caused by a resin's temperature generated expansion and contraction may damage Chip ESD LC Filters The use of such resins, molding materials etc. is not recommended. 5. Storage conditions Storage 1. To maintain the solderability of terminal electrodes and to keep the packaging material in good condition, care must be taken to control temperature and humidity in the storage area. Humidity should especially be kept as low as possible. Recommended conditions Ambient temperature 15~35 Humidity 45~75%RH The ambient temperature must be kept below 30. Even under ideal storage conditions Chip ESD LC Filter electrode solderability decreases as time passes, so Chip ESD LC Filters should be used within 6 months from the time of delivery. 1. If the parts are stocked in a high temperature and humidity environment, problems such as reduced solderability caused by oxidation of terminal electrodes and deterioration of taping/packaging materials may take place. For this reason, components should be used within 6 months from the time of delivery. If exceeding the above period, please check solderability before using the Chip ESD LC Filters. The packaging material should be kept wherenochlorineorsulfurexistsinthe air. -14/20-

15 9. REPORT BEFORE CHANGE If it is required to change the specifications, materials or manufacturing methods of this specified Chip ESD LC Filters, we shall inform on written statement with its quality and reliability data before changes may occur. 10. PACKAGING Package includes label with below item and outgoing inspection data on customer's request. - Part No.& Lot No. - Quantity - Name and logo of manufacturer 11. RESTRICTION OF ENVIRONMENTAL DESTRUCTIVE MATERIAL Chip ESD LC Filters specified on this specification do not use any of under stated materials. Cd, Hg, Pb, Cr+6, As, Br and its chemical composite, PCB and asbestos. PBBS PBBOs PBDO PBDE PBB 12. USAGE OF MATERIALS DESTRUCTIVE OZONOSPHERE Chip ESD LC Filters specified on this specification do not use any of under stated ODS materials on its manufacturing stages. Freon Haron TCE CCl HCFC 13. THE PLACE OF ORIGIN - Pusan factory of SAMSUNG Electro-mechanics Co., LTD.(KOREA) -15/20-

16 TAPING SPECIFICATION -16/20-

17 1. TAPING 1.1 SIZE AND QUANTITY P1 P2 P0 Do W E F B A T Unit:mm CODE Tape Material A B T Standard Quantity 21 Embossed Tape 1.52± ± max 3000pcs/reel W F E P1 P2 P0 D ± ± ± ± ±0.1 Φ Setting Direction USER's DEVICE INSERTING DIRECTION -17/20-

18 1.3 TAPING FIGURE empty position 40mm min 80mm min empty position 150mm min end of tape Chip ESD LC Filter beginning of tape TAPE MATERIAL Carrier Tape : ANTI-STATIC Polyester Film Cover Tape : ANTI-STATIC Polyester Film + Synthetic Polymer Adhesive 2. PEEL-OFF STRENGTH CARRIER TAPE COVER TAPE PULLING STRENGTH 15 BELOW UNREELING DIRECTION (about 200 /min ) Fixing peeling strength : 5 70g Instrument : Peel back force tester (model 856 vs) -18/20-

19 3. REEL DIMENSIONS E C B R D A t W Unit:mm TYPE A B C D E W T R 7"REEL φ178±2 φ50min Φ13±0.5 Φ21± ± ± ± "REEL φ258±2 φ80min ± ± ±0.2-13"REEL φ330±2 φ70min Φ13±0.5 Φ21± ± ± ± INDICATION ITEMS It is indicated on the reel as follows 1) PART No 2) LOT No. 3) QUANTITY 4) SAMSUNG LOGO -19/20-

20 PACKAGING SPECIFICATION 1. PRODUCT INDICATING LABEL & THE OTHER LABELS SIZE SERIES CAPACITANCE Part No. LOT No. QUANTITY Size, Series, Inductance(or Impedance) Part No. BAR CODE of Part No. LOT No., Reel No., Quantity BAR CODE of LOT No. and Quantity PB FREE - This label sticks to inner packaging box. SEMCO P/N Q'ty USER NAME [Packing List] [User Name] [P/O No & C/T No.] - These three labels stick to outer packaging box. 2. PACKAGING BOX A. 7 INCH REEL 5ea 30±10 ( UNIT : mm ) 185±10 Front 180±10 66±1.0 B. 7 INCH REEL 60ea C. 7 INCH REEL 20ea ( UNIT : mm ) ( UNIT : mm ) 225±5 Front 380±5 205±5 Front 195±5 410±5 295±5-20/20-