2-inch polycrystalline silicon thin film transistor array. using field aided lateral crystallization
|
|
- Aubrey Ward
- 6 years ago
- Views:
Transcription
1 2-inch polycrystalline silicon thin film transistor array using field aided lateral crystallization JAE HOON JUNG, MYEONG HO KIM, YOUNG BAE KIM a, DUCK-KYUN CHOI, Division of Materials Science and Engineering, Hanyang university, a Information Display Research institute, Hanyang university 17 Haengdang-Dong, Seongdong-Ku, Seoul KOREA Tel : , Fax : Abstract : This study presents a technique for fabricating polycrystalline silicon (poly-si) thin film transistors (TFTs) array from amorphous silicon (a-si) by field-aided lateral crystallization (FALC) method which utilizes Ni-catalyst and electric field during crystallization. We could uniformly crystallize a-si channels of 240 x 120 transistor array on 2-inch glass substrate by designing a unique common electrode connected to sources and drains. In order to enhance the uniformity, the current density flowing each cell was simulated. Raman analysis was done on the entire 2-inch array to confirm the crystallinity after the crystallization and it showed the identical Raman peak at 521cm -1 which is the characteristic value of crystalline silicon. The electrical properties of TFTs array turned out to be very uniform with the threshold voltage of 4.03V±0.25 and the subthreshold voltage slope of 1.18V/dec±0.45. Key-word : Low-temperature polycrystalline silicon (LTPS), field aided lateral crystallization(falc), thin film transistors(tfts), common electrode, uniformity, active matrix organic light emitting diode(amoled) 1. Introduction Low-temperature polycrystalline silicon (poly-si) thin film transistors (LTPS-TFTs) has been widely used as panel switching elements, panel array and peripheral driving circuit for System-On-Panel (SOP) due to its high field effect mobility (μ fe ), low threshold voltage (V th ), and low sub-threshold swing (S)[1]. Poly-Si TFTs integrated on the glass substrate permit high resolution, low power, low cost, reliable display such as liquid crystal display (LCD) and active matrix organic light emitting diode (AMOLED)[2]. In case of AMOLED, it is essential to acquire a low standard deviation of device parameters such as stability of threshold voltage and uniformity of crystallization in TFTs array. Many techniques have been studied during the last two decades to get poly-si having good qualities [3-4]. Among various techniques, we employed Ni-catalyst field aided lateral crystallization for fabricating 2-inch poly-si array. In this study, we applied uniform electric field to each pixel transistors through the judicious design of common electrode connected to sources and drains. After the fabrication of 2-inch TFT array, we measured device parameters such as field effect mobility(μ fe ), threshold voltage(v th ), sub-threshold slope(v/dec), onoff ratio and the positional deviation of properties was ISSN: Page 60 ISBN:
2 evaluated. In addition, the confirmation of crystallization of amorphous region and microstructural analysis of poly-si were performed. 2. Problem formulation The electrical field and Ni-catalyst are the crucial requirements for the crystallization for amorphous silicon (a-si) in field aided lateral crystallization (FALC) process. The schematic of FALC process is presented in Fig.1. The poly-si by FALC process resulted in good qualities such as high crystallinity, elongated grains along the transistor channel due to the directional crystallization, and smooth surface. Moreover, the poly-si thin film transistor fabricated by FALC process exhibits good device properties in many aspects, particularly in high field effect mobility (200.5 cm 2 /Vs)[5]. In order to fabricate poly-si TFTs (240 х 120) array on 2-inch glass substrate by the FALC process, the careful consideration has to be focused on the way to achieve uniform crystallization. In many cases, the resistance of metal common electrode lines connected to sources or drains can be a problem in applying a uniform electric field on channel region of the transistors in large panel. The inhomogeneity in the applied electric field to individual transistors, which will in turn cause non-uniform current density in each TFT cell, results in non-uniform crystallization of pixel transistor channels on 2-inch array. Therefore, it is essential to design a geometry of common electrode enabling a uniform voltage (uniform current) across the channel region.. 3. Problem solution. The design of metal line (common electrode) for FALC process has to be followed by the thorough understanding of total resistance of current path in the panel. MATHCAD program was employed to simulate the effect of the design parameters like geometry of electrode or number of the constituent cells. Total resistance of the current path is a sum of the resistance of a-si (channel) and that of metal line. By increasing the number of cells, total resistance decreased and the total resistance was dominated by the resistance of a-si. If the size of array is larger than 3 х 3, the connection of cells cannot be considered as a simple parallel circuit model because there exists two inputs and two outputs in the current path. Thus, a special transformation is needed to calculate the total resistance. In addition, we also took account the physical dimension of metal line and a-si in the simulation. After finding the total resistance, we calculated the current density per each cell on 2-inch array to design geometry of metal line. It is known that the current density should be higher than a critical current density to induce the crystallization of a-si by FALC process, and the critical current density was evaluated as 1.64х 10 3 A/cm 2 from the preliminary experiments. Fig. 1 Schematic of field aided lateral crystallization process. (500 4hr 30min, Ni-catalyst 10Å) ISSN: Page 61 ISBN:
3 Fig. 2 Configuration of common electrode and magnified image of crystallization showing the directional behavior. In order to reveal the directionality in crystallization by FALC, the photo image was taken from the partially crystallized transistor channel. Figure 2 shows the optimized geometry of metal line. Molybdenum was selected as a common electrode metal in the array. In Fig.2, the unique behavior of directional crystallization in FALC process is also shown. After the completion of the crystallization, the boundary between poly- Si and a-si will be driven to the + electrode side. Figure 3 presents the simulation result of the current density of individual cells in the array by MATHCAD. We can know that the current density depends on the location of the cell on 2-inch array, and the deviation can be less than 1%. By using optimized design of common electrode through simulation by MATHCAD, we could fully spectroscope (NRS-3100). Figure 4 shows the result of Raman peaks from the transistor channels at various locations on 2-inch array. All the peaks are identical in terms of the peak height and the peak position at 521 cm -1 which indicates the characteristic Raman shift peak of poly-si. This result reveals a uniform crystallization of a-si on 2-inch array. Figure 5(a) and 5(b) shows optical microscope image of the fabricated 2-inch poly-si TFTs array. All the TFTs have a channel geometry of 20μm /20μm (channel length/channel width) and transfer curve measured by semiconductor parameter analyzer (Agilient E5270B) implies that the properties of the transistors are quite similar and the deviation is not significant although the gate oxide quality is rather unsatisfactory. crystallize 240 х 120 cells on 2-inch array. And we fabricated polycrystalline-si TFTs of 240 х 120 array using FALC process. (a) (b) Fig.3 3-dimension simulation result of current density of each cell as a function of the position in the array. (By MATHCAD) After the crystallization of a-si layer (active layer) in array transistors, we carried out Raman analysis to confirm uniform crystallization using Raman Raman shift( cm -1 ) (c) (d) Fig. 4 Raman spectra reveal the uniform crystallization of channels on 2-inch poly-si array: locations of transistors evaluated are (a) top - left (b) top - right (c) bottom - left (d) bottom - right in array. ISSN: Page 62 ISBN:
4 Drain crruent(a) 1E-5 1E-6 1E-7 1E-8 1E-9 1E-10 1E-11 (a) Gate voltage ( V g ) ( Row XColumn) 10X10 10X20 110X10 110X20 60X10 60X120 60X130 60X230 10X220 10X X X230 (b) Fig. 5 (a) Optical microscope image of 2-inch poly-si TFTs array, (b) transfer curves of poly-si TFTs array fabricated on 2-inch substrate. In Table 1, the summary of device parameters and deviation is presented. We could obtain uniform electrical properties such as field effect mobility of Conclusion In order to apply field aided lateral crystallization process to the next generation display like AMOLED device, it is essential to supply a uniform current density to each cell in the panel with the value higher than the critical one (1.64х10 3 A/cm 2 ). We could achieve this goal by employing common electrode with an optimized geometry after the simulation of current density at each cell on 2-inch array of 240 х 120. The poly-si crystallized by FALC process exhibits the identical Raman shift peak at 521 cm -1 regardless of the location in 2-inch TFTs array panel. The field effect mobility at the drain voltage of 0.5 V was 26.3cm 2 /Vs and standard deviation was less than 10%. We also confirmed the other electrical characteristics of TFTs are reasonably good in terms of the uniformity. Therefore, as a conclusion, we could demonstrate the FALC process is suitable for applying to AMOLED. cm 2 /Vs ± 3.3, threshold voltage of 4.03V ± 0.25, subthreshold voltage slope of 1.18V±0.45, and on/off ratio of 10 5 from transfer curves. The deviation deduced from the device parameters ensures that the values we realized meet the specification of the TFTs for the application to AMOLED since it requires V th variation of +/- 0.3V and the mobility variation of 10% [6]. Table 1. Summary of device parameters and deviation on 2-inch poly-si (240 х 120) array Device parameters Value deviation Field effect mobility (cm 2 /Vs) 26.3 ± 3.3 (9.7%) Threshold voltage (V th) 4.03 ±0.25 Subthreshold voltage (V/dec.) 1.18 ±0.45 On/off ratio 10 5 Reference [1] B.Y. Lee, Y. Hirayama, Y. Kubota, S. lmai, A. Imaya, M. Katayama, K. Kato, A. Ishkawa, T. Ozaki, K. Mutaguchi, and S. Yamazaki, A CPU on a Glass Substrate Using CG-silicon TFTs ISSCC 03, 2003, pp164~165. [2] Yue Kuo, Thin film transistors Materials and processes. Vol 2, p420,. [3] K.H. Kim, S.J. Park, K. S. Cho, W.S. Sohn, and J. Jang, Large-area poly-si on glass by UV can heating in SID Tech. Dig. 2002, pp150~153. [4] R.B. Inverson and R. Reif, Recrystallization of amorphized polycrystalline silicon films SiO 2 : temperature dependence of the crystallization parameters. J.Appl.Phys., vol 62, pp.1675~1681, [5] Hyun-woong chang, Hyun-chul Kim, Yu-hang Wang, and Duck-Kyun Choi, Fabrication of low temperature poly-si thin film transistor using field aided lateral crystallization process, Revista Mexicana de fisica S53(1), ISSN: Page 63 ISBN:
5 [6].Woo-Jin Nam, Jae-Hoon Lee, Sung Hwan Choi, Jae Hong Jeon and Min-Koo Han. New Voltage programming LTPS pixel scaling down Vth variation for AMOLED display, in SID. Dig. 2006, pp399~402. ISSN: Page 64 ISBN:
Fabrication of a Uniform Low Temperature Poly-Si TFT Array by Optimized Field Aided Lateral Crystallization
Fabrication of a Uniform Low Temperature Poly-Si TFT Array by Optimized Field Aided Lateral Crystallization Jae Hoon Jung, Kwang Jin Lee, Duck Kyun Choi, Ji Hoon Shin, Jung Sun You and Young Bae Kim J.
More informationPolycrystalline Silicon Produced by Joule-Heating Induced Crystallization
Polycrystalline Silicon Produced by Joule-Heating Induced Crystallization So-Ra Park 1,2, Jae-Sang Ro 1 1 Department of Materials Science and Engineering, Hongik University, Seoul, 121-791, Korea 2 EnSilTech
More informationYung-Hui Yeh, and Bo-Cheng Kung Display Technology Center (DTC), Industrial Technology Research Institute, Hsinchu 310, Taiwan
Amorphous In 2 O 3 -Ga 2 O 3 -ZnO Thin Film Transistors and Integrated Circuits on Flexible and Colorless Polyimide Substrates Hsing-Hung Hsieh, and Chung-Chih Wu* Graduate Institute of Electronics Engineering,
More informationA Novel Low Temperature Self-Aligned Field Induced Drain Polycrystalline Silicon Thin Film Transistor by Using Selective Side-Etching Process
Chapter 3 A Novel Low Temperature Self-Aligned Field Induced Drain Polycrystalline Silicon Thin Film Transistor by Using Selective Side-Etching Process 3.1 Introduction Low-temperature poly-si (LTPS) TFTs
More informationCrystallization of Amorphous Silicon Thin Film. by Using a Thermal Plasma Jet. Hyun Seok Lee, Sooseok Choi, Sung Woo Kim, and Sang Hee Hong*
Crystallization of Amorphous Silicon Thin Film by Using a Thermal Plasma Jet Hyun Seok Lee, Sooseok Choi, Sung Woo Kim, and Sang Hee Hong* Department of Nuclear Engineering, Seoul National University Seoul
More information行政院國家科學委員會補助專題研究計畫成果報告
NSC89-2215-E-009-104 89 08 01 90 07 31 Fabrication and Characterization of Low-Temperature Polysilicon Thin Film Transistors with Novel Self-Aligned Sub-Gate Structures NSC89-2215-E009-104 (FID) self-aligned
More informationAbstract. 1. Introduction. 2. Device Variation
Device Variation and Its Influences on the LTPS TFT Circuits Ya-Hsiang Tai Department of Photonics & Display Institute, National Chiao Tung Univ., Hsinchu 300, Taiwan, R. O. C. Telephone: +886-3-5131307,
More informationTHIN FILM DEVICES for LARGE AREA ELECTRONICS
Institute of Microelectronics Annual Report 2009 7 Project III. 3: THIN FILM DEVICES for LARGE AREA ELECTRONICS Project leader: Dr. D.N. Kouvatsos Collaborating researchers from other projects: Dr. D.
More informationStudy on the hydrogenated ZnO-based thin film transistors
Final Report Study on the hydrogenated ZnO-based thin film transistors To Dr. Gregg Jessen Asian Office of Aerospace Research & Development April 30th, 2011 Jae-Hyung Jang School of Information and Communications
More informationProject III. 4: THIN FILM DEVICES FOR LARGE AREA ELECTRONICS
Project III. 4: THIN FILM DEVICES FOR LARGE AREA ELECTRONICS Project leader: Dr D.N. Kouvatsos Collaborating researchers from other projects: Dr D. Davazoglou Ph.D. candidates: M. Exarchos, L. Michalas
More informationAmorphous and Polycrystalline Thin-Film Transistors
Part I Amorphous and Polycrystalline Thin-Film Transistors HYBRID AMORPHOUS AND POLYCRYSTALLINE SILICON DEVICES FOR LARGE-AREA ELECTRONICS P. Mei, J. B. Boyce, D. K. Fork, G. Anderson, J. Ho, J. Lu, Xerox
More informationThe Effect of Interfacial Roughness on the Electrical Properties of Organic Thin Film Transistors with Anisotropic Dielectric Layer
Mol. Cryst. Liq. Cryst., Vol. 476, pp. 157=[403] 163=[409], 2007 Copyright # Taylor & Francis Group, LLC ISSN: 1542-1406 print=1563-5287 online DOI: 10.1080/15421400701735673 The Effect of Interfacial
More informationCeramic Processing Research
Journal of Ceramic Processing Research. Vol. 10, No. 1, pp. 90~94 (2009) J O U R N A L O F Ceramic Processing Research An investigation into multi-layered coatings on bipolar plates for a PEM (proton exchange
More informationElectron backscattered diffraction study of poly-si by Ni-mediated crystallization of amorphous silicon using a SiO 2 nanocap
Electron backscattered diffraction study of poly-si by Ni-mediated crystallization of amorphous silicon using a SiO 2 nanocap Y. J. Chang, a) J. H. Oh, K. H. Kim, and Jin Jang b) Advanced Display Research
More informationTFT Backplane Technologies for AMLCD and AMOLED Applications
Journal of the Korean Physical Society, Vol. 54, No. 1, January 2009, pp. 549553 TFT Backplane Technologies for AMLCD and AMOLED Applications Jae Beom Choi, Young Jin Chang, Cheol Ho Park, Beom Rak Choi
More informationCRYSTALAS. UV Optics System for Excimer Laser Based Crystallization of Thin Silicon Films
L A S E R S Y S T E M G M B H CRYSTALAS UV Optics System for Excimer Laser Based Crystallization of Thin Silicon Films CRYSTALAS The New Optical Crystallization System CRYSTALAS is an excimer laser-based
More informationLow temperature amorphous and nanocrystalline silicon thin film transistors. deposited by Hot-Wire CVD on glass substrate
Low temperature amorphous and nanocrystalline silicon thin film transistors deposited by Hot-Wire CVD on glass substrate M. Fonrodona 1, D. Soler 1, J. Escarré 1, F. Villar 1, J. Bertomeu 1 and J. Andreu
More informationEffect of Ti/Cu Source/Drain on an Amorphous IGZO TFT Employing SiNx Passivation for Low Data-Line Resistance
Effect of Ti/Cu Source/Drain on an Amorphous IGZO TFT Employing SiNx Passivation for Low Data-Line Resistance Young Wook Lee, Sun-Jae Kim, Soo-Yeon Lee, Woo-Geun Lee, Kap-Soo Yoon, Jae-Woo Park, Jang-Yeon
More informationOXIDE SEMICONDUCTOR thin-film transistors (TFTs)
JOURNAL OF DISPLAY TECHNOLOGY, VOL. 8, NO. 1, JANUARY 2012 35 Effect of Self-Assembled Monolayer (SAM) on the Oxide Semiconductor Thin Film Transistor Seung-Hwan Cho, Yong-Uk Lee, Jeong-Soo Lee, Kang-Moon
More informationElevated-Metal Metal-Oxide Thin-Film Transistors Based on Indium-Tin-Zinc Oxide
Elevated-Metal Metal-Oxide Thin-Film Transistors Based on Indium-Tin-Zinc Oxide Zhihe XIA,2, Lei LU,2,3, Jiapeng LI,2, Zhuoqun FENG,2, Sunbin DENG,2, Sisi WANG,2, Hoi-Sing KWOK,2,3 and Man WONG*,2 Department
More informationInfluence of Plasma Treatment to the Performance of Amorphous IGZO based Flexible Thin Film Transistors
Article Influence of Plasma Treatment to the Performance of Amorphous IGZO based Flexible Thin Film Transistors Long-long Chen, Xiang Sun, Ji-feng Shi, Xi-feng Li *, Xing-wei Ding and Jian-hua Zhang *
More informationAmorphous Oxide Transistor Electrokinetic Reflective Display on Flexible Glass
Amorphous Oxide Transistor Electrokinetic Reflective Display on Flexible Glass Devin A. Mourey, Randy L. Hoffman, Sean M. Garner *, Arliena Holm, Brad Benson, Gregg Combs, James E. Abbott, Xinghua Li*,
More informationEffective Annealing and Crystallization of Si Film for Advanced TFT System
Journal of Information Display, Vol. 11, No. 1, March 2010 (ISSN 1598-0316) 2010 KIDS Effective Annealing and Crystallization of Si Film for Advanced TFT System Takashi Noguchi Abstract The effect of the
More informationEXCIMER LASER ANNEALING FOR LOW- TEMPERATURE POLYSILICON THIN FILM TRANSISTOR FABRICATION ON PLASTIC SUBSTRATES
EXCIMER LASER ANNEALING FOR LOW- TEMPERATURE POLYSILICON THIN FILM TRANSISTOR FABRICATION ON PLASTIC SUBSTRATES G. Fortunato, A. Pecora, L. Maiolo, M. Cuscunà, D. Simeone, A. Minotti, and L. Mariucci CNR-IMM,
More informationEffect of Post-Deposition Treatment on Characteristics of P-channel SnO
Effect of Post-Deposition Treatment on Characteristics of P-channel SnO Thin-Film Transistors 1 Byeong-Jun Song, 2 Ho-Nyeon Lee 1, First Author Department of Electric & Robotics Engineering, Soonchunhyang
More informationLow contact resistance a-igzo TFT based on. Copper-Molybdenum Source/Drain electrode
Low contact resistance a-igzo TFT based on Copper-Molybdenum Source/Drain electrode Shi-Ben Hu 1,Hong-Long Ning 1,2, Feng Zhu 1,Rui-QiangTao 1,Xian-Zhe Liu 1, Yong Zeng 1, Ri-Hui Yao 1, Lei Wang 1, Lin-Feng
More informationHighly efficient deep-uv light-emitting diodes using AlN-based, deep-uv transparent glass electrodes
Supporting Information Highly efficient deep-uv light-emitting diodes using AlN-based, deep-uv transparent glass electrodes Tae Ho Lee, Byeong Ryong Lee, Kyung Rock Son, Hee Woong Shin,, and Tae Geun Kim
More informationCrystallization of Continuing Wave Laser Applications for Low-Temperature Polycrystalline Thin Film Transistors
Chapter 4 Crystallization of Continuing Wave Laser Applications for Low-Temperature Polycrystalline Thin Film Transistors 4.1 Introduction Low temperature poly-silicon TFTs fabricated by excimer laser
More informationA Self-Aligned a-igzo Thin-Film Transistor Using a New Two-Photo-Mask Process with a Continuous Etching Scheme
Materials 2014, 7, 5761-5768; doi:10.3390/ma7085761 Article OPEN ACCESS materials ISSN 1996-1944 www.mdpi.com/journal/materials A Self-Aligned a-igzo Thin-Film Transistor Using a New Two-Photo-Mask Process
More informationCharacteristic Evaluation of Complementary Inverter using Amorphous Oxide TFT and Polymer Organic TFT
Characteristic Evaluation of Complementary Inverter using Amorphous Oxide TFT and Polymer Organic TFT Takashi Nakanishi 1, Mariko Sakemi 1, Tomoya Okumura 1, Yuki Ueda 1, Mutsumi Kimura 1, Kenji Nomura
More informationNO x gas response characteristics of thin film mixed oxide semiconductor
Sensors and Actuators B 108 (2005) 211 215 NO x gas response characteristics of thin film mixed oxide semiconductor Kap-Duk Song a, Jung-Il Bang a, Sang-Rok Lee a, Yun-Su Lee a, Young-Ho Hong b, Duk-Dong
More information1. Aluminum alloys for direct contacts. 1.1 Advantages of aluminum alloys for direct contacts
Direct contacts between aluminum alloys and thin film transistors (TFTs) contact layers were studied. An Al-Ni alloy was found to be contacted directly with an indium tin oxide (ITO) layer successfully
More informationHigh-Resolution, Electrohydrodynamic Inkjet Printing of Stretchable, Metal Oxide Semiconductor Transistors with High Performances
Electronic Supplementary Material (ESI) for Nanoscale. This journal is The Royal Society of Chemistry 2016 ` Electronic Supplementary Information High-Resolution, Electrohydrodynamic Inkjet Printing of
More informationLOW-TEMPERATURE polycrystalline silicon (LTPS)
1410 IEEE TRANSACTIONS ON ELECTRON DEVICES, VOL. 61, NO. 5, MAY 2014 Study of the Characteristics of Solid Phase Crystallized Bridged-Grain Poly-Si TFTs Wei Zhou, Shuyun Zhao, Rongsheng Chen, Meng Zhang,
More informationWHILE most active matrix liquid crystal displays (LCDs)
JOURNAL OF DISPLAY TECHNOLOGY, VOL. 2, NO. 3, SEPTEMBER 2006 265 Polycrystalline Silicon Films and Thin-Film Transistors Using Solution-Based Metal-Induced Crystallization Zhiguo Meng, Shuyun Zhao, Chunya
More informationAMORPHOUS oxide semiconductor (AOS) thin-film
2900 IEEE TRANSACTIONS ON ELECTRON DEVICES, VOL. 62, NO. 9, SEPTEMBER 2015 Reliability of Crystalline Indium Gallium Zinc-Oxide Thin-Film Transistors Under Bias Stress With Light Illumination Kyung Park,
More informationMicroelectronics Reliability
Microelectronics Reliability 52 (2012) 2215 2219 Contents lists available at SciVerse ScienceDirect Microelectronics Reliability journal homepage: www.elsevier.com/locate/microrel Threshold voltage shift
More informationElectrical Properties of Ultra Shallow p Junction on n type Si Wafer Using Decaborane Ion Implantation
Mat. Res. Soc. Symp. Proc. Vol. 686 2002 Materials Research Society Electrical Properties of Ultra Shallow p Junction on n type Si Wafer Using Decaborane Ion Implantation Jae-Hoon Song, Duck-Kyun Choi
More informationLOW-TEMPERATURE poly-si (LTPS) thin-film transistors
IEEE TRANSACTIONS ON ELECTRON DEVICES, VOL. 51, NO. 1, JANUARY 2004 63 Performance and Reliability of Low-Temperature Polysilicon TFT With a Novel Stack Gate Dielectric and Stack Optimization Using PECVD
More informationSupplementary Figure S1 Photograph of MoS 2 and WS 2 flakes exfoliated by different metal naphthalenide (metal = Na, K, Li), and dispersed in water.
Supplementary Figure S1 Photograph of MoS 2 and WS 2 flakes exfoliated by different metal naphthalenide (metal = Na, K, Li), and dispersed in water. Supplementary Figure S2 AFM measurement of typical LTMDs
More informationBehavior of the parameters of microcrystalline silicon TFTs under mechanical strain. S. Janfaoui*, C. Simon, N. Coulon, T.
Author manuscript, published in "Solid-State Electronics 93 (2014) 1-7" DOI : 10.1016/j.sse.2013.12.001 Behavior of the parameters of microcrystalline silicon TFTs under mechanical strain S. Janfaoui*,
More informationThe Mobility Enhancement of Indium Gallium Zinc Oxide Transistors via Low-temperature Crystallization using a Tantalum Catalytic Layer
www.nature.com/scientificreports Received: 27 February 2017 Accepted: 24 August 2017 Published: xx xx xxxx OPEN The Mobility Enhancement of Indium Gallium Zinc Oxide Transistors via Low-temperature Crystallization
More informationMicrotexture measurement of copper damascene line with EBSD
Material Science Forum Vols. 408-412(2002) pp. 529-534 2002 Trans Tech Publications, Switzerland Microtexture measurement of copper damascene line with EBSD Dong-Ik Kim 1*, Jong-Min Paik 1, Young-Chang
More informationHigh Mobility Flexible Amorphous IGZO Thin-Film Transistors with a Low Thermal Budget Ultra-Violet Pulsed Light Process.
High Mobility Flexible Amorphous IGZO Thin-Film Transistors with a Low Thermal Budget Ultra-Violet Pulsed Light Process. M. Benwadih 1*, R. Coppard 1, K. Bonrad 2, A. Klyszcz 2, D. Vuillaume 3 1 : Univ.
More informationSoft-lithography for Preparing Patterned Liquid Crystal Orientations
2007 KIDS Soft-lithography for Preparing Patterned Liquid Crystal Orientations Hak-Rin Kim **a, Jong-Wook Jung **a, Min-Soo Shin **a, Myung-Eun Kim a, You-Jin Lee **a, and Jae-Hoon Kim *b Abstract We demonstrate
More informationSupporting Information. graphene oxide films for detection of low. concentration biomarkers in plasma
Supporting Information Wafer-scale high-resolution patterning of reduced graphene oxide films for detection of low concentration biomarkers in plasma Jinsik Kim a, Myung-Sic Chae a, Sung Min Lee b, Dahye
More informationSputtering Target of Oxide Semiconductor with High Electron Mobility and High Stability for Flat Panel Displays
ELECTRONICS Sputtering Target of Oxide Semiconductor with High Electron Mobility and High Stability for Flat Panel Displays Miki MIYANAGA*, Kenichi WATATANI, and Hideaki AWATA ----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
More informationMICROCHIP MANUFACTURING by S. Wolf
MICROCHIP MANUFACTURING by S. Wolf Chapter 7: BASICS OF THIN FILMS 2004 by LATTICE PRESS Chapter 7: Basics of Thin Films CHAPTER CONTENTS Terminology of Thin Films Methods of Thin-Film Formation Stages
More informationLaser Crystallization for Low- Temperature Poly-Silicon (LTPS)
Laser Crystallization for Low- Temperature Poly-Silicon (LTPS) David Grant University of Waterloo ECE 639 Dr. Andrei Sazonov What s the current problem in AM- LCD and large-area area imaging? a-si:h has
More informationUnoxidized Graphene/Alumina Nanocomposite: Fracture- and Wear-Resistance Effects of Graphene. on Alumina Matrix
Unoxidized Graphene/Alumina Nanocomposite: Fracture- and Wear-Resistance Effects of Graphene on Alumina Matrix Hyo Jin Kim,, Sung-Min Lee, Yoon-Suk Oh, Young-Hwan Yang, Young Soo Lim, Dae Ho Yoon, * Changgu
More informationFabrication of MoS 2 Thin Film Transistors via Novel Solution Processed Selective Area Deposition
Electronic Supplementary Material (ESI) for Journal of Materials Chemistry C. This journal is The Royal Society of Chemistry 2015 Supplementary Information Fabrication of MoS 2 Thin Film Transistors via
More informationDevice Simulation of Grain Boundaries in Lightly Doped Polysilicon Films and Analysis of Dependence on Defect Density
Jpn. J. Appl. Phys. Vol. 40 (2001) pp. 49 53 Part 1, No. 1, January 2001 c 2001 The Japan Society of Applied Physics Device Simulation of Grain Boundaries in Lightly Doped Polysilicon Films and Analysis
More informationFully-integrated, Bezel-less Transistor Arrays Using Reversibly Foldable Interconnects and Stretchable Origami Substrates
Electronic Supplementary Material (ESI) for Nanoscale. This journal is The Royal Society of Chemistry 2016 Fully-integrated, Bezel-less Transistor Arrays Using Reversibly Foldable Interconnects and Stretchable
More informationCharacterization and control of defect states of polycrystalline silicon thin film transistor fabricated by laser crystallization
Journal of Non-Crystalline Solids 299 302 (2002) 1321 1325 www.elsevier.com/locate/jnoncrysol Characterization and control of defect states of polycrystalline silicon thin film transistor fabricated by
More informationSoft-lithography for preparing patterned liquid crystal orientations
Soft-lithography for preparing patterned liquid crystal orientations Hak-Rin Kim 1, Jong-Wook Jung 2, Min-Soo Shin 2, Myung-Eun Kim 2, You-Jin Lee 2, and Jae-Hoon Kim 1,2,3 * 1 Research of Institue Display,
More informationDEPOSITION AND CHARACTERISTICS OF TANTALUM NITRIDE FILMS BY PLASMA ASSISTED ATOMIC LAYER DEPOSITION AS CU DIFFUSION BARRIER
Mat. Res. Soc. Symp. Proc. Vol. 766 2003 Materials Research Society E3.22.1 DEPOSITION AND CHARACTERISTICS OF TANTALUM NITRIDE FILMS BY PLASMA ASSISTED ATOMIC LAYER DEPOSITION AS CU DIFFUSION BARRIER Kyoung-Il
More informationP-type and N-type multi-gate polycrystalline silicon vertical thin film. transistors based on low-temperature technology
Author manuscript, published in "Solid-State Electronics 86 (2013) 1-5" DOI : 10.1016/j.sse.2013.04.021 P-type and N-type multi-gate polycrystalline silicon vertical thin film transistors based on low-temperature
More informationX-Ray Reflectivity Study of Hafnium Silicate Thin Films Prepared by Thermal Chemical Vapor Deposition
X-Ray Reflectivity Study of Hafnium Silicate Thin Films Prepared by Thermal Chemical Vapor Deposition Hideyuki YAMAZAKI, Advanced LSI Technology Laboratory, Toshiba Corporation hideyuki.yamazaki@toshiba.co.jp
More informationLecture 22: Integrated circuit fabrication
Lecture 22: Integrated circuit fabrication Contents 1 Introduction 1 2 Layering 4 3 Patterning 7 4 Doping 8 4.1 Thermal diffusion......................... 10 4.2 Ion implantation.........................
More informationSUPPLEMENTARY INFORMATIONS
SUPPLEMENTARY INFORMATIONS Dynamic Evolution of Conducting Nanofilament in Resistive Switching Memories Jui-Yuan Chen, Cheng-Lun Hsin,,, Chun-Wei Huang, Chung-Hua Chiu, Yu-Ting Huang, Su-Jien Lin, Wen-Wei
More informationSimulation study on the active layer thickness and the interface of a-igzo-tft with double active layers
Front. Optoelectron. 2015, 8(4): 445 450 DOI 10.1007/s12200-014-0451-1 RESEARCH ARTICLE Simulation study on the active layer thickness and the interface of a-igzo-tft with double active layers Xiaoyue
More informationFocused helium-ion beam irradiation effects on electrical transport
Supporting Information Focused helium-ion beam irradiation effects on electrical transport properties of few-layer WSe2: enabling nanoscale direct write homojunctions Michael G. Stanford 1, Pushpa Raj
More informationEffects of Moisture on Pentacene Field-Effect Transistors with Polyvinylpyrrolidone Gate Insulator
Mol. Cryst. Liq. Cryst., Vol. 531: pp. 14=[314] 20=[320], 2010 Copyright # Taylor & Francis Group, LLC ISSN: 1542-1406 print=1563-5287 online DOI: 10.1080/15421406.2010.495928 Effects of Moisture on Pentacene
More informationLarge-Grain Polysilicon Films with Low Intragranular Defect Density by Low- Temperature Solid-Phase Crystallization
Mat. Res. Soc. Symp. Proc. Vol. 715 2002 Materials Research Society Large-Grain Polysilicon Films with Low Intragranular Defect Density by Low- Temperature Solid-Phase Crystallization Xiang-Zheng Bo, Nan
More informationActivation Behavior of Boron and Phosphorus Atoms Implanted in Polycrystalline Silicon Films by Heat Treatment at 250 C
Japanese Journal of Applied Physics Vol. 44, No. 3, 2005, pp. 1186 1191 #2005 The Japan Society of Applied Physics Activation Behavior of Boron and Phosphorus Atoms Implanted in Polycrystalline Silicon
More informationSummary and Scope for further study
Chapter 6 Summary and Scope for further study 6.1 Summary of the present study Transparent electronics is an emerging science and technology field concentrated on fabricating invisible electronic circuits
More informationtion band derived electrons. Achieving high performance p-type oxide TFTswilldefinitelypromoteaneweraforelectronicsinrigidandflexible substrate away
Preface Thin film transistor (TFT) is a combination of thin films necessary to create the function of a transistor. It consists of a thin film of a semiconducting material which forms the conducting channel
More informationCURRICULUM VITAE. Moon Hyung Jang
CURRICULUM VITAE Moon Hyung Jang Institute of Physics and Applied Physics, Yonsei University 134 Sinchon-dong, Seodaemoon-Gu, Seoul 120-749, KOREA Tel : 82-10-9822-7246, Fax : 82-2-392-1592 E-mail : ppicsari@yonsei.ac.kr
More informationMicroelectronics. Integrated circuits. Introduction to the IC technology M.Rencz 11 September, Expected decrease in line width
Microelectronics Introduction to the IC technology M.Rencz 11 September, 2002 9/16/02 1/37 Integrated circuits Development is controlled by the roadmaps. Self-fulfilling predictions for the tendencies
More informationHigh Image Quality Panel Technology - Ion Beam Alignment
High Image Quality Panel Technology - Ion Beam Alignment SUZUKI Teruaki, MATSUSHIMA Jin, SASAKI Yoichi Abstract In the conventional process of LCD panel fabrication, glass substrates are rubbed by a buffing
More informationTHERE is considerable interest in adapting amorphous
IEEE TRANSACTIONS ON ELECTRON DEVICES, VOL. 61, NO. 4, APRIL 2014 1109 Electrical Instability of Double-Gate a-igzo TFTs With Metal Source/Drain Recessed Electrodes Gwanghyeon Baek, Linsen Bie, Katsumi
More informationEffect of grain size on the mobility and transfer characteristics of polysilicon thin-film transistors
Indian Journal of Pure & Applied Physics Vol. 42, July 2004, pp 528-532 Effect of grain size on the mobility and transfer characteristics of polysilicon thin-film transistors Navneet Gupta* & B P Tyagi**
More informationSilicon germanium photo-blocking layers for a-igzo based industrial display
www.nature.com/scientificreports Received: 8 June 2018 Accepted: 23 October 2018 Published: xx xx xxxx OPEN Silicon germanium photo-blocking layers for a-igzo based industrial display Su Hyoung Kang 1,
More informationDespina C Moschou. National and Kapodistrian University of Athens, Department of Informatics and Telecommunications
Fabrication technology development of thin film transistors optimized with respect to the structure of the silicon films that results from the crystallization process Despina C Moschou National and Kapodistrian
More informationSupporting Information
Supporting Information Performance Enhancement of Silicon Alloy-based Anodes using Thermally Treated Poly(amide imide) as a Polymer Binder for High Performance Lithium-Ion Batteries Hwi Soo Yang, Sang-Hyung
More informationExcimer Laser Annealing of Hydrogen Modulation Doped a-si Film
Materials Transactions, Vol. 48, No. 5 (27) pp. 975 to 979 #27 The Japan Institute of Metals Excimer Laser Annealing of Hydrogen Modulation Doped a-si Film Akira Heya 1, Naoto Matsuo 1, Tadashi Serikawa
More informationBiosensor System-on-a-chip including CMOS-based Signal Processors and 64 Carbon Nanotube-based Sensors for the Detection of a Neurotransmitter
Biosensor System-on-a-chip including CMOS-based Signal Processors and 64 Carbon Nanotube-based Sensors for the Detection of a Neurotransmitter Supplementary Information Byung Yang Lee, Sung Min Seo, Dong
More informationDevelopment and modeling of a low temperature thin-film CMOS on glass
Rochester Institute of Technology RIT Scholar Works Theses Thesis/Dissertation Collections 2-6-2009 Development and modeling of a low temperature thin-film CMOS on glass Robert G. Manley Follow this and
More informationTECHNOLOGY, PERFORMANCE AND DEGRADATION CHARACTERISTICS OF SLS ELA THIN FILM TRANSISTORS
FACTA UNIVERSITATIS Series: Electronics and Energetics Vol. 26, N o 3, December 2013, pp. 247-280 DOI: 10.2298/FUEE1303247M TECHNOLOGY, PERFORMANCE AND DEGRADATION CHARACTERISTICS OF SLS ELA THIN FILM
More informationEffects of post-metallization annealing of high-k dielectric thin films grown by MOMBE
Microelectronic Engineering 77 (2005) 48 54 www.elsevier.com/locate/mee Effects of post-metallization annealing of high-k dielectric thin films grown by MOMBE Minseong Yun a, Myoung-Seok Kim a, Young-Don
More informationChapter 1. Introduction. 1-1 Overview of polysilicon thin-film transistor technology
Chapter 1 Introduction 1-1 Overview of polysilicon thin-film transistor technology In recent years, polycrystalline silicon thin-film transistors (poly-si TFTs) have much attention because of their widely
More informationCharacteristics of Hafnium-Aluminum-Oxide Thin Films Deposited by Using Atomic Layer Deposition with Various Aluminum Compositions
Journal of the Korean Physical Society, Vol. 47, No. 3, September 2005, pp. 501 507 Characteristics of Hafnium-Aluminum-Oxide Thin Films Deposited by Using Atomic Layer Deposition with Various Aluminum
More informationSuperlateral Growth of Silicon by Artificially Designed Spatial Intensity Laser Beam Profile
J192 0013-4651/2009/156 7 /J192/7/$25.00 The Electrochemical Society Superlateral Growth of Silicon by Artificially Designed Spatial Intensity Laser Beam Profile Eok Su Kim and Ki-Bum Kim*,z Department
More informationEncapsulation of Indium-Gallium-Zinc Oxide Thin Film Transistors
Encapsulation of Indium-Gallium-Zinc Oxide Thin Film Transistors Encapsulation Layer Al gate Source IGZO Gate Drain Si JULIA OKVATH HIRSCHMAN RESEARCH GROUP @ RIT MAY 9, 2017 Outline Brief Introduction
More informationIn 1966, the first polycrystalline silicon thin-film transistors (poly-si TFTs) were
Chapter 1 Introduction In 1966, the first polycrystalline silicon thin-film transistors (poly-si TFTs) were fabricated by C. H. Fa et al. [1.1]. Since then, many investigations have been devoted to the
More informationHigh-efficiency GaN-based light-emitting diodes fabricated with identical Ag contact formed on both n- and p-layers
High-efficiency GaN-based light-emitting diodes fabricated with identical Ag contact formed on both n- and p-layers Munsik Oh and Hyunsoo Kim * School of Semiconductor and Chemical Engineering and Semiconductor
More informationInstructor: Dr. M. Razaghi. Silicon Oxidation
SILICON OXIDATION Silicon Oxidation Many different kinds of thin films are used to fabricate discrete devices and integrated circuits. Including: Thermal oxides Dielectric layers Polycrystalline silicon
More informationThe Effect of Heat Treatment on Ni/Au Ohmic Contacts to p-type GaN
Li-Chien Chen et al.: The Effect of Heat Treatment on Ni/Au Ohmic Contacts 773 phys. stat. sol. (a) 176, 773 (1999) Subject classification: 73.40.Cg; S7.14 The Effect of Heat Treatment on Ni/Au Ohmic Contacts
More informationHigh Sensitivity and Low Power Consumption Gas Sensor Using MEMS Technology and Thick Sensing Film
Journal of the Korean Physical Society, Vol. 45, No. 5, November 2004, pp. 1205 1209 High Sensitivity and Low Power Consumption Gas Sensor Using MEMS Technology and Thick Sensing Film Nak-Jin Choi, Jun-Hyuk
More informationChapter 3 Silicon Device Fabrication Technology
Chapter 3 Silicon Device Fabrication Technology Over 10 15 transistors (or 100,000 for every person in the world) are manufactured every year. VLSI (Very Large Scale Integration) ULSI (Ultra Large Scale
More informationCrystalline Silicon Solar Cells With Two Different Metals. Toshiyuki Sameshima*, Kazuya Kogure, and Masahiko Hasumi
Crystalline Silicon Solar Cells With Two Different Metals Toshiyuki Sameshima*, Kazuya Kogure, and Masahiko Hasumi Tokyo University of Agriculture and Technology, 2-24-16 Naka-cho, Koganei, Tokyo 184-8588,
More informationResponse surface optimization for high-performance solid-phase crystallized silicon-germanium thin film transistors
Response surface optimization for high-performance solid-phase crystallized silicon-germanium thin film transistors Vivek Subramanian a, Krishna Saraswat a, Howard Hovagimian b, and John Mehlhaff b a Electrical
More informationDesign of Integrated Light Guiding Plates Using Silicon-based Micro-Features
Design of Integrated Light Guiding Plates Using Silicon-based Micro-Features Jyh-Cheng Yu*, Shao-Tang Zhangjian, and Zong-Nan Chen Abstract-- This study addresses the design of an integrated light guide
More informationSupporting Information
Electronic Supplementary Material (ESI) for Nanoscale. This journal is The Royal Society of Chemistry 2018 Supporting Information High performance electronic devices based on nanofibers via crosslinking
More informationSupporting Information
Supporting Information Epitaxial Synthesis of Molybdenum Carbide and Formation of a Mo 2 C/MoS 2 Hybrid Structure via Chemical Conversion of Molybdenum Disulfide Jaeho Jeon, Yereum Park, Seunghyuk Choi,
More informationENS 06 Paris, France, December 2006
CARBON NANOTUBE ARRAY VIAS FOR INTERCONNECT APPLICATIONS Jyh-Hua ng 1, Ching-Chieh Chiu 2, Fuang-Yuan Huang 2 1 National Nano Device Laboratories, No.26, Prosperity Road I, Science-Based Industrial Park,
More informationDefense Technical Information Center Compilation Part Notice
UNCLASSIFIED Defense Technical Information Center Compilation Part Notice ADPO 11302 TITLE: A Novel Device Structure for Low-Temperature Polysilicon TFTs With Controlled Gain Growth in Channel Regions
More informationTokyo Tech Professor Hideo Hosono s story of IGZO TFT development features in Nature Electronics
PRESS RELEASE Sources: Tokyo Institute of Technology For immediate release: July 25, 2018 Tokyo Tech Professor Hideo Hosono s story of IGZO TFT development features in Nature Electronics (Tokyo, July 25)
More informationMicrostructure and Vacuum Leak Characteristics of SiC coating Layer by Three Different Deposition Methods
Microstructure and Vacuum Leak Characteristics of SiC coating Layer by Three Different Deposition Methods Y. Kim Professor, Department of Materials Science and Engineering, College of Engineering, Kyonggi
More informationSupporting Information. Flexible, Low-Power Thin-Film Transistors (TFTs) Made of Vapor-Phase. Synthesized High-k, Ultrathin Polymer Gate Dielectrics
Supporting Information Flexible, Low-Power Thin-Film Transistors (TFTs) Made of Vapor-Phase Synthesized High-k, Ultrathin Polymer Gate Dielectrics Junhwan Choi, Munkyu Joo, Hyejeong Seong, Kwanyong Pak,
More information