The Relation of Temperature Distribution on Silicon Wafer with Furnace Temperature and Gas Flow During Thermal Dry Oxidation Process

Transcription

1 The Relation of Temperature Distribution on Silicon Wafer with Furnace Temperature and Gas Flow During Thermal Dry Oxidation Process A.H. Azman 1, a *, S. Norhafiezah 2, b, RM Ayub 3, c, M. K. Md Arshad 4, d, M.F.M. Fathil 5, e, M.Z. Kamarudin 6, f, M. Nurfaiz 7, g, M.A. Farehanim 8, h, U. Hashim 9, i, M. Nuzaihan M.N. 10,j, A.Wesam Al-Mufti 11,k Institute of Nano Electronic Engineering, University Malaysia Perlis (UniMAP) Kangar, Perlis, Malaysia. a azmanhassan88@gmail.com, b mizfyza@gmail.com, c ramzan@unimap.edu.my, d mohd.khairuddin@unimap.edu.my, e faris.fathil@yahoo.com, f zak_qe@yahoo.com, g mohdnurfaiz90@yahoo.com, h farehanim88@gmail.com, i uda@unimap.edu.my, j m.nuzaihan@unimap.edu.my, k mohamenw@gmail.com Keywords: Dry thermal oxidation, uniformity, oxidation furnace, ultra-thin oxide. Abstract. Silicon dioxide film has been used as the gate dielectric material in MOS device technology for decades. The film is normally grown in a diffusion furnace using a dry thermal oxidation process. As the device is scaled down to nanometer dimensions, the SiO2 film uniformity requirement is more stringent than ever. In this paper, the effect of furnace temperature and the flow rate of oxygen gas on wafer temperature distribution was investigated. The result was recorded by using the Infrared Thermometer with Dual Laser Targeting device (IRT5000). We have found that the uniformity of temperature distribution on the wafer is almost directly proportional to the O2 flow rate for the entire furnace temperature range ( ⁰C). On the other hand, the effect of O2 flow rate on wafer temperature distributions clearly shows two distinct regions; for furnace temperatures of less than 1000 ⁰C, the higher the O2 flow rate, the better the uniformity. For the furnace temperatures of more than 1000 ⁰C, we did not observe any clear dependency of wafer temperature distribution on O2 flow rate. Introduction For decade, research and development for the MOS semiconductor industry were focused on enhancing performance and reducing cost for using the SiO2 as the gate dielectric. Thinner and thinner oxide layer requires for sub-nano MOS device since the oxide plays an active role and its electrical quality should be preserved [1]. One major trend in the semiconductor industry is to shrivel the device dimensions and scale down the gate dielectric [2]. The gate dielectric or the SiO2 film must be scaled down to sub-nano range to get the result for fabricating more device per wafer (i.e., increase the device density) and thus reducing the cost per chip [3]. By scaling the gate dielectric enhance the drive current and reduce the short channel effect due to scaling the gate length. However, to obtain the ultra-thin SiO2 film is a hard to get. The SiO2 becomes more stringent than ever. The uniformity of this SiO2 film is a major problem for growing a sub-nano gate dielectric. The temperature is the main aspect that plays a key role to get a good uniformity gate dielectric layer. Dry oxidation only uses the pure oxygen gas as the oxidation gas not like the wet oxidation that use the pyrogenic steam. This dry oxidation is used because dry oxidation produces more uniform and denser thermal oxide with even higher electric strength. The dry oxidation growth rate is slower than the wet oxidation. For that reason the dry oxidation were primarily used to grow a thin gate dielectric layer [4]. Basically the deal-grove model are used to calculate the growth of the oxide layer on the silicon wafer surface. But for the thin film oxidation, there is a rapid and non-linear

2 oxide growth in the initial stage of the dry oxidation as presented in figure 1. The weakness of the deal-grove model is the impossibility to predict the initial stage of the dry oxidation growth [5]. Figure 1 Rapid, non-linear growth rate in the initial stage of dry oxidation. Experimental Detail Starting material. In order to investigate and measure the relation of temperature distribution on the silicon wafer with furnace temperature and gas flow during thermal dry oxidation process. Silicon oriented wafer with p-type (100), 4-inch wafers and resistivity between 1-20 Ohmcm range use in this experiment. Wafer then cleans by rca1, rca2 and BOE procedure to remove the organic residues, metal ions and the native oxide on the silicon wafer surface [6,7]. Equipment. The PID-controlled, three-zone horizontal quartz tube furnace (MDL 906 MODULAB) designed to accommodate 4-inch wafers in quartz wafer boats were set up together with 4 sets of temperature (900 C, 950 C, 1000 C and 1050 C) and 3 set of gas flow rate (5slm, 10slm and 15slm). It has a maximum operating temperature of 1200 C at which temperature it consumes approximately 8 kw. It has an associated gas supply system with two flow meters, One for high-purity oxygen and one for high-purity nitrogen. The system have been plumbed so that the furnace can be purged with nitrogen while the unit is heating to operating temperature, and then can flow either dry or wet oxygen under controlled conditions. The wafer was being recorded by using the Infrared Thermometer with Dual Laser Targeting device (IRT5000). Temperature Measurement. For this experiment, the dry oxidation process was being carried out to get temperature distribution started by ramp up the temperature and set the gas flow rate as in table 1. The IRT5000 was being shot at five points as in figure 1 on the wafer surface to get the temperature distribution result, based on the dual laser targeting as the pointing point. This experiment been carried out and continue with varied the 3 set of gas flow rate rate (5slm, 10slm and 15slm) and also varied the thermal oxidation furnace temperature for (900 C, 950 C, 1000 C and 1050 C) as in table 1. Table 1 - Temperature distribution process parameters. Furnace temperature ( C) Oxygen gas flow rate (slm)

3 Figure 2- Temperature distribution point and wafer position in the quartz boat on the silicon wafer surface. Result and Discussion The effect of temperature on the non-uniformity/standard deviation. In figure 3 shows the effect of temperature on the standard deviation result for this experiment. It shows the relation between the temperature over the uniformity of the temperature distribution on the wafer surface. The result shows that they are two distinct regions for this experiment. Below 1000 C region there is more uniformity than the other region at 1000 C and above. Above 1000 C region they are no trend and significant effect that can be observed for a clear dependency for that region. In theory, a higher temperature will get a better uniformity, but for this experiment for thin gate oxide shows that the temperature distribution on the wafer surface clearly not depend only on the temperature. The average or a good temperature for this thin dry oxidation are the main aspect to get a better uniform temperature distribution and also to get a high quality thin oxide. The best temperature distribution uniformity is at the 900 C were at this temperature the furnace temperature contact directly to the wafer surface and contribute the temperature distribution uniformly. The effect of gas flow on the non-uniformity/standard deviation. The standard deviation or the non-uniformity for the thermal dry oxidation were calculated to see the effect of the O2 gas flow over the furnace temperature. Figure 4, show the result of the furnace temperature range from 900 C C with O2 gas flow. Oxygen gas rate was divided into three states that is the 5slm-Low gas rate, 10slm-Medium gas rate and 15slm-High gas rate. Based on experiment result obtain, it can be observed that the effect of O2 flow rate toward the thermal dry oxidation process clearly shows two distinct regions; for furnace temperatures of less than 1000 C, the higher the O2 flow rate, the better the uniformity. As the temperature increase the standard deviation was decreasing. These standard deviation is the non-uniformity data, smaller the standard deviation is better uniformity, but at the temperature 1000 C and above, then there was no significant effect and did not observe any clear dependency of wafer temperature distribution on O2 flow rate.

4 Standad deviation slm 10slm 15slm 2 temp 900 C temp 950 C temp 1000 C temp 1050 C temperature C Figure 3- The effect of different thermal dry oxidation temperature process on standard deviation on the silicon wafer. Standard deviation temp 1050 C temp 1000 C temp 950 C temp 900 C 5slm 10slm 15slm Gas flow rate Figure 4 The effect of gas flow on the standard deviation on the silicon at a certain temperature range. Temperature distribution for silicon wafer. For this study the temperature distribution of the silicon wafer changes proportional to the rate of oxygen (O2) gas flow in the thermal dry oxidation process. In figure 5, at 1050 C thermal furnace temperature shows the effect when the gas is being flow at a three level of gas rate (Low-5slm, Medium-10slm, High-15slm). In the figure also show the setup temperature of the thermal furnace was 1050 C but the temperature that have been recorded was not exactly as the setup temperature. The temperature was dropping about 10% of the setup temperature. This verdict is because of the thermal oxidation furnace temperature in the quartz oxidation tube that could not get as the desire temperature and also the temperature were dropped as the wafer are being placed in the quartz boat. The quartz boat is its unusually high thermal shock resistance and also effected the wafer that being held in the boat. For the three gas flow rate, it shows slightly different temperature results on the wafer surface. The temperature was increased proportional to the gas flow rate. As can be seen in the figure 5, Major temperature drop is at the point 2 where the point 2 is below the wafer as in figure 2 and near to the quartz boat. The temperature drop in point 2 mainly because temperature for that particular point was not being directly contacted with the temperature due to the position of the wafer that was located below and near to the quartz boat that block the temperature to reach at the point Temperature ( C) slm 10slm 15slm Conclusion Point on Silicon Wafer surface Figure 5- Temperature distribution on silicon wafer substrate at 1050 C furnace temperature. As conclusion for this experiment, the best temperature for a good uniformity temperature distribution are at 900 C where at this rate the temperature is not to high to contact at the wafer surface thus giving it a better direct contact to the wafer surface. The oxygen gas rate also have contribute to a better uniform temperature distribution. This is because the oxygen gas rate is react with the temperature to give it a good igniton to the temperature. The higher the oxygen gas rate,

5 more dandy the temperature ignition thus furnish a uniform temperature distribution on the silicon wafer. Acknowledgement The author would like to thank the Department of Higher Education, Ministry of Higher Education, (KPT) for funding this research through the Fundamental Research Grant Scheme (FRGS) with the code number , titled The Study of Electron Tunneling through Single / Multiple Layer Dielectric Thin Film. References [1] L. Fonseca, F. Campabadal, B. Garrido, and J. Samitier, A reliability comparison of RTO and furnace thin SiO 2 layers : effect of the oxidation temperature, vol. 40, pp , [2] H. Tseng and D. Ph, The Progress and Challenges of Applying High-k / Metal-Gated Devices to Advanced CMOS Technologies, no. January [3] A. J. Bauer and E. P. Burte, 4 nm GATE DIELECTRICS PREPARED BY RTP LOW PRESSURE OXIDATION IN O 2 AND N 2 O ATMOSPHERE, vol. 38, no. 2, pp , [4] I. Process Specialties, Thermal oxide. [Online]. Available: [5] Ch. Hollauer, The Deal-Grove Model, Modeling of Thermal Oxidation and Stress Effects. [Online]. Available: [6] M. Bachman, RCA-1 Silicon Wafer Cleaning, [7] M. Bachman, RCA-2 Silicon Wafer Cleaning, 2002.