Renesas Electronics, 2 IBM at Albany Nanotech, 3 IBM T. J. Watson Research Center, 4 IBM Microelectronics, and 5 GLOBALFOUNDRIES

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1 Effective Cu Surface Pre-treatment for High-reliable 22nmnode Cu Dual Damascene Interconnects with High Plasma Resistant Ultra Low-k Dielectric (k=2.2) F. Ito 1, H. Shobha 2, M. Tagami 1, T. Nogami 2, S. Cohen 3, Y. Ostrovski 3, S. Molis 4, K. Maloney 4, J. Femiak 4, J. Protzman 4, T. Pinto 4, E. T. Ryan 5, A. Madan 4, C.-K. Hu 3, and T. Spooner 2 1 Renesas Electronics, 2 IBM at Albany Nanotech, 3 IBM T. J. Watson Research Center, 4 IBM Microelectronics, and 5 GLOBALFOUNDRIES Oct , AMC2010 in Albany 2010 Renesas Electronics Corporation. All rights reserved.

2 1. Introduction Outline Low-k damage induced by Cu surface treatment 2. Experimental High plasma resistant low-k film Cu surface treatment conditions 3. Results and Discussion Surface analysis (Low-k and Cu films) Interconnect performance and reliability 4. Conclusion Renesas Electronics Corporation. All rights reserved.

Cu surface pre-treatment Trade-off relation between reliability and low-k damages.

Low-k damage: RC performance degradation (k-value increase).

treatment 3) Cap deposition Optimization of pre-treatment with high plasma resistant

3 Cu surface pre-treatment Trade-off relation between reliability and low-k damages. Cu oxide removal: Reliability improvement (EM and SM). Low-k damage: RC performance degradation (k-value increase). Cu oxide NH3 pre-treatment Low-k k damage Cap Cu Cu Cu 1) After CMP 2) Cu surface treatment 3) Cap deposition Optimization of pre-treatment with high plasma resistant low-k film. Step-1: Surface analysis (low-k and Cu films) Step-2: 22nm-node DDI (RC performance and reliability) Renesas Electronics Corporation. All rights reserved.

4 1. Introduction Outline Low-k damage induced by Cu surface treatment 2. Experimental High plasma resistant low-k film NH3 plasma treatment conditions 3. Results and Discussion Surface analysis (Low-k and Cu films) Interconnect performance and reliability 4. Conclusion Renesas Electronics Corporation. All rights reserved.

5 High plasma resistant low-k k film PECVD PECVD and and UV UV cure cure process process Conventional (DEMS + Porogen) þ This work (DEMS + Porogen + Carbosilane) UV cure K-value Porosity (%) Pore diameter (nm) Carbon content (%) Density (g/cm3) Stress (MPa) Elastic modulus (GPa) High carbon content Low process damage C-bridging (Si-CH2-Si) Rigid skeleton Basic film properties PID (a.u.) Plasma induced damage (PID) Ar+O2 plasma Conventional (k=2.2) k=2.2 k=2.4 k=2.6 This work (k=2.2) Carbon content (%) High plasma resistant film (k=2.2) with high carbon content is promising for highly reliable Cu interconnects. Low damage Renesas Electronics Corporation. All rights reserved.

6 NH3 plasma treatment conditions Three types of NH3 plasma conditions RF Power (W) Pressure (Torr) Temp. ( o C) Time (sec) #1 (Low-power) #2 (High-power) #3 (High-power, Lowpressure) High power Low pressure 350 0~20 Step-1: Surface analysis (blanket) 1) 1) Low-k surface Low-k damage suppression 2) 2) Cu Cu surface Cu Oxide removal NH3 plasma NH3 plasma Damage Low-k Cu oxide Cu Optimized NH3 plasma Step-2: Low-k/Cu interconnect 22nm-node DDI structure with 80nm-pitch. RC performance Damage analysis Reliability (EM) Cu Renesas Electronics Corporation. All rights reserved.

7 1. Introduction Outline Low-k damage induced by Cu surface treatment 2. Experimental High plasma resistant low-k film NH3 plasma treatment conditions 3. Results and Discussion Low-k surface analysis (k-value, TOF-SIMS, XRR) Cu surface analysis (TOF-SIMS, Adhesion) Interconnect performance and reliability 4. Conclusion Renesas Electronics Corporation. All rights reserved.

NH3 plasma Damage High plasma resistant low-k film (high carbon) Al dot Low-k (k=2.2) Si-sub. Dielectric constant k-value increase Capacitance (k-value) K-value increase vs. treatment time 0.4 0.3 0.

8 NH3 plasma Damage High plasma resistant low-k film (high carbon) Al dot Low-k (k=2.2) Si-sub. Dielectric constant k-value increase Capacitance (k-value) K-value increase vs. treatment time #3 (550W, 1.6Torr) #1 (225W, 3Torr) #2 (550W, 3Torr) #3 (550W, 1.6Torr) #2 (550W, 3Torr) #1 (225W, 3Torr) Treatment time (sec) Condition #1 and #2 with high pressure and short time ( 5sec) were promising for low-k k damage suppression. Low damage Renesas Electronics Corporation. All rights reserved.

9 Damaged layer analysis (SIMS, XRR) TOF-SIMS depth profile XRR analysis (2-layer model) 10 1 Fitting curve Intensity 4 x High-power #2 #2 #2 (550W, 3Torr, 3Torr, 5sec) 5sec) Oxide like layer Low-k (k=2.2) C SiO Time Frmula Mass Color C SiN Si SiO Si Si / s Intensity (a.u.) Surface Bulk Thickness (nm) k-value (expected) Surface damaged region showed thin oxide like layer. Impact of surface damage bellow 5sec was relatively small High-power #2 #2(550W, 3Torr, 5sec) q (deg) Density (g/cm 3 ) Experimental data 2-layer model Surface Bulk + 1% Total k-value (estimated) Renesas Electronics Corporation. All rights reserved.

10 1. Introduction Outline Low-k damage induced by Cu surface treatment 2. Experimental High plasma resistant low-k film NH3 plasma treatment conditions 3. Results and Discussion Low-k surface analysis (k-value, TOF-SIMS, XRR) Cu surface analysis (TOF-SIMS, Adhesion) Interconnect performance and reliability 4. Conclusion Renesas Electronics Corporation. All rights reserved.

11 Oxygen concentration at Cap/Cu interface NH3 plasma Cu In-situ TOF-SIMS Cap Cu Oxygen Oxygen intensity at Cap/Cu interface 5 x10 Intensity TOF-SIMS Cap O Cu Frmula Mass Color C O SiN SiO Cu High-power #2 #2 (550W, 3Torr, 5sec) Oxygen intensity Cycle / N 1.2 #1 (225W, 3Torr) #2 (550W, 3Torr) #3 (550W, 1.6Torr) Oxygen Treatment time (sec) Oxygen concentration at Cap/Cu interface decreases. High power conditions are effective for Cu surface cleaning. Oxygen intensity (a.u.) W, 3Torr Cap Cu 225W, 3Torr 550W, 1.6Torr Cu cleaning Renesas Electronics Corporation. All rights reserved.

12 Adhesion strength at Cap/Cu interface Adhesion (J/m 2 ) 4 point bending #1 (225W, 3Torr) #2 (550W, 3Torr) #3 (550W, 1.6Torr) 550W, 1.6Torr Cap Treatment time (sec) Adhesion strength increases with pre-treatment time. Reducing oxygen increases adhesion at Cap/Cu interface Renesas Electronics Corporation. All rights reserved. Cu 550W, 3Torr 225W, 3Torr Adhesion High adhesion Adhesion (J/m 2 ) Adhesion vs. Oxygen conc Cap Cu #1 (225W, 3Torr) #2 (550W, 3Torr) #3 (550W, 1.6Torr) Cu cleaning Oxygen Adhesion High-adhesion Oxygen concentration (a.u.)

13 Optimization of NH3 plasma treatment Oxygen conc. at Cap/Cu (a.u.) Oxygen (Cap/Cu) vs. k-value W, 3Torr, 5sec #1 (225W, 3Torr) #2 (550W, 3Torr) #3 (550W, 1.6Torr) 550W, 1.6Torr k-value increase Low ULK damage 225W, 3Torr Cu cleaning Optimum condition #2 #2(550W, 3Torr, 5sec) Condition #2 (550W, 3Torr, 5sec) is well balanced condition from low-k k damage suppression and Cu surface cleaning Renesas Electronics Corporation. All rights reserved.

14 1. Introduction Outline Low-k damage induced by Cu surface treatment 2. Experimental High plasma resistant low-k film NH3 plasma treatment conditions 3. Results and Discussion Low-k surface analysis (k-value, TOF-SIMS, XRR) Cu surface analysis (TOF-SIMS, Adhesion) Interconnect performance and reliability 4. Conclusion Renesas Electronics Corporation. All rights reserved.

TEM image of 22nm-node Low-k/Cu interconnect 50nm Bilayer cap (SiC/SiCN) Barrier metal (Ta/TaN) 80nm L/S=40/40nm RC performance M3 M2 M1 Optimized Cu surface treatment Plasma resistant low-k film

15 TEM image of 22nm-node Low-k/Cu interconnect 50nm Bilayer cap (SiC/SiCN) Barrier metal (Ta/TaN) 80nm L/S=40/40nm RC performance M3 M2 M1 Optimized Cu surface treatment Plasma resistant low-k film (k=2.2) RC changes vs. treatment time 16 M2 RC change (%) High-power #2 #2(550W, 3Torr, 5sec) 6.5x sec 2sec 4.0x Treatment time (sec) RC product was almost stable bellow 5sec using optimized treatment condition #2 (550W, 3Torr). M2 capacitance 6.0x x x x10-10 M2 resistance 5sec 10sec 20sec Renesas Electronics Corporation. All rights reserved.

Damaged layer thickness (nm) Plasma damage analysis (DHF-dip) 40 30 20 10 Damaged layer thickness 0 Condition #2, 20sec After DHF-dip Damaged layer 0 5 10 15 20 This work (High-carbon) ULK/Cu line

16 Damaged layer thickness (nm) Plasma damage analysis (DHF-dip) Damaged layer thickness 0 Condition #2, 20sec After DHF-dip Damaged layer This work (High-carbon) ULK/Cu line (DHF-dip) Blanket (DHF-dip) Blanket (XRR) Coventional (Low-carbon) Blanket (DHF-dip) Blanket (DHF-dip) Treatment time (sec) Conventional (Low carbon) This work (High carbon) M2 RC change (%) Simulation of RC changes Experiment Simulation (damage layer_k=4) Simulation Experiment Similar behavior Treatment time (sec) Plasma damage can be effectively suppressed by plasma resistant low-k k film and optimized NH3 treatment condition ( ( 5sec) M3 M2 M1 k=2.2 Damaged layer (k=4.0) Renesas Electronics Corporation. All rights reserved.

17 Reliability (EM) Cumulative probability (%) EM performance NH3 plasma 0sec 5sec 18sec 0sec X5 5sec 18sec High-power #2 #2 (550W, 3Torr, 3Torr) 5sec) Lifetime (a.u.) RC EM (t50) Adhesion EM life time at t50 M2 RC change (%) Adhesion strength of Cap/Cu interface (J/m2) X5 EM lifetime at t50 V1 M Treatment time (sec) Optimized pre-treatment (5sec) improved EM lifetime by 5 times without RC increase Renesas Electronics Corporation. All rights reserved.

18 Conclusion Effects of NH3 pre-treatment on low-k damage and Cu surface cleaning were systematically investigated. þ Low-k and Cu surface analysis High carbon content low-k film is promising for high plasma damage resistance. Effective pre-treatment condition with well balance between low-k damage reduction and Cu surface cleaning. þ Low-k/Cu Interconnect for 22nm-node High performance and high reliable interconnects were successfully demonstrated using high plasma resistant low-k film and optimized NH3 pre-treatment Renesas Electronics Corporation. All rights reserved.

19 Acknowledgement This work was performed by the Research Alliance Teams at various IBM Research and Development Facilities. Renesas Electronics Corporation 2010 Renesas Electronics Corporation. All rights reserved.

Overview of Dual Damascene Cu/Low-k Interconnect

ERC Retreat Stanford: New Chemistries & Tools for scco 2 Processing of Thin Films Overview of Dual Damascene Cu/Low-k Interconnect P. Josh Wolf 1,4 - Program Manager, Interconnect Div. josh.wolf@sematech.org