How To Write A Flowchart

Transcription

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2 Learning Objectives To learn how you transfer a device concept into a process flow to fabricate the device in the EKL labs You learn the different components that makes up a flowchart; process blocks, process modules and process steps you learn to match a concept process flow to process blocks, modules and steps 2

3 How to write a flowchart 1. Introduction 2. Flowchart elements: process blocks, modules and steps 3. Making a flowchart 4

4 How to write a flowchart 1. Introduction 2. Flowchart elements: process blocks, modules and steps 3. Making a flowchart 5

5 Flowcharts: An industrial approach to specify a production process Cement Manufacturing Process Simplified Flow Chart Source: 6

6 How can we turn a piece of semiconductor material into an integrated circuit? Interconnect Components of an integrated circuit Transistors Conductor Isolator Doped silicon to form p-n junctions Silicon substrate Semiconductor 7

7 How can we turn a piece of silicon into an integrated circuit? Components of an integrated circuit Silicon with p-n junctions 2. Silicon dioxide as isolator 3. Aluminium as conductor 1 All components of an circuit integrated in a small area 8

8 How can we turn a piece of silicon into an integrated circuit? Start wit a pure semiconductor. 2. Add different kind of atoms through the SURFACE into the semiconductor to change the electronic properties in specific PATTERNS. 3. Isolate the SURFACE of the semiconductor with a insulating THIN FILM. 4. Apply a THIN FILM of metal on the SURFACE, PATTERN this film to connect the different areas of the semiconductor. 9

9 How can we turn a piece of silicon into an integrated circuit? 10

10 IC fabrication characteristics; 1 - planar technology Thin film deposition Oxidation of silicon SURFACE Si + O 2 -> SiO 2 Deposition Electro plating SURFACE reactions from the gas phase LPCVD, PECVD or sputtering (PVD) Electro chemical deposition on the SURFACE Doping Ion implantation Ions implanted via the SURFACE Diffusion Dopant diffusion via the SURFACE Lithography Coat photoresist Apply a thin photosensitive film on the SURFACE Align and Expose Develop Align on markers on the SURFACE and expose the SURFACE Dissolve exposed photoresist from the SURFACE Etch wet Dissolve reaction products from the SURFACE dry Evaporate reaction products from the SURFACE 11

11 IC fabrication characteristics; 1 - planar technology Device area Production area 450 mm 300 mm Small devices on a large production area. 250 µm The planar surface of a silicon wafer is processed in a sequence of process steps that result in a large number of devices on the wafer surface. 100 mm 200 mm 12

12 IC fabrication characteristics; 1 - planar technology Device area Production area 13

13 IC fabrication characteristics; 2 parallel processing Device area Production area 14

14 IC manufacturing: a precisely defined sequence of process modules Production area Process module #1 Process module #2 Process module #3 Process module #4 Process module #5 The set of process modules is called a flowchart: Compare it with a cookbook 15

15 Process flow How to cook an integrated circuit Flowchart STARTING MATERIAL COATING AND BAKING wafer ALIGNMENT AND EXPOSURE: Alignment makers wafer WRITE WAFER ID wafer DEVELOPMENT wafer INSPECTION: LINEWIDTH AND OVERLAY wafer DRY ETCHING: URK_NPD wafer RHOTORESIST REMOVAL: Tepla wafer CLEANING PROCEDURE: HNO3 100% and 65% (Si) wafer DRY OXIDATION: DIRT BARRIER wafer MEASUREMENT: OXIDE THICKNESS wafer COATING AND BAKING wafer ALIGNMENT AND EXPOSURE-NW wafer DEVELOPMENT wafer INSPECTION: LINEWIDTH AND OVERLAY wafer Phosporus IMPLANTATION: N-WELL wafer Phosporus IMPLANTATION: N-WELL wafer CLEANING PROCEDURE: Tepla + HNO3 100% and 65% (Si) wafer ANNEALING/NW-WELL DRIVE IN wafer MEASUREMENT: OXIDE THICKNES wafer OXIDE STRIPPING wafer CLEANING PROCEDURE: HNO3 100% and 65% (Si) wafer DRY OXIDATION: DIRT BARRIER wafer MEASUREMENT: OXIDE THICKNESS wafer COATING AND BAKING wafer ALIGNMENT AND EXPOSURE-SN wafer DEVELOPMENT wafer INSPECTION: LINEWIDTH AND OVERLAY wafer ARSENIC IMPLANTATION: NPN-EMITTER AND N-MOS SOURCE/DRAIN wafer CLEANING PROCEDURE: Tepla + HNO3 100% and 65% (Si) wafer COATING AND BAKING wafer ALIGNMENT AND EXPOSURE-SP wafer DEVELOPMENT wafer INSPECTION: LINEWIDTH AND OVERLAY wafer BORON IMPLANTATION: INTRINSIC BASE AND PMOS SOURCE/DRAIN EXTENSIONS wafer CLEANING PROCEDURE: Tepla + HNO3 100% and 65% (Si) wafer COATING AND BAKING wafer ALIGNMENT AND EXPOSURE wafer DEVELOPMENT wafer BORON IMPLANTATION: Vt ADJUST_BOTTOM HALF wafer CLEANING PROCEDURE: Tepla + HNO3 100% and 65% (Si) wafer COATING AND BAKING wafer ALIGNMENT AND EXPOSURE wafer DEVELOPMENT wafer BORON IMPLANTATION: Vt ADJUST_RIGHT HALF wafer CLEANING PROCEDURE: Tepla + HNO3 100% and 65% (Si) wafer ANNEAL / OXIDATION wafer MEASUREMENT: OXIDE THICKNESS wafer COATING AND BACKING wafer ALIGNMENT AND EXPOSURE - Oxide thickness adjust wafer DEVELOPMENT wafer INSPECTION: LINEWIDTH AND OVERLAY wafer WET WTCHING SiO2 wafer CLEANING PROCEDURE: Acetone + HNO3 100%(Si) wafer COATING AND BAKING wafer ALIGNMENT AND EXPOSURE-CO wafer DEVELOPMENT wafer INSPECTION: LINEWIDTH AND OVERLAY wafer WINDOW ETCHING wafer CLEANING PROCEDURE: Acetone + HNO3 100% and HNO3 65% (Si) wafer MARANGONI wafer FIRST METALLIZATION: SPUTTERING OF Al/Si wafer COATING AND BAKING wafer ALIGNMENT AND EXPOSURE-IC wafer DEVELOPMENT wafer INSPECTION: LINEWIDTH AND OVERLAY wafer WET ALUMINIUM ETCHING: 1 ST METAL wafer POLY SILICON DIP ETCHING wafer PLASMA ETCH ALUMINIUM: 1 st METAL wafer CLEANING PROCEDURE (after dry etching): Tepla wafer CLEANING PROCEDURE (after wet etching): Acetone wafer CLEANING PROCEDURE: HNO3 100% metal wafer ALLOYING wafer ELECTRICAL CHARACTERIZATION wafer

16 How to write a flowchart 1. Introduction 2. Flowchart elements: process blocks, modules and steps 3. Making a flowchart 17

17 Flowchart Hierarchy: Process blocks, modules and steps Definition process flowchart: A process flowchart is a connected sequence of process blocks, process modules and process steps to fabricate a device Definition process block: A process block is a connected sequence of process procedures and process steps which helps you to get the desired process target Definition process Module: A process procedure is a connected sequence of process steps to prepare the substrate(s) for the next process procedure or process step, or to terminate the process flow. Definition process step: A process step is a connected sequence of physical and/or chemical reactions used by a process tool to pattern, deposit, modify or remove materials 18

18 Flowchart Hierarchy: Process blocks, modules and steps Device level Device component level Tool level Physical / chemical process level 19

19 IC process flowcharts: example of a process block Flowchart Process block Process module Process steps Example: Process block NW 8. CLEANING : HNO3 100% and 65% (Si) 9. DRY OXIDATION: DIRT BARRIER 10. MEASUREMENT: OXIDE THICKNESS 11. COATING AND BAKING 12. ALIGNMENT AND EXPOSURE-NW 13. DEVELOPMENT 14. INSPECTION: LINEWIDTH AND OVERLAY 15. Phosporus IMPLANTATION: N-WELL 16. CLEANING : Tepla + HNO3 100% and 65% (Si) 17. ANNEALING/NW-WELL DRIVE IN 18. MEASUREMENT: OXIDE THICKNES 19. OXIDE STRIPPING 20

20 IC process flowcharts: example of a process block Flowchart Process block Process module Process steps Example: Process block NW 8. CLEANING : HNO3 100% and 65% (Si) 9. DRY OXIDATION: DIRT BARRIER 10. MEASUREMENT: OXIDE THICKNESS 11. COATING AND BAKING 12. ALIGNMENT AND EXPOSURE-NW 13. DEVELOPMENT 14. INSPECTION: LINEWIDTH AND OVERLAY 15. Phosporus IMPLANTATION: N-WELL 16. CLEANING : Tepla + HNO3 100% and 65% (Si) 17. ANNEALING/NW-WELL DRIVE IN 18. MEASUREMENT: OXIDE THICKNES 19. OXIDE STRIPPING 21

21 IC process flowcharts: example of a process module Flowchart Process block Process module Process steps Example: Process module: cleaning 16. CLEANING MODULE: Tepla + HNO3 100% and 65% (Si) Plasma strip Use the Tepla plasma system to remove the photoresist in an oxygen plasma. Follow the instructions specified for the Tepla stripper, and use the quartz carrier. Use program 4: 1000 watts power 15 minutes etching. Cleaning 10 minutes in fuming nitric acid (Merck: HNO3 100% selectipur)at ambient temperature. Use wet bench "HNO3 (100%)" and the carrier with the red dot. QDR Rinse in the Quick Dump Rinser with the standard program until the resistivity is 5 MΩ. Cleaning 10 minutes in concentrated nitric acid (Merck: HNO3 65% selectipur) at 110 C. Use wet bench HNO3 (65%) and the carrier with the red dot. QDR Rinse in the Quick Dump Rinser with the standard program until the resistivity is 5 MΩ. Drying Use the uprocess Avenger with the standard program, and the white carrier with a red dot. 22

22 IC process flowcharts: example of a process step Flowchart Process block Process module Process step Example: Process step: cleaning Cleaning 10 minutes in concentrated nitric acid (Merck: HNO3 65% selectipur) at 110 C. Use wet bench HNO3 (65%) and the carrier with the red dot. 23

23 IC process flowcharts: example of a process step Flowchart Process block Process module Process step Example: Process step: annealing/nw-well drive in Furnace no: A1 Program name: OA002 Total time: 415 min Program no: N5 PROCESS TEMPERATURE (in C) GASSES & FLOWS (in liter/min) TIME (in minutes) boat in 600 nitrogen: REMARKS stabilize 600 nitrogen: heat up +10 C/min nitrogen: oxygen: 0.3 stabilize 1150 nitrogen: oxygen: 0.3 drive-in 1150 nitrogen: oxygen: 0.3 cool down -5 C/min nitrogen: wait for operator boat out 600 nitrogen:

24 Process flow mapped on process equipment in the lab 5 patterning processes 73 process steps grouped into 8 process modules Cleaning, patterning, deposition, etching, inspection,.. 25

25 How to write a flowchart 1. Introduction 2. Flowchart elements: process blocks, modules and steps 3. Making a flowchart 26

26 Example: fabricate a metal thin film resistor on a silicon wafer Basic equation of a thin film resistor: RR = ρρ ttt LL WW Where: ρ = the resistivity of the conductive material th = film thickness L = length of the resistor W = width of the resistor What do we need? Electrical isolation of the surface On top of that: a thin conductive film (ρ, th) Pattern the thin film into a geometry (L, W) to obtain the right value for R 27

27 Example: fabricate a metal thin film resistor on a silicon wafer Basic equation of a thin film resistor: RR = ρρ ttt LL WW Design parameters Process parameters Where: ρ = the resistivity of the conductive material th = film thickness L = length of the resistor W = width of the resistor ρρ ttt Material properties Process tool settings Flowchart components The final result of a process = R Which depends on design and processing 28

28 Draft a layout Boundary conditions: RR = ρρ ttt LL WW = 100 Ω Max. footprint = 200 x 500 µm Two bondpads of 80x80 µm each (neglect the bondwire/bondpad resistance) CMOS compatible thin film resistor: ->material of choice is AlSi(1%) Estimated minimum reliable thickness for wirebonding is 200 nm Minimum line width is 5 µm LL = RR WW ttt ρρ = [cm] -> L = 0.38 cm 29

29 Visualise the process flow in cross sections Note that cartoon are applied to emphasize specific characteristics, therefore cross sections are usually NOT drawn to scale Dhr. Rutte, prime minister of the Netherlands 30

30 Visualise the process flow in cross sections Start material, specify the required substrate Thermal oxidation of silicon Deposit AlSi(1%) by sputtering Photolithography: coat resist, expose and develop Etch the AlSi(1%) Remove the photoresist 31

31 Translate the process flow in cross sections to process modules Process overview 1 STARTING MATERIAL 2 THERMAL OXIDATION 3 METALLIZATION: 200 nm Al (with 1% 350 C 4 COATING 5 ALIGNMENT AND EXPOSURE 6 DEVELOPING 7 PLASMA ETCHING: 200 nm Aluminium (sputtered at 350 C) 8 LAYER STRIPPING: Photoresist 32

32 Feedback from your supervisor/mentor Process overview 1 STARTING MATERIAL 2 THERMAL OXIDATION 3 METALLIZATION: 200 nm Al (with 1% 350 C 4 COATING 5 ALIGNMENT AND EXPOSURE 6 DEVELOPING 7 PLASMA ETCHING: 200 nm Aluminium (sputtered at 350 C) 8 LAYER STRIPPING: Photoresist Extra process blocks added, based on experience and way of working,. Process overview 1 STARTING MATERIAL 2 CLEANING: HNO3 99% and 69.5% 3 THERMAL OXIDATION 4 MEASUREMENT: Oxide thickness 5 METALLIZATION: 200 nm Al (with 1% 350 C 6 COATING 7 ALIGNMENT AND EXPOSURE 8 DEVELOPING 9 INSPECTION: Linewidth and overlay 10 PLASMA ETCHING: 200 nm Aluminium (sputtered at 350 C) 11 ALUMINIUM FENCE REMOVAL 12 LAYER STRIPPING: Photoresist 33

33 From process modules to flowchart Each process block represents a sequence of process modules and process steps Process module Process overview 1 STARTING MATERIAL 2 CLEANING: HNO3 99% and 69.5% 3 THERMAL OXIDATION 2 CLEANING: HNO3 99% and 69.5% Process step 4 MEASUREMENT: Oxide thickness 5 METALLIZATION: 200 nm Al (with 1% 350 Clean C 10 minutes in fuming nitric acid at ambient temperature. This will dissolve 6 COATING organic materials. 7 ALIGNMENT AND EXPOSURE Use wet bench "HNO3 99% (Si)" and the carrier with the red dot. 8 DEVELOPING Rinse Rinse in the Quick Dump Rinser with the standard program until the 9 INSPECTION: Linewidth and overlay resistivity is 5 MW. 10 PLASMA ETCHING: 200 nm Aluminium (sputtered Clean at C) minutes in concentrated nitric acid at 110 C. This will dissolve metal 11 ALUMINIUM FENCE REMOVAL particles. 12 LAYER STRIPPING: Photoresist Use wet bench HNO % 110C and the carrier with the red dot. Rinse Rinse in the Quick Dump Rinser with the standard program until the resistivity is 5 MW. Dry Use the Avenger Ultra pure-6 "rinser/dryer" with the standard program, and the white carrier with a red dot. Note The next step must be performed immediately after drying. 34

34 Flowchart peer review The whole flowchart is reviewed with your supervisor/mentor, special attention is given to avoid cross contamination 1. STARTING MATERIAL Use SINGLE SIDE polished LOW RESISTIVITY (LRES) wafers, with the following specifications: Type: p/b (p-type, boron) Orientation: <100> Resistivity: 2-5 Ωcm Thickness: 525 ± 15 µm Diameter: 100 mm 2. CLEANING: HNO3 99% and 69.5% Clean Rinse Clean Rinse Dry Note 10 minutes in fuming nitric acid at ambient temperature. This will dissolve organic materials. Use wet bench "HNO3 99% (Si)" and the carrier with the red dot. Rinse in the Quick Dump Rinser with the standard program until the resistivity is 5 MW. 10 minutes in concentrated nitric acid at 110 C. This will dissolve metal particles. Use wet bench HNO % 110C and the carrier with the red dot. Rinse in the Quick Dump Rinser with the standard program until the resistivity is 5 MW. Use the Avenger Ultra pure-6 "rinser/dryer" with the standard program, and the white carrier with a red dot. The next step must be performed immediately after drying. 3. MARKER OXIDATION Furnace tube: C1 or D1 Program name: MARKOXB Total time: min PROCESS TEMPERATURE GASSES & FLOWS TIME REMARKS (in C) (in liter/min) (in minutes) boat in 800 nitrogen: oxygen: 0.3 stabilize 800 nitrogen: oxygen: 0.3 heat up +10 C/min nitrogen: oxygen: 0.3 stabilize 1100 nitrogen: oxygen: 0.3 oxidation 1100 oxygen: hydrogen: 3.85 cool down -5 C/min nitrogen: wait for operator boat out 600 nitrogen: Note: The total process time can reduced in the "cool down" step: the be slightly "boat out" step can be started after ± 60 minutes, when the actual temperature of the furnace will be about 800 C. 4. MEASUREMENT: Oxide thickness Use the Leitz MPV-SP measurement system for layer thickness measurements. Follow the operating instructions from the manual when using this equipment. Program: Th. SiO2 on Si, >50nm auto5pts Oxide thickness: nm nm 5. METALLIZATION: 200 nm Al (with 1% 300 C Use the TRIKON SIGMA 204 sputter coater for the deposition of an aluminium metal layer on the wafers. The target must exist of 99% Al and 1% Si, and deposition must be done at 300 C with an Ar flow of 100 sccm. Follow the operating instructions from the manual when using this machine. Use recipe AlSi_200nm_300C to obtain a 200 nm thick layer. Visual inspection: the metal layer must look shiny. 6. CLEANING: HNO3 99% metal Clean Rinse Dry 10 minutes in fuming nitric acid at ambient temperature. This will dissolve organic materials. Use wet bench "HNO3 99% (metal)" and the carrier with a red and yellow dot. Rinse in the Quick Dump Rinser with the standard program until the resistivity is 5 MW. Use the Avenger Ultra pure-6 "rinser/dryer" with the standard program, and the white carrier with a black dot. Note Do not perform a "HNO3 69,5% 110C (Si)" cleaning step! 7. COATING Use the coater station of the EVG120 system to coat the wafers with photoresist. The process consists of: a treatment with HMDS (hexamethyldisilazane) vapor, with nitrogen as a carrier gas spin coating of Shipley SPR3012 positive resist, dispensed by a pump. The approximate spinspeed is 3450 rpm. a Soft Bake (SB) at 95 C for 90 seconds an automatic Edge Bead Removal (EBR) with a solvent Always check the relative humidity (48 ± 2 %) in the room before coating, and follow the instructions for this equipment. Use program "1-Co ,4µm". 8. ALIGNMENT AND EXPOSURE Processing will be performed on the ASML PAS5500/80 automatic wafer stepper. Follow the operating instructions from the manual when using this machine. Expose mask, with the correct litho job and exposure energy (check the energy list). 9. DEVELOPING Use the developer station of the EVG120 system to develop the wafers. The process consists of: a post-exposure bake at 115 C for 90 seconds developing with Shipley MF322 with a single puddle process a hard bake at 100 C for 90 seconds Always follow the instructions for this equipment. Use program "Dev - SP". 10. INSPECTION: Linewidth and overlay Visually inspect the wafers through a microscope, and check the line width and overlay. No resist residues are allowed. 11. PLASMA ETCHING: 675 nm Aluminium (sputtered at 350 C) Use the Trikon Wmega 201 plasma etcher. Follow the operating instructions from the manual when using this machine. It is not allowed to change the process conditions and times from the etch recipe! Use sequence AL06_350 (with a platen temperature of 25 ºC) to etch the aluminium layer. Process conditions from chamber recipe AL06_350: (use for µm Al sputtered at 350 C) Step Gasses & flows Pressure Platen RF ICP RF Platen temp. Etch time 1. breakthrough HBr/Cl2 = 40/30 sccm 5 mtorr 50 W 500 W 25 C endpoint 2. bulk etch HBr/Cl2 = 40/30 sccm 5 mtorr 40 W 500 W 25 C endpoint 3. overetch HBr/Cl2 = 30/15 sccm 5 mtorr 40 W 500 W 25 C 60% of bulk INSPECTION: No aluminium residues allowed. or undercut are Note: Always perform an "ALUMINIUM FENCE REMOVAL" step after dry etching of aluminium! 12. ALUMINIUM FENCE REMOVAL Plasma strip Moisten Etching Etch time QDR Drying Use the Tepla plasma system to remove the photoresist in an oxygen plasma. Follow the instructions specified for the Tepla stripper, and use the quartz carrier. Use program 1: 1000 watts power and automatic endpoint detection + 2 min. overetching. Rinse for 1 minute in wet bench "H2O/Triton X-100 tbv Al. Ets". Use the carrier with the yellow dot. The bath contains 1 ml Triton X-100 per 5000 ml deionized water. Use wet bench "Al. ets 35 C", and the carrier with the yellow dot. 1 liter buffered aluminium etch fluid contains: 770 ml concentrated phosphorus acid (H3PO4 85%), 19 ml concentrated nitric acid (HNO3 65%), 140 ml concentrated acetic acid (CH3COOH 100%) and 71 ml deionized water 30 seconds. 75 nm of aluminium will be lost. Rinse in the Quick Dump Rinser with the standard program until the resistivity is 5 MW. Use the Semitool "rinser/dryer" with the standard program, and the orange carrier with a black dot. 13. LAYER STRIPPING: Photoresist Strip resist Use the Tepla Plasma 300 system to remove the photoresist in an oxygen plasma. Follow the instructions specified for the Tepla stripper, and use the quartz carrier. Use program 1: 1000 watts power and automatic endpoint detection + 2 min. overetching. 35

35 Flowchart of how to make a flowchart Device concept Visualise the process flow in cross sections Feedback Translate the process flow in cross sections to process modules Feedback From process modules to flowchart Feedback Ready Introduction to process Version 1.0

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