Reactor wall plasma cleaning processes after InP etching in Cl 2 /CH 4 /Ar ICP discharge

Transcription

1 Reactor wall plasma cleaning processes after InP etching in Cl 2 /CH 4 /Ar ICP discharge R. Chanson a, E. Pargon a, M. Darnon a, C. Petit Etienne a, S. David a, M. Fouchier a, B. Glueck b, P. Brianceau b, S. Barnola b a Univ. Grenoble Alpes, CNRS, LTM, CEA-Leti b CEA/LETI

2 Hybrid photonic integrated circuit (PIC) Photonic integration is the key to reduce size, increase functionality and reduce cost of photonic devices Hybrid silicon integration combines: - Silicon and derived components to elaborate waveguides, filter or photodetector - III-V materials for light emitter Martijn J. R. Heck, SPIE Newsroom 2013 III-V Laser source III-V integrated by molecular wafer bonding DBR InP Gain region 1. Fiber coupling SOI wafer Si waveguide 2. Edge coupling 2

3 Plasma etching of III-V materials Process requirements: 1. High etch rates 2. Anisotropic sidewalls 3. Selectivity III-V vs SiN hard mask and SiO 2 box 4. Minimized surface and sidewalls roughness 5. Compatible with CMOS technology (contamination) Inspection of boiling points for chemistry suitability: III-V Chloride Fluoride Hydride Ga Ga 2 Cl 6, 201 C GaF 3, 950 C [GaH 3 ] 2, 0 C In InCl 3, 583 C InF 3, >1200 C InH, N/A P PCl 3, 76 C PF 3, -102 C PH 3, -88 C Ar/ Cl 2 /CH C As AsCl 3, 130 C AsF 3, 63 C AsH 3, -63 C F unreactive with group III Cl chemistry suitable for GaAsP system Low volatility of InCl x compounds Reactive etchant Passivative species 3

4 III-V plasma patterning results Ar/ C in ICP (AP from AMAT) Etch rates acceptable: 472nm/min III/V SiN selectivity: 14 Anisotropy : 86 Surface and sidewalls roughness OK Courtesy of P. Brianceau, CEA/LETI 4

5 Reactor wall contamination during plasma etching Reactor walls Al 2 O C Plasma Etched byproducts Mask InP Etched surface Mask InP Wall Deposited layer Passivation C Etched by-products redeposition Formation of coatings on Al 2 O 3 chamber walls changes the plasma chemistry Causes process drift, wafer to wafer irreproducibility 5

6 Today s strategy for process reproducibility Changes in reactor walls conditions = process drifts Today's strategy to get a reproducible process: the reactor between wafers Etching Reactor plasma clean clean Al 2 O 3 chamber Deposit clean Al 2 O 3 chamber Next wafer Aim of this study Characterize the deposits formed on the reactor wall Propose plasma cleaning strategies 6

7 Analyses of chamber walls coatings Floating sample technique : An electrically floating Al 2 O 3 sample is used to simulate the reactor wall conditions RF coil (ICP reactor) Al 2 O 3 chamber walls@80 C Ion energy > 100 ev : etching Ion energy ~ 15 ev : deposition InP wafer Air gap Al 2 O 3 floating sample Reactor wall surface SiO 2 wafer@170 C RF biasing O. Joubert, J. Vac. Sci. Technol. A 22, Quasi in-situ XPS analysis Chemical nature and thickness of the chamber wall coatings N.B. Use of temperature stick to monitor floating sample temperature 7

8 Experimental set-up Substrates: 2 InP wafer on a 200mm diameter SiO2 carrier wafer Floating sample 2 InP wafer SiO 2 wafer Etching and characterization experiments: 200 mm plasma etching plateform from AMAT XPS: quasi in situ characterization of the coating deposit and its plasma cleaning Load locks XPS DPS DPS + ICP with 50 C Reactor wall cleaning experiment ICP with hot 170 C InP etching Transfer chamber MERIE 8

9 Characterization of the deposit on the reactor wall FIB-SEM Morphological analyses of the deposit Top view Cross section Pt Deposit thickness ranging from 50 to 100nm Inhomogeneous rough surface Deposition Al 2 O 3 Si Substrate 100nm XPS Chemical composition of the deposit formed on the Al2O3 sample No phosporine detected Deposition of a mixed SiOCl-CCl layer with encapsulated InClx residues (8%) Atomic concentration (%) O 44% F 5% C 16% Al 35% Si 10% O 13% In 8% F 5% Cl 32% C 31% Si 6% O 17% In 6% F 3% Cl 15% C 52% No significant change after air exposure 0 Al 2 O 3 sample After InP etching (in-situ) After InP etching (ex-situ) 9

10 Chamber walls cleaning strategies Al 2 O 3 sample coated with the deposit are patched on a carrier wafer and exposed to cleaning plasma in DPS RF coil (ICP reactor) Al 2 O 3 chamber walls@80 C Al 2 O 3 sample Quasi in-situ XPS analysis SiO 2 carrier wafer RF biasing Sample patched on the carrier wafer with Fomblin: - sample temperature regulated by ESC temperature T between C Sample elevated with Kapton rolls: - no regulation of temperature - temperature controlled with stickers T >100 C 10

11 Chamber walls cleaning strategies Preliminary tests with typical plasma cleaning strategy-sample temperature >140 C Gas: 100sccm Pressure: 5-10mT Source: 800W Bias: 0W Atomic concentration (%) O 17% Si 11% In 9% After InP etching F 61% In 18% C Al 13% SF 6 /O 2 1 min O 6% Si 4% Cl 28% Cl 62% C 31% In 23% Cl 2 10 min Al 27% SF 6 /O 2 : removal of SiOCCl matrix but fluorination of Al and In Si F 13% O 38% Si 12% C 11% HBr 10 min 11

12 Chamber walls cleaning strategies Preliminary tests with typical plasma cleaning strategy-sample temperature >140 C Gas: 100sccm Pressure: 5-10mT Source: 800W Bias: 0W Atomic concentration (%) O 17% Si 11% In 9% After InP etching F 61% In 18% C Al 13% SF 6 /O 2 1 min O 6% Si 4% Cl 28% Cl 62% C 31% In 23% Cl 2 10 min SF 6 /O 2 : removal of SiOCCl matrix but fluorination of Al and In Cl 2 : carbon is removed, Si slightly removed but In remains Si F 13% O 38% Si 12% C 11% Al 27% HBr 10 min 12

13 Chamber walls cleaning strategies Preliminary tests with typical plasma cleaning strategy-sample temperature >140 C Gas: 100sccm Pressure: 5-10mT Source: 800W Bias: 0W Atomic concentration (%) After InP etching SF 6 /O 2 1 min Cl 2 10 min SF 6 /O 2 : removal of SiOCCl matrix but fluorination of Al and In Cl 2 : carbon is removed, Si slightly removed but In remains HBr: In is removed 0 O 17% Si 11% In 9% F 61% In 18% C Al 13% O 6% Si 4% Cl 28% Cl 62% C 31% In 23% Si F 13% O 38% Si 12% C 11% Al 27% HBr 10 min 13

14 HBr plasma cleaning process: impact of temperature Atomic concentration (%) O 17% Si 11% Cl 28% C 31% In 9% After InP etching F 10% O 35% Si 3% Cl 20% Br 10% C 26% In 12% Al 4% C 10min F 37% O 33% Si 6% In 5% Al 14% C 10min F 13% O 38% Si 12% C 11% Al 27% C 10min 90 C 140 C Patched sample Patched sample Surelevated sample At the reactor wall temperature of C, In residues still present 14

15 Dual step plasma cleaning process 100 Atomic concentration (%) O 17% Si 11% Cl 28% C 31% In 9% After InP etching C O 35% Si 17% Br 10% C 30% Al 5% C 5 min F 53% O 28% Si 2% Al 26% SF 6 /O C 1 min A dual step cleaning process is efficient to restore the reactor wall: HBr@140 C remove InClx compounds followed by clean SF6/O2@80 C to remove Si and C based compounds 15

16 Conclusion Patterning of InP/InGaAs/InGaASP heterostructures can be achieved in Ar/Cl 2 /CH 4 plasma with assistance of temperature During InP etching, a deposit composed of InClx residues encapsulated in a SiOCCl matrix is formed on the reactor wall. HBr plasma can be used to remove Indium residues from the reactor wall but for a complete efficiency, reactor wall should be heated above 100 C A dual step plasma cleaning process is recommended to restore the reactor wall after InP etching : HBr plasma@140 C followed by SF 6 /O 2 plasma 16

17 Acknowledgement to the NANOELEC program for supporting this work Questions? 17