SEMATECH Symposium Korea 2012 Practical Analysis Techniques of Nanostructured Semiconductors by Electron Microscopy
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1 SEMATECH Symposium Korea 2012 Practical Analysis Techniques of Nanostructured Semiconductors by Electron Microscopy Jun-Mo Yang, Ph.D. Measurement & Analysis Team National NanoFab Center, Korea
2 Introduction Recent ULSI Si devices : the transistor size smaller than 30 nm Energy devices : solar cell, power device For process development and failure analysis : structural observation at the atomic scale : compositional analysis at the nanometer scale or the atomic scale FE-(S)TEM techniques combined with EDS and EELS are ideal for nanoscale analyses of real patterned samples. : practical spatial resolution of EDS and EELS of 1 2 nm : possible to analyze in the Å scale by Cs-corrected STEM Further, in order to evaluate a junction in Si devices, investigation of 2D dopant profiles of both vertical and lateral is very important. P 2
3 Recent FE-(S)TEM FEG CL Cs-corrector EDS Biprism Stage Screen EELS P 3 STEM Resolution: ~80 pm
4 Interface Analysis of Epi-Si(111)/Y 2 O 3 /Pr 2 O 3 /Si(111) Heterostructures
5 Cross Sectional TEM SF Epi-Si SF Epi-Si Y 2 O 3 Pr 2 O 3 Y 2 O 3 Pr 2 O 3 Substrate Substrate 50 nm 50 nm P 5
6 Cross Sectional TEM : Electron Diffraction Y 2 O 3 (666) Si (333) Si (422) Y 2 O 3 (466) Y 2 O 3 (655) Y 2 O 3 (266) Y 2 O 3 (455) Y 2 O 3 (644) Si (133) Y Y 2 O 3 (255) 2 O 3 (066) Si (222)+Y 2 O 3 (444) Y Si (311) 2 O 3 (055) Y 2 O 3 (244) Y 2 O 3 (433) Y 2 O 3 (633) Y 2 O 3 (044) Y 2 O 3 (233) Y 2 O 3 (422) Y 2 O 3 (033) Si (111)+Y 2 O 3 (222) Si (200) Y 2 O 3 (022) Y 2 O 3 (211) Y 2 O 3 (011) Pr 2 O 3 (202) T Y 2 O 3 (200) Pr 2 O 3 (301) P 6
7 Cross Sectional HRTEM Si (200) Si (111) Si (200) Epi-Si Si (111) Si (111) Y 2 O 3 Y 2 O 3 (222) Y 2 O 3 (211) Y 2 O 3 (200) Y 2 O 3 (011) Pr 2 O 3 A-IF P 7 Substrate Si (111) Si (200) Si (111)
8 Cross Sectional HR-STEM (a) Epi-Si BF-STEM (b) Epi-Si ADF-STEM 3 Y 2 O 3 Y 2 O 3 2 Pr 2 O 3 Pr 2 O 3 S I-O 1 S I-O Substrate Substrate 10 nm P 8
9 ADF-STEM/EELS of Interface Region : Pr 2 O 3 /Si (111) Intensity [ 10 3 ] Intensity [ 10 3 ] (a) 8 (b) O-K Pr 2 O 3 Thickness of Interfacial Oxide : ~1 nm S I-O Sub. 6 4 Pr-silicate 2 Interfacial Oxide 2 nm (c) Si-L 1 Si Substrate (d) Energy Loss (ev) Interfacial Pr-silicate : By the direct chemical Pr-N reaction 4,5 between the Pr 2 O 3 and interfacial Si suboxide layer during post thermal process Si-L 2,3 Si-L 1 Interfacial Oxide Si-L 2,3 Pr 2 O 3 Pr-silicate 0 0 P Energy Loss (ev) Energy Loss (ev)
10 In Situ XPS/ADF-STEM of Interface Region : Y 2 O 3 /Pr 2 O 3 Normalized Y 3d (squares) and Pr 3d 5/2 (triangles) XPS intensity vs Y 2 O 3 layer thickness Pr x Y z O 3 mixed layer Pr 2 O 3 Bright Contrast Pr x Y z O 3 Changing Contrast Y 2 O 3 Dark Contrast P 10
11 Intensity [ 10 3 ] ADF-STEM/EELS of Interface Region : Epi-Si(111)/Y 2 O 3 (a) 150 (b) 120 Epi-Si Si-L 1 90 Epi-Si Y 2 O nm Si-L 2,3 Si-L 2,3 Si-L 1 Interfacial Oxide Y-silicate Y-M 4, P 11 It is not clear if there is a distinct interfacial layer at the boundary Energy Loss (ev) It seems that the Y-silicate and the interfacial oxide were initially formed with a total thickness of 1.2 nm when epitaxial Si was deposited on the Y 2 O 3 (111) surface, but the quantity of Si diffusion into the Y 2 O 3 layer surface was insufficient to result in an amorphization reaction towards a true Y-silicate interface layer.
12 Summary Epi-Si(111) Interfacial Oxide + Y-silicate Layer, ~1.2 nm Deficient Y-silicate Layer without an amorphization reaction Y 2 O 3 Pr 2 O 3 Amorphous Pr-silicate, >2 nm Interfacial Oxide, ~1 nm Si(111) Substrate Although the atomistic processes of the interface reactions differ, epi-si(111)/y 2 O 3 and the Pr 2 O 3 /Si(111) boundaries exhibit a similar bi-layer morphology, consisting of an interfacial Si suboxide in combination with a metal silicate layer. P 12
13 Nanoanalysis of the Poly-Si/Si Substrate Contact Surface
14 Analysis of the Poly-Si/Si Substrate Contact Surface As smaller DRAM design rule, contact resistance (Rc) of real cells became more critical. Generally, from the viewpoint of patterning process, Rc is mainly determined by both the effective contact area and the cleanness of contact surface. Commercial DRAM CELL STRUCTURE BL Plug W/L W/L W/L W/L FOX CAP FOX 1 SN_SNC 2 SNC_LPC 3 LPC_N- 4 BLC_LPC P 14
15 HRTEM + EDS + Poly-Si/Si Contact Bulk Plasma Residual oxide with C, F Original surface Perfect Crystal Sub. Si loss Normal Fail P 15
16 HRTEM + EDS + Poly-Si/Si Contact 불량 No LET Si contact interface in ULSI device EELS, Chemical state of oxide P 16
17 Nanoanalysis of the Metal/Barrier Metal Interface
18 Analysis of the Metal/Barrier Metal Interface Al Al Metallization system of Al alloys/ti or TiN film : Ti or TiN films improve the reliability of the Al films by increasing the resistance against electro-migration in the films. : This migration is related to the texture of the Al films and to the formation of intermetallic compound layers at the interface between the Al and Ti or TiN films during heat treatment. : In order to develop improved metallization systems, a better understanding of the interfacial reactions is very important. In this study, solid-phase reactions at the Al-Si- Cu/Ti interface were precisely investigated at extremely high resolution by HRTEM and EDS combined with FE-(S)TEM. P 18 Nanoscale analysis on interfacial reactions in Al-Si-Cu alloys and Ti underlayer films
![(112)TiAl 3, [011]Al //](/docs-images/76/74366064/images/19-4.jpg "[021]TiAl 3 Lattice mismatch: 4.")
19 HRTEM + Al-Si-Cu/Ti film Al Al-Si-Cu/Ti film : Metallization in ULSI device A: TiAl 3 (112) (200) Al TiAl 3 B: Intermediate C 8.58A Ti 3 nm Al Ti Al A C 4.05A 3.85A (111) (200) (111)Al // (112)TiAl 3, [011]Al // [021]TiAl 3 Lattice mismatch: 4.9% along the a-direction 5.9% along the c-direction P 19
20 HRTEM + STEM + Al-Si-Cu/Ti film P 20 Analysis Method - EDS map - Intensity profile, - k-factor correction - Quantitative analysis Results A 층의조성 Ti:Al:Si=1:3:1 C 층의조성 Ti:Si=1:1
21 2D Dopant Profile Measurement by Electron Microscopy Techniques
22 2D Dopant Profiling Techniques Investigation of junction profile in semiconductor devices is necessary to evaluate their electrical characteristics. Generally, 1D dopant profile can be obtained from SIMS and the 1D carrier profile can be derived from SRP. Owing to continuous shrinkage of n + (As) WSix Poly-Si Channel n + (As) LDD semiconductor devices, investigation of 2D junction profiles of both vertical and lateral became p- well (B) very important with real patterned samples. Si substrate So, various analysis techniques have been developed to obtain 2D information for junction profiles. In this presentation, we show chemical etching, SCM and LV-SEM techniques for 2D dopant profiling. P 22
23 Junction Delineation by Chemical Etching Technique P 23 Junction delineated SEM image of the n-mos region after the RTA treatment. (a) and (b) were obtained by dipping for 1 s and 5 s in the solution of HF:HNO 3 = 1.5:200, respectively. (a) Cross-sectional TEM image obtained in the n-mos region. (b) Junction delineated TEM image of (a). Delineation was carried out for 3 s with the solution of HF:HNO 3 = 1.5:200.
24 2D Dopant Profiling of MOSFETs by LV-SEM p-mosfet Power MOSFET Gate n - epi p + p + n - well 300 nm p - sub 50 μm n + n + p - base n + p - base n + n - epi 3 μm n - epi 5 μm P 24
25 Thank you for your attention!
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