Effect of barrier layers on the texture and microstructure of Copper films
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1 Mat. Res. Soc. Symp. Proc. Vol Materials Research Society E2.2.1 Effect of barrier layers on the texture and microstructure of Copper films Tejodher Muppidi and David P Field School of MME, Washington State University, Pullman, WA. John E Sanchez Advanced Micro Devices, Sunnyvale, CA. ABSTRACT: The microstructure of interconnect material is know to influence its electromigration and stress-voiding properties. In addition to many factors responsible for the microstructure development, the barrier layer could be a major contributing factor as it forms the substrate for the copper films above. The microstructure of the barrier films based on its deposition technique could determine the final microstructure of the copper film. In the present work we examine the effect of two different barrier layers (Ta and TaN) and different stackings of these two materials on the microstructure on the copper seed (PVD) and electroplated films using EBSD, AFM and XRD. The results show that the plated films have a predominantly (111) texture and uniform grain size. But the (111) texture maximum varied with the barrier layer stacking underneath the plated film. INTRODUCTION: Copper is fast replacing aluminum as the material in interconnects 1.Thelower resistivity of copper in addition to its better performance with respect to electromigration and stress-voiding are the important factors influencing this change. But, the major problem in using copper comes from its poor diffusion properties in dielectrics. Copper diffuses easily in to the dielectric thereby poisoning the device. Copper also has poor adhesion to the dielectric. These problems are overcome by use of a barrier layer which prevents the diffusion of Cu into the dielectric 2. Also, the barrier material has better adhesion to both the dielectric and the copper thereby solving the problem of adhesion. The most commonly used dielectric materials are Ta, TaN, W, TiW, W, TiN, etc. Barrier layer materials are usually refractory materials which have high stability at high temperatures (600ºC) and good diffusion resistance 3. They are inert and do not cause poisoning of the devices by diffusing in to the dielectrics. Most of the currently used barrier layers are deposited by sputtering 5,6 (PVD). But the damascene process for the copper interconnects requires the deposition of the materials in to trenches of varying aspect ratios. So, other techniques like Atomic Layer Deposition 10 (ALD) and Chemical vapor deposition (CVD) are being tested for deposition of Ta, TaN and W to achieve better step coverage and better filling. In addition, a combination of layers of these materials has been used as barrier layer eg. Stacking of Ti/TiN, Ta/TaN. All of these have could have an effect on the microstructure of the over layers and hence an impact on the electromigration performance of the interconnects.
2 E2.2.2 The change in deposition technique will cause changes in many properties of the barrier films including the change in its microstructure and stresses in the films 3,4,6.The stacking of films could cause increased stresses in the films and hence its properties. In the present study we examine the effect of the stacking of Ta and TaN layers on the microstructure of the copper seed and electroplated copper films. EXPERIMENTAL PROCEDURE: The films were prepared with four different types of barrier layers: Ta, TaN, Ta/TaN and Ta/TaN/Ta on SiO 2 wafers. The total thickness of the barrier films was 100nm. In case of stacking, the Ta and TaN had approximately equal thickness. Each of these barrier layers had two sets of films deposited on them. One set had just the copper seed layer 100Aº thick while the second set had 1.5µm thick electroplating in addition to the seed. Electroplating was done using a commercially available technique. The plated films were annealed at 400ºC for 1 minute on a hot plate. The wafers with the seed alone did not receive any annealing treatment. All the wafers were held at room temperature (RT) thereafter and self-annealing and RT grain growth are the only mechanisms through whichthegraingrowthwasassumedtooccur. The films were analyzed using electron back-scatter diffraction (EBSD), XRD and AFM to reveal the local and bulk microstructure and texture information. EBSD was carried out on an FEI-Philips XL-40 FE-SEM at 20kV accelerating voltage for two different step sizes of 0.1µm and 0.2µm. The smaller step size data was used to study the grain and grain-boundary structure and the larger step size data was collected to characterize the texture of the films. X-ray diffraction was done using the Shultz reflection method using a Philips X'Pert MRD 7-axis diffractometer. (111) pole figures were obtained and the pole plots were constructed. The AFM scans were done using a DI 5000 instrument to obtain the rms roughness values. The results are shown below. RESULTS: 1) Electron back scatter diffraction The orientation maps of the electroplated films for different barrier layers are shown in Fig 1. The maps show a predominantly (111) textured grains showing that the surface energy reduction is the major factor influencing the grain growth of the plated films. The average grain size obtained from these films is tabulated in Table 1. All the films have a similar average grain size in the range µm. The films with TaN in contact with the plated Cu have a slightly larger average grain size than films with the Ta on top. The average grain size was calculated assuming the twins as part of the same grain. The twin boundaries which are 60º rotated about (111) plane normal are excluded as grain boundaries.
3 E2.2.3 (a) (b) (c) (d) Figure 1. Orientation maps of electroplated Cu films with different barrier layers (a) Ta (b) TaN (c) Ta/TaN and (d) Ta/TaN/Ta. The grains are predominantly (111) with a small fraction of twins and other orientations. The grain size distribution for the plated films (not shown here) is log normal as it normally is in the case of plated films. The (111) pole figures for these films are shown in Figure 2. The pole figures were generated using 3º bins using discrete binning procedure similar to that described by Matthies 8. 2) Atomic force microscopy The rms roughness values obtained from the seed layer and the electroplated films are shown in Table 1. The rms roughness value of the seed layer is around 4 5 nm while the electroplated films which are much thicker had a much larger rms roughness in the order
4 E2.2.4 of 200nm. Figure 3 shows the difference in the AFM images of the film with Ta barrier layer and just the Cu seed and with the plating layer. 3) X-ray diffraction The XRD pole plots are shown for all the films in Figure 4. The pole plots have been generated by integrating the intensities obtained in the pole figures and normalizing them and making adjustments for the background and defocusing errors. All the films showed a significant fraction of (111) grains. DISCUSSION AND CONCLUSIONS: The grain size values of the Cu seed films were an order of magnitude less than the grain sizes of the plated films. The grain size of the grains was dependant on the layer in contact with the Cu seed or plating. The average grain size of Cu in contact with TaN was larger than one in contact with the Ta layer. The grain growth and orientation in thin films is effected by the surface energy minimization between the substrate and the deposited film. In the present experiment the TaN probably has a lower surface energy than Ta and hence the grains grow to a larger average size. (111) is the preferred orientation in all the films. The grain growth is believed to be the surface energy reduction based grain growth. The (111) maxima values, indicative of the quantitative texture, is found to vary with the number of sublayers underneath the Cu film. The films with just the Ta or TaN barrier had a much higher texture value than the films with Ta/TaN and Ta/TaN/Ta. The larger the number of sublayers, the greater will be the incoherence at the interfaces and increased stresses in the film. Higher stresses in the film cause the (001) to become a preferred orientation of the grains. It could also lead to abnormal grain growth as was observed in Ag thin films 9 with higher initial stress state. In the present situation the stress state was not high enough to cause any significant difference in grain growth characteristics and will have very little effect on any other properties. However, the results show that the increased number of layers and the type of material in barrier layer will affect the texture and microstructure of the Cu seed and the electroplated films. Cu seed Electroplated Cu Barrier Cu (111) (x random) rms roughness (nm) Avg grain dia (µm) Cu (111) (x random) rms roughness (nm) Ta TaN Ta/TaN Ta/TaN/Ta Table 1. The (111) texture maxima, rms roughness values for the Cu seed and plated Cu on different barriers. Average grain diameter values for plated Cu also shown.
5 E2.2.5 (a) (b) (c) (d) Figure 2. The (111) pole figures of the plated Cu films on (a) Ta (b) TaN (c) Ta/TaN and (d) Ta/TaN/Ta barrier layers. Figure 3. AFM images of the Cu seed (a) and the plated Cu (b) on a Ta barrier layer. The plated film has much larger rms roughness and psd grain size than the PVD Cu seed.
6 E2.2.6 Cu (111) (times random intensity) PVD Cu/Ta PVD Cu/TaN PVD Cu/Ta/TaN PVD Cu/Ta/TaN/Ta Plated Cu/PVD Cu/Ta Plated Cu/PVD Cu/TaN Plated Cu/PVD Cu/Ta/TaN Plated Cu/PVD Cu/Ta/TaN/Ta Figure 4. The (111) pole plot using X-ray Diffraction after correcting for defocusing and tilt errors. ACKNOWLEDGEMENTS: Minh Tran, Jeremias Romero, Johnny Baragan and Steve Robie at Advanced Micro Devices for help with the plating, AFM and XRD data. REFERENCES: Psi (deg) 1.C.-K.Hu,B.Luther,F.B.Kaufman,J.Hummel,C.Uzoh,D.J.Pearson,Thin Solid Films, vol.262, pp.84 92, Barriers against Copper diffusion into Silicon and drift through Silicondioxide, MRS bulletin 1994; 5 (August): KarenHolloway,PeterM.Fryer,CyrilCabral,Jr.,J.M.E.Harper,P.J.Bailey, andk.h.kelleher,journal of Applied Physics 1992; 71 (11): J.Proost, T.Hirato, T.Furuhara, K.Maex, and J.-P.Celis, J. of Appl. Phys., Vol 87, No 6, 15 March E.Kolawa, J.S.Chen, J.S.Reid, P.J.Pokela, and M.-A.Nicolet, J.of Appl. Phys. (1 Aug. 1991) vol.70, no.3, pp KarenHolloway,PeterM.Fryer,CyrilCabral,Jr.,J.M.E.Harper,P.J.Bailey,andK. H. Kelleher, J. of Appl. Phys. 1992; 71 (11): Linda Vanasupa, Young-Chang Joo, Paul R. Besser, and Shekhar Pramanick, J. of Appl. Phys. (1 March 1999) vol 85, no. 5, pp S.Matthies and G.W.Vinel, Material Science Forum (Proc. ICOTOM 10), 157, 1641 (1994). 9. J. Greiser, P. Müllner and E. Arzt, Acta Materilia 49(2001) G.Beyer,A.Satta,J.Schuhmacher,K.Maex,W.Besling,O.Kilpela,H.Spreyand G. Tempel, Microelectronic Engineering 64 (2002)
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