Lecture 7 CMOS MEMS. CMOS MEMS Processes. CMOS MEMS Processes. Why CMOS-MEMS? Agenda: CMOS MEMS: Fabrication. MEMS structures can be made

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1 EEL6935 Advanced MEMS (Spring 2005) Instructor: Dr. Huikai Xie CMOS MEMS Agenda: Lecture 7 CMOS MEMS: Fabrication Pre-CMOS Intra-CMOS Post-CMOS Deposition Etching Why CMOS-MEMS? Smart on-chip CMOS circuitry Multi-vendor accessibility Scalability Compact size More functions Low cost EEL6935 Advanced MEMS 2005 H. Xie 1/28/ EEL6935 Advanced MEMS 2005 H. Xie 2 CMOS MEMS Processes CMOS MEMS Processes MEMS structures can be made Before CMOS processes ( pre-cmos ) MEMS Planarity CMOS Vendor Accessibility Contamination Temperature Budget In-between CMOS processes ( intra-cmos ) Pre-CMOS Best Limited No After CMOS processes ( post-cmos ) Intra-CMOS Good Very limited Post-CMOS Varies Good No EEL6935 Advanced MEMS 2005 H. Xie 3 EEL6935 Advanced MEMS 2005 H. Xie 4

2 Pre- CMOS MEMS Sandia National Laboratories imems Intra-CMOS MEMS Analog Devices, Inc. BiMEMS Form transistors on bare wafers first Then deposit and anneal MEMS structural materials No CMP needed Only one interconnect metal layer Wet etch to release MEMS structures Need a dedicated production line Pre-etched trench to house MEMS structures CMP to planarize the wafer for regular CMOS processing Wet etch to release MEMS structures Need a dedicated production line EEL6935 Advanced MEMS 2005 H. Xie 5 Passivations BPSG Thox NPN NMOS Met Sensor Area Sensor Poly Nwell Emitter Courtesy of Mr. John Geen Base NSD of Analog Devices, Inc. EEL6935 Advanced MEMS 2005 H. Xie 6 Post- CMOS MEMS Processes Post-CMOS Deposition High-temperature refractory metals plus polysicion Low-temperature poly-sige Electroplating metals Post-CMOS Deposition -1 High-temperature Refractory Metals Plus Polysilicon Post-CMOS Etching Thin-film structures (oxide/al compound); wet etching Thin-film structures (oxide/al compound); dry etching Bulk silicon; wet etching Bulk silicon/thin films; DRIE/backside etch Integrated Accelerometer High-temperature annealing for MEMS Integrated electronics Refractory metal deposition (non-standard CMOS process) EEL6935 Advanced MEMS 2005 H. Xie 7 Yun, Howe, Gray, 1992 EEL6935 Advanced MEMS 2005 H. Xie 8

3 Post-CMOS Deposition -1 High-temperature Refractory Metals Plus Polysilicon Post-CMOS Deposition -2 Polycrystalline Germanium Process High-Q CMOS MEMS Resonator Nguyen, Howe, 1993 Closed-loop feedback and DC-bias are used to control the oscillation amplitude. Q > 50,000 EEL6935 Advanced MEMS 2005 H. Xie 9 Franke et al, 1999 Structural layer: Poly-Ge (400 C) Sacrificial layer: LTO (400 C) α-si (410 C) as HF etching mask Methanol/air drying (no stiction problems) RTA (550 C for 30s) may be used to lower poly-ge contact resistivity EEL6935 Advanced MEMS 2005 H. Xie 10 Post-CMOS Deposition -2 Polycrystalline Germanium Process Poly-Si/Ge Poly-Ge Process Post-CMOS Deposition -3 CMOS Amplifier Poly-Ge Resonator No performance degradation of CMOS devices observed after RTA In air, Q=45, 14kHz Poly-Ge sacrificial layer removed Structural layer: 2.5-um p + poly-si 0.35 Ge 0.65 (450 C) Sacrificial layer: 2-um poly-ge (375 C) Poly-Ge etchant: H 2 O 2 (30%) at 80 C Methanol/air drying Franke et al, 1999 EEL6935 Advanced MEMS 2005 H. Xie 11 Franke et al, 2003 EEL6935 Advanced MEMS 2005 H. Xie 12

4 Poly-Si/Ge Poly-Ge Process Post-CMOS Deposition -3 Post-CMOS Etching -1 Integrated Mass Flow Sensor P-well implant Deep Boron Diffusion and Drive-in Dielectric Diaphragm Thermally-based Sensors Pressure Sensor Backside wet bulk etching Frontside circuits protection No electronics performance degradation observed In air, Q=70, kHz At 40µTorr, Q=14000, 17.96kHz Franke et al, 2003 EEL6935 Advanced MEMS 2005 H. Xie 13 CMOS Circuitry and Micromachining Two-side alignment Simultaneous measurement of flow rate, flow direction, pressure, gas type and temperature Yun and Wise, 1992 EEL6935 Advanced MEMS 2005 H. Xie 14 Post-CMOS Etching -2 Micro Hotplate Based Gas Sensors Post-CMOS Etching -3 Maskless Post-CMOS MEMS Structures made using conventional CMOS Starting CMOS cross-section from the foundry: Backside KOH etching; Electrochemical etch stop N-well silicon island for uniform thermal distribution and membrane stiffening SnO 2 coated for gas sensing by measuring conductivity change due to gas exposure Elevated temperature for high sensitivity Pt electrodes for higher operation temperatures Prof. H. Baltes group at ETH Overglass Scalable CMOS Silicon substrate N-metal interconnect Gate polysilicon Fedder et al, 1996 EEL6935 Advanced MEMS 2005 H. Xie 15 EEL6935 Advanced MEMS 2005 H. Xie 16

5 Maskless Post-CMOS MEMS (cont d) Maskless Post-CMOS MEMS (cont d) Step 1: reactive-ion etch of dielectric layers Top metal layer acts as a mask & protects the CMOS Step 2: DRIE of silicon substrate Spacing between structures and silicon is defined Composite structural layer Metal mask layer Electrically isolated interconnect on beam Composite structural layer Etched pit Exposed silicon EEL6935 Advanced MEMS 2005 H. Xie 17 EEL6935 Advanced MEMS 2005 H. Xie 18 Maskless Post-CMOS MEMS (cont d) Maskless Post-CMOS MEMS (cont d) Step 3: Isotropic etch of silicon substrate Structures are undercut & released Z-axis accelerometer x-axis gyroscope Springs Anchor Composite beam Etched pit Self-test actuators Proof mass Sense fingers Stator electrodes Curl matching frame H. Xie, G. Fedder, MEMS 2000, Japan H. Xie, G. Fedder, MEMS 2001, Switzerland EEL6935 Advanced MEMS 2005 H. Xie G. Fedder et al., Sensors & Actuators A, v.57, no.2, EEL6935 Advanced MEMS 2005 H. Xie 20

6 Maskless Post-CMOS MEMS (cont d) DRIE Post-CMOS MEMS No lithography needed Integrated CMOS circuitry Low parasitic capacitance to substrate High wiring flexibility Curling can be matched Use substrate silicon as structural layer DRIE: Deep Reactive-Ion Etch SCS: Single-Crystal Silicon (a) Backside etch CMOS-region Single-crystal Si (SCS) membrane metal-3 metal-2 metal-1 oxide poly-si Curling is still an issue Size limitation Temperature performance (b) Oxide etch EEL6935 Advanced MEMS 2005 H. Xie 21 EEL6935 Advanced MEMS 2005 H. Xie 22 DRIE Post-CMOS MEMS (cont d) DRIE Post-CMOS MEMS (cont d) (c) Deep Si etch CMOS layer Front-side view Serpentine spring Proof mass Flat structure Thin-film structure Comb drive Electrically isolated SCS beam/comb finger (d) Si undercut SCS layer (20~100µm) Back-side view H. Xie, L. Erdmann, X. Zhu, K. Gabriel, G. Fedder, Hillton Head 2000, USA EEL6935 Advanced MEMS 2005 H. Xie 23 EEL6935 Advanced MEMS 2005 H. Xie 24

7 New DRIE Post-CMOS MEMS Metal 4 New DRIE Post-CMOS MEMS (cont d) 3-axis Accelerometer (front side) CMOS chip with 4 metal layers (c) Metal 4 removal by wet etch (a) Backside deep Si etch followed by front side anisotropic SiO 2 etch. No undesired undercut (d) SiO 2 anisotropic etch followed by structure release by deep Si etch Back side (a) (b) Deep Si etch and Si undercut of isolation beams Sacrifice a metal layer Independently control etches for isolation and comb fingers H. Qu, D. Fang, H. Xie, IEEE Sensors 2004 EEL6935 Advanced MEMS 2005 H. Xie 25 EEL6935 Advanced MEMS 2005 H. Xie 26 Project #2 CMOS MEMS Sensors/RF Devices Hunting a) Read recent papers published in JMEMS, JMM, Sensors & Actuators, IEEE Sensors Journal, and MEMS conferences such as MEMS and Transducers. b) Pick one CMOS-MEMS based device which is most interesting to you (you may keep in mind your term project when you do the search) c) Draw the process flow (don t just copy/paste) and understand the operational principle of the device. d) Present the device principle, fabrication and performance in contrast to other similar devices. e) Write a concise report. Attach the paper. Presentation: 6 minutes plus 2 minutes Q/A Monday, 2/14/05 Report due 2/16/05 EEL6935 Advanced MEMS 2005 H. Xie 27