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1 Key Engineering Materials Vols (2006) pp Online: (2006) Trans Tech Publications, Switzerland doi:0.4028/ MEMS based metal plated silicon package for high power LED Sung-Jun Lee,a,Ji-Hyun Park,b,Chang-Hyun Lim,c,Won-Kyu Jeong,d, Seog-Moon Choi,e and Yong-Soo Oh,f Process Improvement Center,Central R&D Institute,SAMSUNG ELECTRO-MECHANICS CO.,LTD.,34,Maetan3-Dong,Yeongtong-Gu,Suwon,Gyunggi-Do,Korea, a sungjun72.lee@samsung.com, b brad.park@samsung.com, c changhyun79.lim@samsung.com d mecclein@samsung.com, e sms.choi@samsung.com, and f yongsoo.oh@samsung.com Keywords: MEMS, High power LED, thermal resistance Abstract. By the development of high power LED for solid states lighting, the requirement for driving current has increased critically, thereby increasing power dissipation. Heat flux corresponds to power dissipation is mainly generated in p-n junction of LED, so the effective removal of heat is the key factor for long lifetime of LED chip. In this study, we newly proposed the silicon package for high power LED using MEMS technology and estimated its heat dissipation characteristic. Our silicon package structure is composed of base and reflector cup. The role of base is that settle LED chip at desired position and supply electrical interconnection for LED operation, and finally transfer the heat from junction region to outside. For improved heat transfer, we introduced the heat conductive metal plated trench structure at the opposite side of LED attached side. The depth and the diameter of trench were 50 and 00um, respectively. Copper with high thermal conductivity than silicon was filled in trench by electroplating and the thickness of copper was about 00um. Reflector cup was formed by anisotropic wet etching and then, silicon package platform could be fabricated by eutectic bonding between base and reflector cup. The thermal resistance of silicon package was about 6 to 7K/W from junction to case, and also, thermal resistance reduction of 0.64K/W was done by metal plated trench. This result could be comparable to that of other high power LED package. Our silicon package platform is easy to be expanded into array and wafer level package. So, it is suitable for future high efficiency and low cost package. Introduction In the last decades, high power LEDs[-2] has drawn clear distinction in appearance and performance compared to the indicator LEDs. Major advances in materials technologies have allowed LEDs to surpass the efficiency of color filtered fluorescent light bulbs and white incandescent and halogen light bulbs. However, today even the most powerful LEDs being made are still an order of magnitude to low in flux per LED. Making the jump in flux per LED will require outstanding improvements in packaging and fixture integration that further reduce thermal resistance from LED junction to ambient into the <0K/W range. With the continuous improvement in the device technology, the requirement for high current density and therefore high junction temperature operation of LEDs became more pronounced. Hence, designers continued their investigation of further reducing the junction to case resistance of an LED package. One big constraint in designing a thermally efficient LED package comes from the fact that convention lighting such as incandescent or halogen bulbs uses radiation as well as natural convection for cooling. However, for an LED package, cooling is restricted to natural convection since any active cooling would significantly hamper the possibility of LEDs penetrating solid state lighting market. Therefore, package designers concentrated on improving the conductive thermal path to minimize resistance and then enable transferring the heat to the ambient via natural convection. All rights reserved. No part of contents of this paper may be reproduced or transmitted in any form or by any means without the written permission of Trans Tech Publications, (ID: , Pennsylvania State University, University Park, USA-09/0/5,02:43:47)

Figure (a) is the cross-section view of a Luxeon package in Lumileds.

2 30 Experimental Mechanics in Nano and Biotechnology (a) Luxeon package (b) Silicon package with metal plated trench Fig.. Cross section views of high power packages In this study, we proposed the new package platform using silicon substrate, compared to representative metal core leadframe package made in Lumileds. Figure (a) is the cross-section view of a Luxeon package in Lumileds. This package incorporates a copper-based leadframe and a low thermal resistance silicon submount to accommodate changes in thermal expansion coefficient. The thermal resistance of Luxeon package from junction to case indicates about 8 to 0K/W. On the other hand, our metal plated silicon package(figure (b)) is mainly composed of the base and reflector cup. Via hole for electrical interconnection and trench for enhancement of thermal conductance from LED junction was fabricated within base and metal was filled in. Through bulk micromachining process, reflector cup structure was formed and metal layer for reflectance of red, green and blue wavelength was coated on inclined plane with degree. 2 :90.9. % ( %703.! ;, 5, :,9 43, 07 ( $4 /07 3 % ( % 072, 70,80 % ( Thermal Resistance[K/W ] without Trench with Trench % Width of PKG[mm] (a) Silicon package structure for analysis (b) Thermal resistance Fig. 2. Analysis of thermal resistance due to existence of metal plated trench structure Figure 2 shows the simulation result about thermal resistance of silicon package, including trench structure. In case of TIM,TIM2 and TIM3(attach layers), we couldn t get precise property of matter. So, we calculated the equivalent value of property of matter through structure function and simulation. In figure 2(b), thermal resistance of silicon package with trench was about 0.47K/W lower than that of silicon package without trench. Consequently, the introduction of the metal plated trench enabled silicon package to easily conduct heat from junction of LED to case. Fabrication In order to apply this structure to real LED package, we fabricated silicon package platform using MEMS technology and the fabrication process is shown in figure 3(a). The thickness of base substrate was 300um and, shallow trench for bottom pad and deep trench for improvement of

Key Engineering Materials Vols. 326-328 3 Base Substrate 9 2 3 4 5 0 Reflector Cup Base & Cup bonding 6 2 7 3 8 4 (a) Fabrication process of silicon package platform (b) Completed LED package Fig. 3. Fabrication of silicon package using MEMS technology thermal resistance were formed by bulk micromachining process using ICP etcher.

3 Key Engineering Materials Vols Base Substrate Reflector Cup Base & Cup bonding (a) Fabrication process of silicon package platform (b) Completed LED package Fig. 3. Fabrication of silicon package using MEMS technology thermal resistance were formed by bulk micromachining process using ICP etcher. Then, thermal oxide layer was grown on silicon surface and Ti/Au seed layer for Cu electroplating was deposited by sputter. 00um Cu layer was electroplated in via hole and, by CMP process, unnecessary Cu layer was removed at silicon surface. Finally, Ti/Au electrode and 3.5um AuSn bonding layer were deposited and patterned on front surface of base substrate. For reflection of emitted light from side of LED, we made reflector cup with 500um-thick silicon wafer. Through silicon anisotropic wet etching, () inclined surface was formed and aluminum mirror layer was coated on it. By the eutectic bonding of Au layer deposited under reflector cup and AuSn layer patterned on front surface of base, silicon package platform was completely fabricated. Photograph of figure 3(b) shows the final LED package, which is finished up to LED attach, wire bonding and encapsulation, etc. Results and discussion We estimated the thermal resistance of silicon package platform using thermal transient method[3]. Thermal transient testers measure the time dependence of the temperature in a spot, as the result of heating or cooling. Heating or cooling is applied as the step function power is switched on or off, either at the location of the measuring spot or at a different location. Measuring at the location of the heating provides data about self-heating, which means the driving point impedances can be calculated from such measurements, while measuring at a different locating to the powering gives data about the thermal transfer impedances[4]. Figure 4 is the estimation result of thermal resistance about our silicon package platform. The size of package was 4mm by 4mm and totally 0 samples were estimated. In measurement results of figure 4(a) and (b), R th,j-c, thermal resistance from junction to case of silicon package platform with trench is reduced about 0.64K/W than that of without trench. These experimental results are almost similar to simulation result shown in figure 2 and, consequently, we could confirm the improvement effect of metal plated trench about thermal resistance.

4 32 Experimental Mechanics in Nano and Biotechnology ,, 9, 0000 CA SiPKG4040 trenchx no mA test - Ch. 0 CA SiPKG4040 trenchx no mA test - Ch. 0 CA SiPKG4040 trenchx no mA test - Ch. 0 CA SiPKG4040 trenchx no mA test - Ch. 0 CA SiPKG4040 trenchx no mA test - Ch. 0 CA SiPKG4040 trenchx no mA test - Ch. 0 CA SiPKG4040 trenchx no mA test - Ch. 0 CA SiPKG4040 trenchx no mA test - Ch. 0 CA SiPKG4040 trenchx no mA test - Ch. 0 CA SiPKG4040 trenchx no mA test - Ch : T3Ster Master: differential structure function(s) #.,; ,, 9, 0000 CA SiPKG4040 trench no mA test - Ch. 0 CA SiPKG4040 trench no mA test - Ch. 0 CA SiPKG4040 trench no mA test - Ch. 0 CA SiPKG4040 trench no mA test - Ch. 0 CA SiPKG4040 trench no mA test - Ch. 0 CA SiPKG4040 trench no mA test - Ch. 0 CA SiPKG4040 trench no mA test - Ch. 0 CA SiPKG4040 trench no mA test - Ch. 0 CA SiPKG4040 trench no mA test - Ch. 0 CA SiPKG4040 trench no mA test - Ch T3Ster Master: differential structure function(s) #.,; K [W2s/K2] K [W 2 s/k 2 ] #,80 K [W 2 s/k 2 ] K [W2s/K2] #, e-4 e Rth [K/W] R th [K/W] Rth [K/W] R th [K/W] (a) Silicon package without trench (b) Silicon package with trench (c) Thermal transient tester (T3STER) Fig. 4. Thermal resistance results of silicon package platform Summary We proposed new silicon package platform for high power LED and fabricated it using typical MEMS technology. Also, we firstly introduced copper plated trench structure for increase of thermal conductivity. In estimation results with thermal transient tester, thermal resistance of fabricated silicon package platform was about 6 to 7 K/W and the trench structure helped silicon package to improve thermal emission characteristic. Because our package platform can be easily expanded into array and wafer level, so, the research about silicon array package is actively going on. References [] Daniel A. Steigerwald, Jerome C. Bhat, Dave Collins, etc., IEEE Journal on Selected Topics in Quantum Electronics. Vol.8, No.2, pp (2002) [2] Mehmet Arik, James Petroski and Stanton Weaver, 2002 Inter Society Conference on Thermal Phenomena, pp.3-20(2002) [3] Gabor Farkas, Quint van Voorst Vader, etc., 9 th THERMINIC Workshop, pp (2003) [4] Marta Rencz, Future Circuits International, pp.5-52

5 Experimental Mechanics in Nano and Biotechnology / MEMS Based Metal Plated Silicon Package for High Power LED /

Fraunhofer IZM Berlin

Fraunhofer IZM Berlin Advanced Packaging for High Power LEDs Dr. Rafael Jordan SIIT Agenda Gluing Soldering Sintering Transient Liquid Phase Bonding/Soldering Thermo Compression Junction Temperature Measurements