Laser Crystallization for Low- Temperature Poly-Silicon (LTPS)

Transcription

1 Laser Crystallization for Low- Temperature Poly-Silicon (LTPS) David Grant University of Waterloo ECE 639 Dr. Andrei Sazonov

2 What s the current problem in AM- LCD and large-area area imaging? a-si:h has poor mobility (< 1 cm 2 /V s), which means low frequency operation and low current operation Putting driver circuitry in crystal silicon for imaging/display applications is costly due to packaging

3 Poly-Si has the required mobility (µ( e cm2 V -1 s-1 ) for on- display circuits. Can be processed at low temperatures on glass or plastic Can be created on the same substrate as a-a Si:H devices This will lead to SoG (System-on on-glass) Poly-Si to the rescue Glass) TV: 575 x 720 Mammography: 3600 x 4800

4 What is Poly-Si Si? Grains of crystalline silicon with no amorphous phase Grain size: <100 nm, up to µm m (24 µm m single-grain grain reported by Yoshimoto using PMELA, and 70 µm m reported by Choi) Produced from solidification/crystallization of molten silicon films, using excimer or solid-state state (CW or pulsed) lasers Used in some available commercial devices, mostly for projectors and some small displays

5 Conduction in Poly-Si Conduction is limited by two effects: Grain boundaries (in intrinsic and extrinsic poly-si Si) Grain boundary traps (primarily in extrinsic poly-si Si) Solution: Hydrogen passivation Lightly doped Doped Heavily Doped

6 Other Poly-Si Fabrication Techniques Solid Phase Crystallization (SPC) Low-Pressure Chemical Vapour Deposition (LPCVD) Plasma-Enhanced Chemical Vapour Deposition (PECVD) Hot-Wire CVD (HW-CVD) 1 µm m grain size µ e 40 cm2 V -1 s-1 long thermal anneal times (1-2 2 days for <600 o C, can be reduced using applied fields or metal catalysts) 100 nm grain size µ e 5 cm2 V -1 s o C (deposition on glass possible) µ e 60 cm2 V -1 s-1 Lots of defects present in grains o C from SiF 4 /SiH 4 /He gas mixture o C µ e 130 cm2 V -1 s-1 -Good luck getting these to work on PET plastic (maximum T=120 o C)! -Many of these techniques create poly-si with many defects in the grains themselves

7 Laser Annealing/Crystallization Advantages: Quick heating times (~30 ns) and fast cooling times (~ ns) ensure the substrate does not melt (at least not completely) High absorbency in a-sia Si,, low absorbency in substrate means low temperature process. No real low temperature limit. Highest substrate temperature determine by other step(s) ) in process. Good spatial selectivity for integration of poly-si with a-si:h devices. Beam size: mm 2 Large-sized, quality grains can be produced Pulse length: ns. Two types of lasers: Excimer Solid-State State

8 Laser Processing Precursor Films Pre-cursor films can be made from PECVD, LPCVD, or sputtered Si 1. Require fully amorphous material: For PECVD, use low H 2 concentration, and/or low RF power to prevent µc-si phase For LPCVD, keep pressure high, and/or use lower temperature 2. Low hydrogen content (~3%) helpful, or else dehydrogenation anneal is required For LPCVD

9 Processing Excimer Laser Three flavours of rare gas-halogen lasers: ArF (193 nm) KrF (248 nm) Good gas stability XeCl (308 nm) Good gas stability, high absorption in a-si:ha film XeF (351 nm) Excimer Laser Annealing (ELA) is the most common type of laser crystallization Annealing

10 Grain Growth Depedence on Laser Fluence Grain growth, and hence grain size and mobility depends strongly on laser pulse energy Fluence = [mj[ mj cm -2 ] Some key values: Melting point: a-si 1400 K c-si = 1687 K Latent heat of fusion: a-si 1300 J/g c-si = 1800 J/g

11 Low Fluence Regime Explosive crystallization Fine-grained/small grained/small- grained poly-si 150 mj/cm mj/cm 2

12 Sub-Critical Fluence Regime melt depth < film thickness Explosive crystallization near interface Poly-Si near surface Fine-grained/small grained/small- grained poly-si 200 mj/cm mj/cm 2

13 Sub-Critical and Critical Fluence Regime Near-complete melting Grains nucleate from unmelted a-si islands near substrate interface At critical fluence, Super Lateral Grain (SLG) growth occurs Grain size up to 100 times film thickness can grow

14 Super-Critical Fluence Regime Complete melting Rapid cooling via substrate leads to homogeneous nucleation from melt Film is quenched Small, fine grains

15 Densities: Surface Roughening Liquid Si: : 2.53 g/cm 3 Solid Si: : 2.30 g/cm 3 Most pronounced during SLG at critical fluence Remove by: Stepped laser fluence levels Step-annealing Chemical- mechanical polish Use bottom- gate TFT

16 Problems/Issues With Poly-Si Processing Grain Size Need grain size large as possible Homogeneity/uniformity paramount Need to have consistent device parameters and hence performance Surface Roughening It is a matter of creating a few spectacular devices with a wide variation versus creating all <<good>> devices with good parameters in a narrow distribution (Boyce, 2000)

17 Basic Techniques For Uniformity Small-pitch scanning (pitch less than beam size) Laser power stepping (slowly building to critical fluence) Multiple pulses ( pulses) Grain size is often sacrificed Asai, 1993

18 Processing Solid State Laser Annealing Part 1 (Dassow,, 2002) Pulsed solid state laser Nd:YVO 4 (532 nm) 100 Hz repetition rate Can withstand 30% variation in laser power 410 cm 2 /(V s)

19 Processing Solid State Laser Annealing Part 2 (Hara, 2002) Continous solid state laser Nd:YVO 4 (532 nm) 1% laser power stability Directional scanning produces long grains 566 cm 2 /(V s)

20 Advanced Techniques - Mariucci Mariucci,, 2000 Two-pass masking technique

21 Advanced Techniques Mariucci cont d

22 Advanced Techniques Mariucci cont d

23 poly-si Thin-Film Transistors (TFT) Top-gate structure: Good: top half of poly-si has high mobility Bad: top-half has lots of surface roughness Bottom-gate structure: Good: avoid surface roughness Bad: location of gate means lower laser fluence and low mobility

24 Integration of poly-si and a-si:ha a-si:h for pixel switches due to its low leakage current poly-si for driver circuity due to its higher speed Need to get rid of hydrogen in poly-si device, crystallize, then re-hydrate Top-gate a-si:ha TFT is SO bad (0.2 cm 2 /V s), so use bottom-gate Choice of gate oxide

25 Conclusion Commercial devices already available, mostly in projectors and small displays (digital camera and G3 cell phones) FlexICs has Ultra-Low Temperature Poly- Silicon (ULTPS) top-gate process with NMOS and PMOS mobilities of 250 and 200 cm 2 /V s Still lots of work to be done to get mammography x-ray x sensor arrays on plastic