Welcome MNT Conference 1 Albuquerque, NM - May 2010

Size: px
Start display at page:

Download "Welcome MNT Conference 1 Albuquerque, NM - May 2010"

Transcription

1 Welcome MNT Conference 1 Albuquerque, NM - May 2010

2 Introduction to Design Outline What is MEMs Design General Considerations Application Packaging Process Flow What s available Sandia SUMMiT Overview Review of surface micromachining process Draw a Cantileverl

3 What is MEMs Design? Develop a plan What will be the function? How will it be packaged? What will the environment be? Where will the part be built? What are the final specifications? The path from Concept to Reality

4 General Considerations - Applications BIOMEMs - BIO-Compatible Materials? Fluidics? Surface and/or Bulk processing? Both? Shock conditions? Vacuum? Or Atmosphere? Humidity? (Stiction) Use Few, Many, Millions, Billions Reliability Questions What materials are best for the given application? How and when will the parts be released?

5 Packaging Input Fluids (Glass, Poly tubing?) Pressure (Open? Glass Tubes?) Electrical Signals (Leads) Optical signals (Fiber optic) Vibration, Shock? How Many of each required? Are there standard Packages Available Output Fluids Electrical Signals Optical Signals Must Speak with the Packaging Folks FIRST!

6 Process Flow Where are you going to build this? Is there already a standard process Flow? Much faster and cheaper to use standardized flow Process is well defined and understood Material Properties well known Require new steps in the flow? $$$$$ in development and capital Cost

7 Before Actually Building Prototype Model Components Will the moving part move? Where are the weak points? Some Tools to Model FEA Finite Element Analysis Mechanical Electrical 3d Printers Takes CAD Like output and makes the part

8 SUMMiT Design Process Flow Initial Design AutoCAD Layout Visualization 2D Process Visualizer Design Validation Analysis Verification 3D Visualizer Design Rule checking Fabrication of Final Product

9 Sandia s Five-level Surface Micromachining Technology Enables Useful Complex Systems 2*-level 3-level 4-level 5-level Electrostatic Micromotor Motor Gear Bearing Motor Bearing Gear Drive Linkages Motor Bearing Gear Drive Linkages Moveable Plate Motor Silicon Substrate Silicon Substrate Silicon Substrate Pin Joints Silicon Substrate Polysilicon Level #1 Sensors Polysilicon Level #1 Polysilicon Level #2 Advanced Sensors Simple Actuators Polysilicon Level #1 Polysilicon Level #2 Polysilicon Level #3 Advanced Actuators Polysilicon Level #1 Polysilicon Level #2 Polysilicon Level #3 Polysilicon Level #4 Complex Systems * First Poly Level is a ground plane

10 Major Processing Steps in Surface Micromachine and IC Manufacturing Crystal growth & wafering Wafer Repeat N times Thin film formation Impurity doping Photolithography Mask Set Etching What does the designer Control? Dicing & packaging

11 Materials for Surface Micromachining Material system requirements: Structural film must have desirable mechanical and electrical properties (low stress, conductivity, etc.) Sacrificial film must be stable under structural film deposition conditions and etch readily in an etchant that doesn t attack the mechanical film or the substrate Both films must be compatible with fabrication environment (generally silicon IC fab) SUMMiT Process: Structural - Polysilicon Sacrificial - Silicon Dioxide Electrical Isolation - Silicon Nitride Substrate - Single Crystal Silicon Substrate Structural thin film Sacrificial thin film

12 Surface Micromachining Key Concepts: Mechanical part is formed out of deposited thin films Need one structural and one sacrificial material Substrate Structural thin film Sacrificial thin film Pattern structural film Example: Wet etch sacrificial film Single-level mechanical structure with unpatterned sacrificial layer

13 Fabrication Processes: Photolithography Photolithography is used to pattern the thin-film layers IC industry uses positive photoresist becomes soluble in developer when exposed to UV light 5:1 pattern transfer Mask defines single die and pattern is stepped across wafer 0.3 µm resolution (there is a 0.5um Minimum Design Rule) 2820 µm x 6340 µm modules ~ 63 die per wafer

14 SUMMiT Sandia s Ultra-planar Multi-level MEMS Technology LPCVD 2.25 µm MMpoly4 PECVD LPCVD 2.0 µm SacOx4 (CMP) 2.25 µm MMpoly3 0.2 µm Dimple4 gap PECVD 0.3 µm SacOx2 2.0 µm SacOx3 (CMP) 1.5 µm MMpoly2 1.0 µm MMpoly1 0.4 µm Dimple3 gap 0.3 µm MMpoly0 2.0 µm SacOx µm Thermal SiO µm Silicon Nitride Substrate 6 inch wafer, <100>, n-type- 0.5 µm Dimple1 gap This process is fixed you can t change it (part of the design package as well)

15 Fabrication Review Start with single-crystal silicon wafer Deposit layer of sacrificial oxide

16 Fabrication Review (2) Mask Spin on light-sensitive photoresist Expose photoresist to light using oxide mask

17 Fabrication Review (3) Develop photoresist Etch away oxide not protected by photoresist

18 Fabrication Review (4) Strip off photoresist Deposit conformal layer of polysilicon

19 Fabrication Review (5) Mask Spin on light-sensitive photoresist Expose photoresist to light using polysilicon mask

20 Fabrication Review (6) Develop photoresist Etch away polysilicon not protected by photoresist

21 Fabrication Review (7) Strip off photoresist Etch away sacrificial oxide to complete

22 Final Product Low Angle View Thunderbird Actuator Flexible cantilever style arms Hole in oxide created anchor post

23 Simple Example? How many Masks? How Many Etches? Two, three Or four? How Many Depositions? So Will this move? What does it need?

24 Sandia MEMS Microengine Design Example Two orthogonal linear drives linked to a rotary gear output Rotating gear output allows unlimited movement Can run in excess of 350,000 rpm Lifetime of >7 (10 9 ) revolutions with millions of start/stop cycles demonstrated

25 Summary Designers are confronted with a plethora of Details Design Rules Process Limitations Packaging Concerns Interface issues Modeling Communication is the key!! Teamwork!

26 Let s draw a cantilever! LPCVD 2.25 µm MMpoly4 PECVD LPCVD 2.0 µm SacOx4 (CMP) 2.25 µm MMpoly3 0.2 µm Dimple4 gap PECVD 0.3 µm SacOx2 2.0 µm SacOx3 (CMP) 1.5 µm MMpoly2 1.0 µm MMpoly1 0.4 µm Dimple3 gap 0.3 µm MMpoly0 2.0 µm SacOx µm Thermal SiO µm Silicon Nitride Substrate 6 inch wafer, <100>, n-type- 0.5 µm Dimple1 gap This process is fixed you can t change it (part of the design package as well)

27 Get Started Open Sandia Design tools Open Drawing 1 Check out the tools Demo 3D Viewer Demo 2D Viewer Demo 3D Model MNT Conference 1 Albuquerque, NM - May 2010

28 Draw the beam first Why? Change layer to Poly2! (there s a reason for this just do it) Follow along to create a box Select rectangle and draw the LPCVD PECVD LPCVD PECVD 2.0 µm SacOx4 (CMP) 2.25 µm MMpoly µm MMpoly3 2.0 µm SacOx3 (CMP) 0.4 µm Dimple3 gap 1.5 µm MMpoly2 0.3 µm SacOx2 1.0 µm MMpoly1 2.0 µm SacOx1 0.3 µm MMpoly µm Thermal SiO 0.80 µm Silicon Nitride 2 Substrate 6 inch wafer, <100>, n-type- 0.2 µm Dimple4 gap 0.5 µm Dimple1 gap MNT Conference 1 Albuquerque, NM - May 2010

29 Need a Ground Plane Poly0 is a doped, structural material - selec LPCVD PECVD LPCVD PECVD 0.3 µm SacOx2 2.0 µm SacOx4 (CMP) 2.0 µm SacOx3 (CMP) 2.25 µm MMpoly µm MMpoly3 1.5 µm MMpoly2 1.0 µm MMpoly1 2.0 µm SacOx1 0.3 µm MMpoly µm Silicon Nitride 0.63 µm Thermal SiO 2 Substrate 6 inch wafer, <100>, n-type- 0.2 µm Dimple4 gap 0.4 µm Dimple3 gap 0.5 µm Dimple1 gap MNT Conference 1 Albuquerque, NM - May 2010

30 Ground and Actuator Elements Follow along to create a box Need a post Need an actuator pad MNT Conference 1 Albuquerque, NM - May 2010

31 Connect em! Anchor em SACOX 1 MNT Conference 1 Albuquerque, NM - May 2010

Surface micromachining and Process flow part 1

Surface micromachining and Process flow part 1 Surface micromachining and Process flow part 1 Identify the basic steps of a generic surface micromachining process Identify the critical requirements needed to create a MEMS using surface micromachining

More information

SUMMiT V Five Level Surface Micromachining Technology Design Manual

SUMMiT V Five Level Surface Micromachining Technology Design Manual SUMMiT V Five Level Surface Micromachining Technology Design Manual Version 1.3 09/22/2005 MEMS Devices and Reliability Physics Department Microelectronics Development Laboratory Sandia National Laboratories

More information

4/10/2012. Introduction to Microfabrication. Fabrication

4/10/2012. Introduction to Microfabrication. Fabrication Introduction to Microfabrication Fabrication 1 MEMS Fabrication Flow Basic Process Flow in Micromachining Nadim Maluf, An introduction to Microelectromechanical Systems Engineering 2 Thin Film Deposition

More information

Lecture 5. SOI Micromachining. SOI MUMPs. SOI Micromachining. Silicon-on-Insulator Microstructures. Agenda:

Lecture 5. SOI Micromachining. SOI MUMPs. SOI Micromachining. Silicon-on-Insulator Microstructures. Agenda: EEL6935 Advanced MEMS (Spring 2005) Instructor: Dr. Huikai Xie SOI Micromachining Agenda: SOI Micromachining SOI MUMPs Multi-level structures Lecture 5 Silicon-on-Insulator Microstructures Single-crystal

More information

EE C245 ME C218 Introduction to MEMS Design Fall 2011

EE C245 ME C218 Introduction to MEMS Design Fall 2011 Lecture Outline EE C245 ME C218 Introduction to MEMS Design Fall 2011 Prof. Clark T.-C. Nguyen Dept. of Electrical Engineering & Computer Sciences University of California at Berkeley Berkeley, CA 94720

More information

Cambridge University Press A Guide to Hands-on MEMS Design and Prototyping Joel A. Kubby Excerpt More information.

Cambridge University Press A Guide to Hands-on MEMS Design and Prototyping Joel A. Kubby Excerpt More information. 1 Introduction 1.1 Overview of MEMS fabrication Microelectromechanical systems (MEMS) fabrication developed out of the thin-film processes first used for semiconductor fabrication. To understand the unique

More information

Lecture 10: MultiUser MEMS Process (MUMPS)

Lecture 10: MultiUser MEMS Process (MUMPS) MEMS: Fabrication Lecture 10: MultiUser MEMS Process (MUMPS) Prasanna S. Gandhi Assistant Professor, Department of Mechanical Engineering, Indian Institute of Technology, Bombay, 1 Recap Various VLSI based

More information

Surface Micromachining

Surface Micromachining Surface Micromachining Outline Introduction Material often used in surface micromachining Material selection criteria in surface micromachining Case study: Fabrication of electrostatic motor Major issues

More information

6.777J/2.732J Design and Fabrication of Microelectromechanical Devices Spring Term Solution to Problem Set 2 (16 pts)

6.777J/2.732J Design and Fabrication of Microelectromechanical Devices Spring Term Solution to Problem Set 2 (16 pts) 6.777J/2.732J Design and Fabrication of Microelectromechanical Devices Spring Term 2007 By Brian Taff (Adapted from work by Feras Eid) Solution to Problem Set 2 (16 pts) Issued: Lecture 4 Due: Lecture

More information

Chapter 3 Silicon Device Fabrication Technology

Chapter 3 Silicon Device Fabrication Technology Chapter 3 Silicon Device Fabrication Technology Over 10 15 transistors (or 100,000 for every person in the world) are manufactured every year. VLSI (Very Large Scale Integration) ULSI (Ultra Large Scale

More information

FABRICATION PROCESSES FOR MAGNETIC MICROACTUATORS WITH POLYSILICON FLEXURES. Jack W. Judy and Richard S. Muller

FABRICATION PROCESSES FOR MAGNETIC MICROACTUATORS WITH POLYSILICON FLEXURES. Jack W. Judy and Richard S. Muller FABRICATION PROCESSES FOR MAGNETIC MICROACTUATORS WITH POLYSILICON FLEXURES Jack W. Judy and Richard S. Muller Berkeley Sensor & Actuator Center (BSAC) Department of EECS, University of California, Berkeley,

More information

ME 189 Microsystems Design and Manufacture. Chapter 9. Micromanufacturing

ME 189 Microsystems Design and Manufacture. Chapter 9. Micromanufacturing ME 189 Microsystems Design and Manufacture Chapter 9 Micromanufacturing This chapter will offer an overview of the application of the various fabrication techniques described in Chapter 8 in the manufacturing

More information

Surface Micromachining II

Surface Micromachining II Surface Micromachining II Dr. Thara Srinivasan Lecture 4 Picture credit: Sandia National Lab Lecture Outline Reading From reader: Bustillo, J. et al., Surface Micromachining of Microelectromechanical Systems,

More information

EECS130 Integrated Circuit Devices

EECS130 Integrated Circuit Devices EECS130 Integrated Circuit Devices Professor Ali Javey 9/13/2007 Fabrication Technology Lecture 1 Silicon Device Fabrication Technology Over 10 15 transistors (or 100,000 for every person in the world)

More information

Manufacturing Process

Manufacturing Process Digital Integrated Circuits A Design Perspective Jan M. Rabaey Anantha Chandrakasan Borivoje Nikolic Manufacturing Process July 30, 2002 1 CMOS Process 2 A Modern CMOS Process gate-oxide TiSi 2 AlCu Tungsten

More information

Gaetano L Episcopo. Introduction to MEMS

Gaetano L Episcopo. Introduction to MEMS Gaetano L Episcopo Introduction to MEMS What are MEMS? Micro Electro Mechanichal Systems MEMS are integrated devices, or systems of devices, with microscopic parts, such as: Mechanical Parts Electrical

More information

Sensors and Actuators Designed and Fabricated in a. Micro-Electro-Mechanical-Systems (MEMS) Course. Using Standard MEMS Processes

Sensors and Actuators Designed and Fabricated in a. Micro-Electro-Mechanical-Systems (MEMS) Course. Using Standard MEMS Processes Sensors and Actuators Designed and Fabricated in a Micro-Electro-Mechanical-Systems (MEMS) Course Using Standard MEMS Processes M.G. Guvench University of Southern Maine guvench@maine.edu Abstract Use

More information

Micro-Electro-Mechanical Systems (MEMS) Fabrication. Special Process Modules for MEMS. Principle of Sensing and Actuation

Micro-Electro-Mechanical Systems (MEMS) Fabrication. Special Process Modules for MEMS. Principle of Sensing and Actuation Micro-Electro-Mechanical Systems (MEMS) Fabrication Fabrication Considerations Stress-Strain, Thin-film Stress, Stiction Special Process Modules for MEMS Bonding, Cavity Sealing, Deep RIE, Spatial forming

More information

EE 330 Lecture 9. IC Fabrication Technology Part II. -Oxidation -Epitaxy -Polysilicon -Planarization -Resistance and Capacitance in Interconnects

EE 330 Lecture 9. IC Fabrication Technology Part II. -Oxidation -Epitaxy -Polysilicon -Planarization -Resistance and Capacitance in Interconnects EE 330 Lecture 9 IC Fabrication Technology Part II -Oxidation -Epitaxy -Polysilicon -Planarization -Resistance and Capacitance in Interconnects Review from Last Time Etching Dry etch (anisotropic) SiO

More information

Process Flow in Cross Sections

Process Flow in Cross Sections Process Flow in Cross Sections Process (simplified) 0. Clean wafer in nasty acids (HF, HNO 3, H 2 SO 4,...) --> wear gloves! 1. Grow 500 nm of SiO 2 (by putting the wafer in a furnace with O 2 2. Coat

More information

ELEC 3908, Physical Electronics, Lecture 4. Basic Integrated Circuit Processing

ELEC 3908, Physical Electronics, Lecture 4. Basic Integrated Circuit Processing ELEC 3908, Physical Electronics, Lecture 4 Basic Integrated Circuit Processing Lecture Outline Details of the physical structure of devices will be very important in developing models for electrical behavior

More information

Microfabrication of Heterogeneous, Optimized Compliant Mechanisms SUNFEST 2001 Luo Chen Advisor: Professor G.K. Ananthasuresh

Microfabrication of Heterogeneous, Optimized Compliant Mechanisms SUNFEST 2001 Luo Chen Advisor: Professor G.K. Ananthasuresh Microfabrication of Heterogeneous, Optimized Compliant Mechanisms SUNFEST 2001 Luo Chen Advisor: Professor G.K. Ananthasuresh Fig. 1. Single-material Heatuator with selective doping on one arm (G.K. Ananthasuresh)

More information

Proceedings Post Fabrication Processing of Foundry MEMS Structures Exhibiting Large, Out-of-Plane Deflections

Proceedings Post Fabrication Processing of Foundry MEMS Structures Exhibiting Large, Out-of-Plane Deflections Proceedings Post Fabrication Processing of Foundry MEMS Structures Exhibiting Large, Out-of-Plane Deflections LaVern Starman 1, *, John Walton 1, Harris Hall 1 and Robert Lake 2 1 Sensors Directorate,

More information

CMOS Manufacturing Process

CMOS Manufacturing Process CMOS Manufacturing Process CMOS Process A Modern CMOS Process gate-oxide TiSi 2 AlCu Tungsten SiO 2 n+ p-well p-epi poly n-well p+ SiO 2 p+ Dual-Well Trench-Isolated CMOS Process Circuit Under Design V

More information

Supporting Information

Supporting Information Supporting Information Fast-Response, Sensitivitive and Low-Powered Chemosensors by Fusing Nanostructured Porous Thin Film and IDEs-Microheater Chip Zhengfei Dai,, Lei Xu,#,, Guotao Duan *,, Tie Li *,,

More information

EE40 Lec 22. IC Fabrication Technology. Prof. Nathan Cheung 11/19/2009

EE40 Lec 22. IC Fabrication Technology. Prof. Nathan Cheung 11/19/2009 Suggested Reading EE40 Lec 22 IC Fabrication Technology Prof. Nathan Cheung 11/19/2009 300mm Fab Tour http://www-03.ibm.com/technology/manufacturing/technology_tour_300mm_foundry.html Overview of IC Technology

More information

EE 434 Lecture 9. IC Fabrication Technology

EE 434 Lecture 9. IC Fabrication Technology EE 434 Lecture 9 IC Fabrication Technology Quiz 7 The layout of a film resistor with electrodes A and B is shown. If the sheet resistance of the film is 40 /, determine the resistance between nodes A and

More information

Micro-Scale Engineering I Microelectromechanical Systems (MEMS) Y. C. Lee

Micro-Scale Engineering I Microelectromechanical Systems (MEMS) Y. C. Lee Micro-Scale Engineering I Microelectromechanical Systems (MEMS) Y. C. Lee Department of Mechanical Engineering University of Colorado Boulder, CO 80309-0427 leeyc@colorado.edu September 2, 2008 1 Three

More information

Introduction to Microeletromechanical Systems (MEMS) Lecture 5 Topics. JDS Uniphase MUMPs

Introduction to Microeletromechanical Systems (MEMS) Lecture 5 Topics. JDS Uniphase MUMPs Introduction to Microeletromechanical Systems (MEMS) Lecture 5 Topics JDS Uniphase MUMPS Foundry Process and Devices Foundry Process Sequence Design Rules and Process Interactions Examples CMOS for MEMS

More information

There are basically two approaches for bulk micromachining of. silicon, wet and dry. Wet bulk micromachining is usually carried out

There are basically two approaches for bulk micromachining of. silicon, wet and dry. Wet bulk micromachining is usually carried out 57 Chapter 3 Fabrication of Accelerometer 3.1 Introduction There are basically two approaches for bulk micromachining of silicon, wet and dry. Wet bulk micromachining is usually carried out using anisotropic

More information

Cost of Integrated Circuits

Cost of Integrated Circuits Cost of IC Design 1 Cost of Integrated Circuits NRE (Non-Recurrent Engineering) costs fixed design time and effort, mask generation independent of sales volume / number of products one-time cost factor

More information

Process Integration. NMOS Generic NMOS Process Flow. CMOS - The MOSIS Process Flow

Process Integration. NMOS Generic NMOS Process Flow. CMOS - The MOSIS Process Flow Process Integration Self-aligned Techniques LOCOS- self-aligned channel stop Self-aligned Source/Drain Lightly Doped Drain (LDD) Self-aligned silicide (SALICIDE) Self-aligned oxide gap MEMS Release Techniques

More information

Fabrication and Layout

Fabrication and Layout ECEN454 Digital Integrated Circuit Design Fabrication and Layout ECEN 454 3.1 A Glimpse at MOS Device Polysilicon Aluminum ECEN 475 4.2 1 Material Classification Insulators Glass, diamond, silicon oxide

More information

Lecture 7 CMOS MEMS. CMOS MEMS Processes. CMOS MEMS Processes. Why CMOS-MEMS? Agenda: CMOS MEMS: Fabrication. MEMS structures can be made

Lecture 7 CMOS MEMS. CMOS MEMS Processes. CMOS MEMS Processes. Why CMOS-MEMS? Agenda: CMOS MEMS: Fabrication. MEMS structures can be made EEL6935 Advanced MEMS (Spring 2005) Instructor: Dr. Huikai Xie CMOS MEMS Agenda: Lecture 7 CMOS MEMS: Fabrication Pre-CMOS Intra-CMOS Post-CMOS Deposition Etching Why CMOS-MEMS? Smart on-chip CMOS circuitry

More information

Lecture 19 Microfabrication 4/1/03 Prof. Andy Neureuther

Lecture 19 Microfabrication 4/1/03 Prof. Andy Neureuther EECS 40 Spring 2003 Lecture 19 Microfabrication 4/1/03 Prof. ndy Neureuther How are Integrated Circuits made? Silicon wafers Oxide formation by growth or deposition Other films Pattern transfer by lithography

More information

SURFACE MICROMACHINING

SURFACE MICROMACHINING SURFACE MICROMACHINING Features are built up, layer by layer on the surface of a substrate. Surface micromachined devices are much smaller than bulk micromachined components. Nature of deposition process

More information

Poly-SiGe MEMS actuators for adaptive optics

Poly-SiGe MEMS actuators for adaptive optics Poly-SiGe MEMS actuators for adaptive optics Blake C.-Y. Lin a,b, Tsu-Jae King a, and Richard S. Muller a,b a Department of Electrical Engineering and Computer Sciences, b Berkeley Sensor and Actuator

More information

Applications of High-Performance MEMS Pressure Sensors Based on Dissolved Wafer Process

Applications of High-Performance MEMS Pressure Sensors Based on Dissolved Wafer Process Applications of High-Performance MEMS Pressure Sensors Based on Dissolved Wafer Process Srinivas Tadigadapa and Sonbol Massoud-Ansari Integrated Sensing Systems (ISSYS) Inc., 387 Airport Industrial Drive,

More information

A discussion of crystal growth, lithography, etching, doping, and device structures is presented in

A discussion of crystal growth, lithography, etching, doping, and device structures is presented in Chapter 5 PROCESSING OF DEVICES A discussion of crystal growth, lithography, etching, doping, and device structures is presented in the following overview gures. SEMICONDUCTOR DEVICE PROCESSING: AN OVERVIEW

More information

3.155J / 6.152J Micro/Nano Processing Technology TAKE-HOME QUIZ FALL TERM 2005

3.155J / 6.152J Micro/Nano Processing Technology TAKE-HOME QUIZ FALL TERM 2005 3.155J / 6.152J Micro/Nano Processing Technology TAKE-HOME QUIZ FALL TERM 2005 1) This is an open book, take-home quiz. You are not to consult with other class members or anyone else. You may discuss the

More information

Semiconductor Manufacturing Technology. IC Fabrication Process Overview

Semiconductor Manufacturing Technology. IC Fabrication Process Overview Semiconductor Manufacturing Technology Michael Quirk & Julian Serda October 00 by Prentice Hall Chapter 9 IC Fabrication Process Overview /4 Objectives After studying the material in this chapter, you

More information

VLSI INTRODUCTION P.VIDYA SAGAR ( ASSOCIATE PROFESSOR) Department of Electronics and Communication Engineering, VBIT

VLSI INTRODUCTION P.VIDYA SAGAR ( ASSOCIATE PROFESSOR) Department of Electronics and Communication Engineering, VBIT VLSI INTRODUCTION P.VIDYA SAGAR ( ASSOCIATE PROFESSOR) contents UNIT I INTRODUCTION: Introduction to IC Technology MOS, PMOS, NMOS, CMOS & BiCMOS technologies. BASIC ELECTRICAL PROPERTIES : Basic Electrical

More information

Microstructures using RF sputtered PSG film as a sacrificial layer in surface micromachining

Microstructures using RF sputtered PSG film as a sacrificial layer in surface micromachining Sādhanā Vol. 34, Part 4, August 2009, pp. 557 562. Printed in India Microstructures using RF sputtered PSG film as a sacrificial layer in surface micromachining VIVEKANAND BHATT 1,, SUDHIR CHANDRA 1 and

More information

Shock Testing of MEMS Devices

Shock Testing of MEMS Devices Shock Testing of MEMS Devices Michelle A. Duesterhaus Vesta I. Bateman Darren A. Hoke Sandia National Laboratories, P.O. Box 5800 MS-1310, Albuquerque, NM 87185-1310 ABSTRACT Micro-Electro-Mechanical Systems

More information

Silicon Wafer Processing PAKAGING AND TEST

Silicon Wafer Processing PAKAGING AND TEST Silicon Wafer Processing PAKAGING AND TEST Parametrical test using test structures regularly distributed in the wafer Wafer die test marking defective dies dies separation die fixing (not marked as defective)

More information

5.8 Diaphragm Uniaxial Optical Accelerometer

5.8 Diaphragm Uniaxial Optical Accelerometer 5.8 Diaphragm Uniaxial Optical Accelerometer Optical accelerometers are based on the BESOI (Bond and Etch back Silicon On Insulator) wafers, supplied by Shin-Etsu with (100) orientation, 4 diameter and

More information

Regents of the University of California

Regents of the University of California Surface-Micromachining Process Flow Photoresist Sacrificial Oxide Structural Polysilcon Deposit sacrificial PSG: Target = 2 m 1 hr. 40 min. LPCVD @450 o C Densify the PSG Anneal @950 o C for 30 min. Lithography

More information

SOIMUMPs Design Handbook

SOIMUMPs Design Handbook SOIMUMPs Design Handbook a MUMPs process C. J. Han, Allen Cowen, Greg Hames and Busbee Hardy MEMScAP Revision 3.0 Copyright 2002 by MEMScAP. All rights reserved. Permission to use and copy for internal,

More information

ME 141B: The MEMS Class Introduction to MEMS and MEMS Design. Sumita Pennathur UCSB

ME 141B: The MEMS Class Introduction to MEMS and MEMS Design. Sumita Pennathur UCSB ME 141B: The MEMS Class Introduction to MEMS and MEMS Design Sumita Pennathur UCSB Outline today Introduction to thin films Oxidation Deal-grove model CVD Epitaxy Electrodeposition 10/6/10 2/45 Creating

More information

Shock Testing of Surface Micromachined MEMS Devices

Shock Testing of Surface Micromachined MEMS Devices Shock Testing of Surface Micromachined MEMS Devices Michelle A. Duesterhaus* Vesta I. Bateman** Darren A. Hoke * *Electro-Mechanical Engineering (2614) ** Solid Mechanics Engineering, Mechanical Shock

More information

4. Thermal Oxidation. a) Equipment Atmospheric Furnace

4. Thermal Oxidation. a) Equipment Atmospheric Furnace 4. Thermal Oxidation a) Equipment Atmospheric Furnace Oxidation requires precise control of: temperature, T ambient gas, G time spent at any given T & G, t Vito Logiudice 34 4. Thermal Oxidation b) Mechanism

More information

3. Overview of Microfabrication Techniques

3. Overview of Microfabrication Techniques 3. Overview of Microfabrication Techniques The Si revolution First Transistor Bell Labs (1947) Si integrated circuits Texas Instruments (~1960) Modern ICs More? Check out: http://www.pbs.org/transistor/background1/events/miraclemo.html

More information

CTN 10/1/09. EE 245: Introduction to MEMS Lecture 11: Bulk Micromachining. Copyright 2009 Regents of the University of California

CTN 10/1/09. EE 245: Introduction to MEMS Lecture 11: Bulk Micromachining. Copyright 2009 Regents of the University of California MUMPS: MultiUser MEMS ProcesS Foundry MEMS: The MUMPS Process Originally created by the Microelectronics Center of North Carolina (MCNC) now owned by MEMSCAP in France Three-level polysilicon surface micromachining

More information

Metallization deposition and etching. Material mainly taken from Campbell, UCCS

Metallization deposition and etching. Material mainly taken from Campbell, UCCS Metallization deposition and etching Material mainly taken from Campbell, UCCS Application Metallization is back-end processing Metals used are aluminum and copper Mainly involves deposition and etching,

More information

Lecture 6. Through-Wafer Interconnect. Agenda: Through-wafer Interconnect Polymer MEMS. Through-Wafer Interconnect -1. Through-Wafer Interconnect -2

Lecture 6. Through-Wafer Interconnect. Agenda: Through-wafer Interconnect Polymer MEMS. Through-Wafer Interconnect -1. Through-Wafer Interconnect -2 Agenda: EEL6935 Advanced MEMS (Spring 2005) Instructor: Dr. Huikai Xie Lecture 6 Through-wafer Interconnect EEL6935 Advanced MEMS 2005 H. Xie 1/21/2005 1 Motivations: Wafer-level packaging CMOS 3D Integration

More information

FABRICATION of MOSFETs

FABRICATION of MOSFETs FABRICATION of MOSFETs CMOS fabrication sequence -p-type silicon substrate wafer -creation of n-well regions for pmos transistors, -impurity implantation into the substrate. -thick oxide is grown in the

More information

PRESSURE SENSOR MODEL ACTIVITY. Pressure Sensor Model Activity

PRESSURE SENSOR MODEL ACTIVITY. Pressure Sensor Model Activity PRESSURE SENSOR MODEL ACTIVITY Pressure Sensor Model Activity Unit Overview This activity uses household materials to build a pressure sensor Wheatstone Bridge sensing circuit Flexible diaphragm Reference

More information

A modular process for integrating thick polysilicon MEMS devices with sub-micron CMOS

A modular process for integrating thick polysilicon MEMS devices with sub-micron CMOS A modular process for integrating thick polysilicon MEMS devices with sub-micron CMOS John Yasaitis a, Michael Judy a, Tim Brosnihan a, Peter Garone a, Nikolay Pokrovskiy a, Debbie Sniderman a,scottlimb

More information

HOMEWORK 4 and 5. March 15, Homework is due on Monday March 30, 2009 in Class. Answer the following questions from the Course Textbook:

HOMEWORK 4 and 5. March 15, Homework is due on Monday March 30, 2009 in Class. Answer the following questions from the Course Textbook: HOMEWORK 4 and 5 March 15, 2009 Homework is due on Monday March 30, 2009 in Class. Chapter 7 Answer the following questions from the Course Textbook: 7.2, 7.3, 7.4, 7.5, 7.6*, 7.7, 7.9*, 7.10*, 7.16, 7.17*,

More information

Lecture 22: Integrated circuit fabrication

Lecture 22: Integrated circuit fabrication Lecture 22: Integrated circuit fabrication Contents 1 Introduction 1 2 Layering 4 3 Patterning 7 4 Doping 8 4.1 Thermal diffusion......................... 10 4.2 Ion implantation.........................

More information

Semiconductor Technology

Semiconductor Technology Semiconductor Technology from A to Z Oxidation www.halbleiter.org Contents Contents List of Figures List of Tables II III 1 Oxidation 1 1.1 Overview..................................... 1 1.1.1 Application...............................

More information

Chapter 2 MOS Fabrication Technology

Chapter 2 MOS Fabrication Technology Chapter 2 MOS Fabrication Technology Abstract This chapter is concerned with the fabrication of metal oxide semiconductor (MOS) technology. Various processes such as wafer fabrication, oxidation, mask

More information

UT Austin, ECE Department VLSI Design 2. CMOS Fabrication, Layout Rules

UT Austin, ECE Department VLSI Design 2. CMOS Fabrication, Layout Rules 2. CMOS Fabrication, Layout, Design Rules Last module: Introduction to the course How a transistor works CMOS transistors This module: CMOS Fabrication Design Rules CMOS Fabrication CMOS transistors are

More information

Single crystal silicon supported thin film micromirrors for optical applications

Single crystal silicon supported thin film micromirrors for optical applications Single crystal silicon supported thin film micromirrors for optical applications Zhimin J. Yao* Noel C. MacDonald Cornell University School of Electrical Engineering and Cornell Nanofabrication Facility

More information

MEMS prototyping using RF sputtered films

MEMS prototyping using RF sputtered films Indian Journal of Pure & Applied Physics Vol. 45, April 2007, pp. 326-331 MEMS prototyping using RF sputtered films Sudhir Chandra, Vivekanand Bhatt, Ravindra Singh, Preeti Sharma & Prem Pal* Centre for

More information

Isolation Technology. Dr. Lynn Fuller

Isolation Technology. Dr. Lynn Fuller ROCHESTER INSTITUTE OF TECHNOLOGY MICROELECTRONIC ENGINEERING Isolation Technology Dr. Lynn Fuller Motorola Professor 82 Lomb Memorial Drive Rochester, NY 14623-5604 Tel (585) 475-2035 Fax (585) 475-5041

More information

CMOS Manufacturing process. Circuit designer. Design rule set. Process engineer. Set of optical masks. Fabrication process.

CMOS Manufacturing process. Circuit designer. Design rule set. Process engineer. Set of optical masks. Fabrication process. CMOS Manufacturing process Circuit design Set of optical masks Fabrication process Circuit designer Design rule set Process engineer All material: Chap. 2 of J. Rabaey, A. Chandrakasan, B. Nikolic, Digital

More information

KGC SCIENTIFIC Making of a Chip

KGC SCIENTIFIC  Making of a Chip KGC SCIENTIFIC www.kgcscientific.com Making of a Chip FROM THE SAND TO THE PACKAGE, A DIAGRAM TO UNDERSTAND HOW CPU IS MADE? Sand CPU CHAIN ANALYSIS OF SEMICONDUCTOR Material for manufacturing process

More information

FABRICATION ENGINEERING MICRO- NANOSCALE ATTHE AND. Fourth Edition STEPHEN A. CAMPBELL. of Minnesota. University OXFORD UNIVERSITY PRESS

FABRICATION ENGINEERING MICRO- NANOSCALE ATTHE AND. Fourth Edition STEPHEN A. CAMPBELL. of Minnesota. University OXFORD UNIVERSITY PRESS AND FABRICATION ENGINEERING ATTHE MICRO- NANOSCALE Fourth Edition STEPHEN A. CAMPBELL University of Minnesota New York Oxford OXFORD UNIVERSITY PRESS CONTENTS Preface xiii prrt i OVERVIEW AND MATERIALS

More information

200mm Next Generation MEMS Technology update. Florent Ducrot

200mm Next Generation MEMS Technology update. Florent Ducrot 200mm Next Generation MEMS Technology update Florent Ducrot The Most Exciting Industries on Earth Semiconductor Display Solar 20,000,000x reduction in COST PER TRANSISTOR in 30 years 1 20x reduction in

More information

PROCESSING OF INTEGRATED CIRCUITS

PROCESSING OF INTEGRATED CIRCUITS PROCESSING OF INTEGRATED CIRCUITS Overview of IC Processing (Part I) Silicon Processing Lithography Layer Processes Use in IC Fabrication (Part II) Integrating the Fabrication Steps IC Packaging (Part

More information

Fabrication and Layout

Fabrication and Layout Fabrication and Layout Kenneth Yun UC San Diego Adapted from EE271 notes, Stanford University Overview Semiconductor properties How chips are made Design rules for layout Reading Fabrication: W&E 3.1,

More information

Uncrosslinked SU-8 as a sacrificial material

Uncrosslinked SU-8 as a sacrificial material INSTITUTE OFPHYSICS PUBLISHING JOURNAL OF MICROMECHANICS AND MICROENGINEERING J. Micromech. Microeng. 15 (2005) N1 N5 doi:10.1088/0960-1317/15/1/n01 TECHNICAL NOTE Uncrosslinked as a sacrificial material

More information

Integrated Processes. Lecture Outline

Integrated Processes. Lecture Outline Integrated Processes Thara Srinivasan Lecture 14 Picture credit: Lemkin et al. Lecture Outline From reader Bustillo, J. et al., Surface micromachining of MEMS, pp. 1556-9. A.E. Franke et al., Polycrystalline

More information

Atomic Layer Deposition(ALD)

Atomic Layer Deposition(ALD) Atomic Layer Deposition(ALD) AlO x for diffusion barriers OLED displays http://en.wikipedia.org/wiki/atomic_layer_deposition#/media/file:ald_schematics.jpg Lam s market-leading ALTUS systems combine CVD

More information

Temperature Scales. Questions. Temperature Conversions 7/21/2010. EE580 Solar Cells Todd J. Kaiser. Thermally Activated Processes

Temperature Scales. Questions. Temperature Conversions 7/21/2010. EE580 Solar Cells Todd J. Kaiser. Thermally Activated Processes 7/1/010 EE80 Solar Cells Todd J. Kaiser Flow of Wafer in Fabrication Lecture 0 Microfabrication A combination of Applied Chemistry, Physics and ptics Thermal Processes Diffusion & xidation Photolithograpy

More information

MEMS and Nanotechnology

MEMS and Nanotechnology MEMS and Nanotechnology slide 1 table of contents 1. 2. 3. 4. 5. 6. introduction definition of MEMS & NEMS active principles types of MEMS fabrication problems with the fabrication slide 2 progress 1.

More information

Surface Micromachining Process for the Integration of AlN Piezoelectric Microstructures

Surface Micromachining Process for the Integration of AlN Piezoelectric Microstructures Surface Micromachining Process for the Integration of AlN Piezoelectric Microstructures Saravanan. S, Erwin Berenschot, Gijs Krijnen and Miko Elwenspoek Transducers Science and Technology Laboratory University

More information

CHAPTER 1 HOW SEMICONDUCTOR CHIPS ARE MADE

CHAPTER 1 HOW SEMICONDUCTOR CHIPS ARE MADE CHAPTER 1 HOW SEMICONDUCTOR CHIPS ARE MADE Hwaiyu Geng Hewlett-Packard Company Palo Alto, California Lin Zhou Intel Corporation Hillsboro, Oregon 1.1 INTRODUCTION Over the past decades, an information

More information

VLSI Systems and Computer Architecture Lab

VLSI Systems and Computer Architecture Lab ΚΥΚΛΩΜΑΤΑ VLSI Πανεπιστήμιο Ιωαννίνων CMOS Technology Τμήμα Μηχανικών Η/Υ και Πληροφορικής 1 From the book: An Introduction ti to VLSI Process By: W. Maly ΚΥΚΛΩΜΑΤΑ VLSI Διάρθρωση 1. N well CMOS 2. Active

More information

A Production-Proven Shallow Trench Isolation (STI) Solution Using Novel CMP Concepts*

A Production-Proven Shallow Trench Isolation (STI) Solution Using Novel CMP Concepts* A Production-Proven Shallow Trench Isolation (STI) Solution Using Novel CMP Concepts* Raymond R. Jin, Jeffrey David, Bob Abbassi, Tom Osterheld, Fritz Redeker Applied Materials, 3111 Coronado Drive, M/S

More information

Isolation of elements

Isolation of elements 1 In an IC, devices on the same substrate must be isolated from one another so that there is no current conduction between them. Isolation uses either the junction or dielectric technique or a combination

More information

Materials for MEMS. Dr. Yael Hanein. 11 March 2004 Materials Applications Yael Hanein

Materials for MEMS. Dr. Yael Hanein. 11 March 2004 Materials Applications Yael Hanein Materials for MEMS Dr. Yael Hanein Materials for MEMS MEMS (introduction) Materials used in MEMS Material properties Standard MEMS processes MEMS The world s smallest guitar is about 10 micrometers long

More information

Procese de depunere in sistemul Plasma Enhanced Chemical Vapor Deposition (PECVD)

Procese de depunere in sistemul Plasma Enhanced Chemical Vapor Deposition (PECVD) Procese de depunere in sistemul Plasma Enhanced Chemical Vapor Deposition (PECVD) Ciprian Iliescu Conţinutul acestui material nu reprezintă in mod obligatoriu poziţia oficială a Uniunii Europene sau a

More information

KrF Excimer Laser Micromachining of Silicon for Micro- Cantilever Applications

KrF Excimer Laser Micromachining of Silicon for Micro- Cantilever Applications OPEN ACCESS Conference Proceedings Paper Sensors and Applications www.mdpi.com/journal/sensors KrF Excimer Laser Micromachining of Silicon for Micro- Cantilever Applications A.F.M. Anuar 1*, Y. Wahab,

More information

2242 ieee transactions on ultrasonics, ferroelectrics, and frequency control, vol. 52, no. 12, december 2005

2242 ieee transactions on ultrasonics, ferroelectrics, and frequency control, vol. 52, no. 12, december 2005 2242 ieee transactions on ultrasonics, ferroelectrics, and frequency control, vol. 52, no. 12, december 2005 Capacitive Micromachined Ultrasonic Transducers: Fabrication Technology Arif Sanlı Ergun, Member,

More information

Figure 2.3 (cont., p. 60) (e) Block diagram of Pentium 4 processor with 42 million transistors (2000). [Courtesy Intel Corporation.

Figure 2.3 (cont., p. 60) (e) Block diagram of Pentium 4 processor with 42 million transistors (2000). [Courtesy Intel Corporation. Figure 2.1 (p. 58) Basic fabrication steps in the silicon planar process: (a) oxide formation, (b) selective oxide removal, (c) deposition of dopant atoms on wafer, (d) diffusion of dopant atoms into exposed

More information

EEC 118 Lecture #5: MOS Fabrication. Rajeevan Amirtharajah University of California, Davis Jeff Parkhurst Intel Corporation

EEC 118 Lecture #5: MOS Fabrication. Rajeevan Amirtharajah University of California, Davis Jeff Parkhurst Intel Corporation EEC 118 Lecture #5: MOS Fabrication Rajeevan Amirtharajah University of California, Davis Jeff Parkhurst Intel Corporation Announcements Lab 3 this week, report due next week HW 3 due this Friday at 4

More information

Fraunhofer ENAS Current results and future approaches in Wafer-level-packaging FRANK ROSCHER

Fraunhofer ENAS Current results and future approaches in Wafer-level-packaging FRANK ROSCHER Fraunhofer ENAS - Current results and future approaches in Wafer-level-packaging FRANK ROSCHER Fraunhofer ENAS Chemnitz System Packaging Page 1 System Packaging Outline: Wafer level packaging for MEMS

More information

Lab #2 Wafer Cleaning (RCA cleaning)

Lab #2 Wafer Cleaning (RCA cleaning) Lab #2 Wafer Cleaning (RCA cleaning) RCA Cleaning System Used: Wet Bench 1, Bay1, Nanofabrication Center Chemicals Used: H 2 O : NH 4 OH : H 2 O 2 (5 : 1 : 1) H 2 O : HF (10 : 1) H 2 O : HCl : H 2 O 2

More information

Thin. Smooth. Diamond.

Thin. Smooth. Diamond. UNCD Wafers Thin. Smooth. Diamond. UNCD Wafers - A Family of Diamond Material UNCD is Advanced Diamond Technologies (ADT) brand name for a family of thin fi lm diamond products. UNCD Aqua The Aqua series

More information

TGV and Integrated Electronics

TGV and Integrated Electronics TGV and Integrated Electronics Shin Takahashi ASAHI GLASS CO., LTD. 1 Ambient Intelligence Green Energy/Environment Smart Factory Smart Mobility Smart Mobile Devices Bio/Medical Security/Biometrics 2 Glass

More information

Report 1. B. Starting Wafer Specs Number: 10 Total, 6 Device and 4 Test wafers

Report 1. B. Starting Wafer Specs Number: 10 Total, 6 Device and 4 Test wafers Aaron Pederson EE 432 Lab Dr. Meng Lu netid: abp250 Lab instructor: Yunfei Zhao Report 1 A. Overview The goal of this lab is to go through the semiconductor fabrication process from start to finish. This

More information

EXCIMER LASER ANNEALING FOR LOW- TEMPERATURE POLYSILICON THIN FILM TRANSISTOR FABRICATION ON PLASTIC SUBSTRATES

EXCIMER LASER ANNEALING FOR LOW- TEMPERATURE POLYSILICON THIN FILM TRANSISTOR FABRICATION ON PLASTIC SUBSTRATES EXCIMER LASER ANNEALING FOR LOW- TEMPERATURE POLYSILICON THIN FILM TRANSISTOR FABRICATION ON PLASTIC SUBSTRATES G. Fortunato, A. Pecora, L. Maiolo, M. Cuscunà, D. Simeone, A. Minotti, and L. Mariucci CNR-IMM,

More information

ENG/PHYS3320 Microsystems Technology Chapter 2 Fabrication of Microsystems

ENG/PHYS3320 Microsystems Technology Chapter 2 Fabrication of Microsystems ENG/PHYS3320 Microsystems Technology Chapter 2 Fabrication of Microsystems ENG/PHYS3320: R.I. Hornsey Fab: 1 Fabrication Many of the new transducers are based on a technology known as micromachining a

More information

EE 560 FABRICATION OF MOS CIRCUITS. Kenneth R. Laker, University of Pennsylvania

EE 560 FABRICATION OF MOS CIRCUITS. Kenneth R. Laker, University of Pennsylvania 1 EE 560 FABRICATION OF MOS CIRCUITS 2 CMOS CHIP MANUFACTRING STEPS Substrate Wafer Wafer Fabrication (diffusion, oxidation, photomasking, ion implantation, thin film deposition, etc.) Finished Wafer Wafer

More information

Investigation of ProTEX PSB Thin Film as Photosensitive Layer for MEMS capacitive pressure sensor diaphragm based Si/SiC Wafer

Investigation of ProTEX PSB Thin Film as Photosensitive Layer for MEMS capacitive pressure sensor diaphragm based Si/SiC Wafer Investigation of ProTEX PSB Thin Film as Photosensitive Layer for MEMS capacitive pressure sensor diaphragm based Si/SiC Wafer Author Marsi, Noraini, Majlis, Burhanuddin Yeop, Hamzah, Azrul Azlan, Mohd-Yasin,

More information

Bulk Silicon Micromachining

Bulk Silicon Micromachining Bulk Silicon Micromachining Micro Actuators, Sensors, Systems Group University of Illinois at Urbana-Champaign Outline Types of bulk micromachining silicon anisotropic etching crystal orientation isotropic

More information

Design and fabrication of MEMS devices using the integration of MUMPs, trench-refilled molding, DRIE and bulk silicon etching processes

Design and fabrication of MEMS devices using the integration of MUMPs, trench-refilled molding, DRIE and bulk silicon etching processes TB, KR, JMM/184987, 3/12/2004 INSTITUTE OF PHYSICS PUBLISHING JOURNAL OF MICROMECHANICS AND MICROENGINEERING J. Micromech. Microeng. 15 (2005) 1 8 doi:10.1088/0960-1317/15/0/000 Design and fabrication

More information

Overview of CMP for TSV Applications. Robert L. Rhoades, Ph.D. Presentation for AVS Joint Meeting June 2013 San Jose, CA

Overview of CMP for TSV Applications. Robert L. Rhoades, Ph.D. Presentation for AVS Joint Meeting June 2013 San Jose, CA Overview of CMP for TSV Applications Robert L. Rhoades, Ph.D. Presentation for AVS Joint Meeting June 2013 San Jose, CA Outline TSV s and the Role of CMP TSV Pattern and Fill TSV Reveal (non-selective)

More information