1 MARCH 2017 FILM DEPOSITION NANOTECHNOLOGY
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1 1 MARCH 2017 FILM DEPOSITION NANOTECHNOLOGY
2 PRESENTATION Pedro C. Feijoo FABRICATION TECHNOLOGIES FOR NANOELECTRONIC DEVICES. PEDRO C. FEIJOO 2
3 FILM GROWTH Chemical vapor deposition (CVD)/Vapor phase epitaxy (VPE) Atmospheric pressure CVD (APCVD) Low pressure CVD (LPCVD) Metal organic chemical vapor deposition (MOCVD) Plasma enhanced chemical vapor deposition (PECVD) Atomic layer deposition (ALD) Physical vapor deposition (PVD) Evaporation Sputtering Pulsed laser deposition/laser sputtering/laser ablation deposition (PLD) Molecular beam epitaxy (MBE) Electrochemical forming Electrodeposition FABRICATION TECHNOLOGIES FOR NANOELECTRONIC DEVICES. PEDRO C. FEIJOO 3
4 OUTLINE 1. CONCEPTS 2. TYPES OF TECHNIQUES 3. TECHNIQUES FABRICATION TECHNOLOGIES FOR NANOELECTRONIC DEVICES. PEDRO C. FEIJOO 4
5 CONCEPTS 1. Epitaxial growth and Strain Epitaxial growth: CVD and MBE 2. Step coverage Conformal film Non-conformal film FABRICATION TECHNOLOGIES FOR NANOELECTRONIC DEVICES. PEDRO C. FEIJOO 5
6 CONCEPTS 3. Plasma is a excited and ionized gas. It appears when there is an intense electric field that crosses a gas, especially when the pressure is low. Ionized particles are more prone to react. Ionized particles are accelerated by the electric field. FABRICATION TECHNOLOGIES FOR NANOELECTRONIC DEVICES. PEDRO C. FEIJOO 6
7 FILM GROWTH CLASSIFICATION Chemical Vapor Deposition (CVD) Atoms react at the substrate surface, reaching there by diffusiveconvective mass transfer. Physical Vapor Deposition (PVD) The material is deposited by direct line-of-sight impigement from a source. FABRICATION TECHNOLOGIES FOR NANOELECTRONIC DEVICES. PEDRO C. FEIJOO 7
8 FILM GROWTH CLASSIFICATION Electrochemical forming It occurs inside an electrolytic cell. A bias is imposed. Disolved ions deposit on the wafer surface. 5s FABRICATION TECHNOLOGIES FOR NANOELECTRONIC DEVICES. PEDRO C. FEIJOO 8
9 ATMOSFERIC PRESSURE CVD (APCVD) kpa (1 atm = Pa) Substrate temperatures: C (low T) or >850 C (high T) for epitaxies. Simple, high deposition rate and low temperatures Poor step coverage and contamination Used to deposit Si or SiO 2 on Si. FABRICATION TECHNOLOGIES FOR NANOELECTRONIC DEVICES. PEDRO C. FEIJOO 9
10 LOW PRESSURE CVD (LPCVD) Pa ( atm) Substrate temperatures: C (moderate). Pure and uniform films, step coverage, large wafer capacity Low deposition rate Used to deposit poly-si, Si 3 N 4, W, SiO 2 FABRICATION TECHNOLOGIES FOR NANOELECTRONIC DEVICES. PEDRO C. FEIJOO 10
11 PLASMA ENHANCED CVD (PECVD) Pa (10-3 atm) Substrate temperatures: C (low). Low temperatures, fast, adhesion, step coverage and low pinhole Contamination and plasma damage Used to deposit Si 3 N 4, insulators over metal... FABRICATION TECHNOLOGIES FOR NANOELECTRONIC DEVICES. PEDRO C. FEIJOO 11
12 METAL ORGANIC CVD (MOCVD) Use of metal-organic gases Epitaxies over large areas Highly toxic and expensive gases. Very important industrial technique. Used to compound semiconductors, like AlGaAs on GaAs substrate. AsH 3 = arsine DEZn = Zn(C 2 H 5 ) 2 TMGa = Ga(CH 3 ) 3 TMAl = Al(CH 3 ) 3 FABRICATION TECHNOLOGIES FOR NANOELECTRONIC DEVICES. PEDRO C. FEIJOO 12
13 METAL ORGANIC CVD (MOCVD) MOCVD (2/2) FABRICATION TECHNOLOGIES FOR NANOELECTRONIC DEVICES. PEDRO C. FEIJOO 13
14 ATOMIC LAYER DEPOSITION In ALD, the reaction at the wafer surface takes place in two steps: sequential deposition of individual monolayers. Each step saturates so one monolayer is deposited after cycle. Substrate temperatures: ~400 C Thickness, step coverage and composition control up to the atomic level Slowness Very thin and with low density of defects films. FABRICATION TECHNOLOGIES FOR NANOELECTRONIC DEVICES. PEDRO C. FEIJOO 14
15 EVAPORATION ~ 0.01 Pa Simple and low cost. Bad adhesion Used typically for metallic elements (Al, Ti, Ag, Au ) FABRICATION TECHNOLOGIES FOR NANOELECTRONIC DEVICES. PEDRO C. FEIJOO 15
16 SPUTTERING Target refrigeration Gas input Radiofrequency Target Vacuum system Substrate Plasma Substrate holder and heater FABRICATION TECHNOLOGIES FOR NANOELECTRONIC DEVICES. PEDRO C. FEIJOO 16
17 SPUTTERING (2/2) ~0.01 Pa Ar plasma Simple and low cost, good adhesion Slower deposition rate, difficult control process, plasma damage Also for compounds (Al 2 O 3, Au, Cr, Mo, SiO 2, Si 3 N 4 ) FABRICATION TECHNOLOGIES FOR NANOELECTRONIC DEVICES. PEDRO C. FEIJOO 17
18 PULSED LASER DEPOSITION (PLD) /LASER SPUTTERING/LASER ABLATION ~ 0.01 Pa Short highly-energetic smallwavelength laser pulses erode the target. A small amount goes from solid to plasma and it deposits at the substrate. Complex compounds: YBa 2 Cu 3 O 7-x (high temperature superconductor) Ca 10 (PO 4 ) 6 (OH) 2 (biocompatible material) FABRICATION TECHNOLOGIES FOR NANOELECTRONIC DEVICES. PEDRO C. FEIJOO 18
19 MOLECULAR BEAM EPITAXY (MBE) (1/2) Epitaxy Ultra high vaccum: 10-9 Pa Substrates: C No contamination and good crystal structure, high uniformity Slow rates, expensive FABRICATION TECHNOLOGIES FOR NANOELECTRONIC DEVICES. PEDRO C. FEIJOO 19
20 MOLECULAR BEAM EPITAXY (MBE) (2/2) RHEED: Reflection high-energy electron diffraction Thanks to ultra high vaccum Allows the control of the thickness 20
21 ELECTRODEPOSITION OR ELECTROPLATING The surface of the wafer must be conductive and connected to the power supply. Cu atoms dissolved in the electrolyte are deposited on the wafer. It is the base of the damascene technology FABRICATION TECHNOLOGIES FOR NANOELECTRONIC DEVICES. PEDRO C. FEIJOO 21
22 FILM GROWTH Technique APCVD Application Thick oxides LPCVD Oxides, silicon nitride, polysilicon, W, WSi 2 MOCVD PECVD ALD Evaporation Sputtering PLD MBE Electrochemical forming Industrial production of epitaxial layers Insulators over metals and passivation layers Monolayer control Metal element:ag Al Au Cr Cu Mo W Al 2 O 3 Au Cr Mo SiO 2 Si 3 N 4 TiC TiN Complex compounds: YBa 2 Cu 3 O 7-x, Ca 10 (PO 4 ) 6 (OH) 2 Epitaxial growth Cu for interconections in ICs 22
23 REFERENCES Fundamentals of microfabrication and nanotechnology, volumen 2: Manufacturing techniques for microfabrication and nanotechnology. 3rd edition. Marc J. Madou. CRC Press ISBN: Fundamentals of semiconductor fabrication. Gary S. May and Simon M. Sze. John Wiley and Sons, Inc ISBN: Overview of the Use of Copper Interconnects in the Semiconductor Industry. Annabelle Pratt ELECTROPLATING pdf Some figures were extracted from al3.asp FABRICATION TECHNOLOGIES FOR NANOELECTRONIC DEVICES. PEDRO C. FEIJOO 23
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