Properties and Barrier Material Interactions of Electroless Copper used for Seed Enhancement

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1 Mat. Res. Soc. Symp. Proc. Vol Materials Research Society E1.4.1 Properties and Barrier Material Interactions of Electroless Copper used for Seed Enhancement C. Witt a,b,k.pfeifer a,c a International Sematech, Austin, Texas b Infineon Technologies, Munich, Germany c Philips Semiconductors, Eindhoven, Netherlands Abstract The conventionally used sequence for copper damascene metallization consists of barrier deposition, physical vapor deposition (PVD) Cu seed and electroplated copper. Due to the limited step coverage of PVD copper, the extendibility of this sequence to feature dimensions below 90 nm is at risk. To reduce the risk of pinch-off of very small features, the PVD layer thickness will be reduced well below 100 nm, the drawback being poor seed coverage at the bottom of the features. Void free fill by electroplating is hence at risk by both pinch-off and discontinuous seed coverage (3-5). In this paper, the use of a conformal metal deposition method, electroless copper, to enhance PVD seed layers as thin as 10 nm is presented. It is demonstrated that sparse, discontinuous copper films provide a catalytic surface for electroless copper deposition. With electroless copper, void-free copper fill of 12.5 aspect ratio (AR) trenches (70 nm width) and 8.3 AR vias is achieved. Furthermore, 6 nm thin electroless copper films were integrated in a dual damascene process and electrically characterized. A yield of approximately 85% was achieved on via chains ( links, 0.25 by 1.1 µm vias), with 10 nm PVD seed. This was comparable to the yield when using 100 nm PVD seed. Hydrogen, generated as a byproduct during the electroless copper ion reduction, was found in the copper deposits as well as in the barrier films underneath. In some cases, spontaneous blistering in the plated copper film was observed, and is believed to be due to hydrogen incorporation. The interaction of electroless copper films with various barrier materials (PVD Ta, PVD TaN, CVD TiN(Si) and combinations) is discussed. Electromigration test results presented in this paper indicate that the failure mechanism is not qualitatively different from reference samples with the conventional PVD seed. Introduction The extendibility of conventional Cu PVD technology to future interconnect dimensions (1) is at risk due to its limited step coverage. Hence, a conformal deposition method is desired that can deal with damascene features smaller than 80nm. To avoid the high cost of chemical vapor deposition (CVD) copper equipment and development, an alternative route was proposed (2,3) that utilizes PVD by adding a thin, conformal Cu layer to it. This seed enhancement is attractive as established PVD technology will be further used, however, an extra process step will increase manufacturing complexity. This paper describes efforts to evaluate the concept of using thin, conformal electroless Cu deposition. for seed enhancement. For electroless Cu, generally, alkaline chemistries are utilized to prevent seed dissolution. Inherently, an electroless process is independent of the electrical continuity of the substrate and provides a uniform deposition across large substrates. The evaluation is broken into blanket film properties, fill enhancement in single damascene structures and electrical characterization using dual damascene test structures. Finally, electromigration test results are described as initial reliability assessment.

2 E1.4.2 Experimental A. Blanket films Blanket films used in this study were 25nm PVD Ta, 10nm PVD seed, 12nm electroless copper and 1 µm electrochemically deposited (ECD) copper, all deposited on SiO 2 substrates. Details of the bath used for electroless deposition were described previously (3). B. Damascene structures and test procedure To study fill enhancement, single damascene structures were generated in 1µm thick SiO 2 dielectric films on a Si 3 N 4 etch stop layer. Following via etch and clean, some samples received a 50nm thin conformal LPCVD Si 3 N 4 layer in order to increase the aspect ratios. On these samples, a 25nm PVD Ta barrier and 40nm PVD copper seed layer was deposited without vacuum break. The vias were subsequently filled by electrochemical deposition (ECD). On the samples with seed enhancement, 6nm thin electroless copper films were deposited prior to ECD fill. To study sparse PVD seed morphology, via samples were fabricated with the same sequence but using 10nm PVD Cu. Electrical test samples consisted of dual damascene structures using SiO 2 as interlayer dielectric and Si 3 N 4 as etch stop layers. Excess copper removal after electroplating was achieved by chemical mechanical polishing (CMP). Total thickness of the upper dual damascene layer was 1.5 µm including ~0.4µm line thickness and ~1.1 µm via level thickness. After etch and clean, wafers received 25nm PVD Ta or TaN, or bilayers of 12.5/12.5nm Ta/TaN or TaN/Ta, or 5 nm of CVD TiSiN prior to PVD Cu seed deposition. PVD Cu seed thicknesses of 10nm and 100nm were applied. No variation in the metallization sequence was introduced in the underlying metal 1 layer. Electrical measurements were performed after CMP at metal 2 (referred to as M2 test), and after final SiO 2 /Si 3 N 4 passivation, bond pad opening and Al bond pad metallization (referred to as final test). Electrical tests were performed on at least 4 wafers per process condition (split). Electromigration testing was performed on diced and packaged samples at a test temperature of 325 C and a constant current density of 2.6 MA/cm 2. The failure time criterion was 30% resistance change. Results and Discussion A. Fill enhancement Figure 1 (a-c) shows the morphology of electroless Cu films deposited on sparse, discontinuous PVD seed. A continuous, conformal film formed on roughly 2/3 of the via. No electroless depositionoccurredinthelowestsectionoftheviaswherenopvdcuwasdetectedbycrosssectional TEM and EELS. This suggests that a minimal Cu nucleus density is required for the autocatalytic electroless Cu ion reduction. The effect of electroless seed enhancement on ECD fill of 8.3 AR vias (0.12 µm diameter) is also shown in Figure 1. Voids are visible at the bottom of all features. No fill voids are observed in the seed enhancement samples. This result demonstrates that these voids are indicative of poor seed coverage. Another type of void can also occur after ECD due to pinch-off at the top of features or due to an insufficient bottom-up fill process. Such voids are commonly observed along the center axis of the features (2-4). This void type was not observed with the Cu thicknesses used for this paper. Trenches with an aspect ratio (AR) of 12.5 (width 0.08 µm) were also filled void free (no image) using seed enhancement but showed bottom voids without enhancement. B. Film properties: resistivity and hydrogen incorporation To study the effect of the seed enhancement layer on ECD film growth, 1µm Cu films were plated with and without electroless Cu pre-coating. Next, the films were annealed for 30 min at 150 C to promote grain growth. After annealing, sheet-resistivity along with thickness measurements using

3 E1.4.3 FIB cross-sections and SEM inspection were used to determine bulk resistivity. In both cases, films with and without electroless Cu, the specific resistivity was approximately 1.8 µωcm. Hydrogen is generated as by-product during electroless deposition by oxidizing the reducing agent, in this case glyoxilic acid, and incorporates in the deposit (6-9). To characterize the hydrogen content in seed enhanced films, desorbing species were detected by residual gas analysis (RGA) in a vacuum chamber, as a function of temperature. RGA data collection was performed during the entire temperature cycle that consisted of heating to 150 C (4 /min), holding 150 C for 30 min, and cooling (4 /min). Figure 2a shows hydrogen partial pressure of a wafer that had a 10nm PVD seed layer and 1µm ECD copper (reference sample). The hydrogen content in the residual gas was monitored to be between 1E-07 and 1E-06 Torr during the entire cycle. This measurement was repeated on a sample wafer that had 12nm electroless copper deposited prior to 1µm ECD Cu. Compared to the reference sample (solid line in figure 2a), this film stack exhibited significant hydrogen desorption (1E-5 Torr) upon heating at ~100 C. After holding 150 C/30 min, a low hydrogen level of 1E-07 Torr was reached. This suggests that most of the non-residual hydrogen enclosed in the film stack had diffused out. To verify whether hydrogen incorporates into the underlying Ta, two sample wafers were prepared as in the experiment described above. Prior to heat treatment, the Cu has been etched entirely off the Ta using nitric acid. The thermal desorption measurement results are shown in Figure 2b. Clearly, the Ta film on which electroless was applied previously exhibited significant hydrogen desorption. D. Blister Formation Blister formation is a known phenomenon in electroless copper deposition (6) and is generally attributed to coalescence of hydrogen bubbles (8). Hydrogen can furthermore lead to high porosity and low ductility in electroless films due to enclosed gas bubbles (8). On some samples prepared during this work, it was observed that dome shaped blisters could form after ECD deposition. The number of blisters depended on details of the electroless bath (temperature, composition, additives). Samples that had thicker (i.e. 100nm) PVD seed never showed blistering. Furthermore, it was found that the film delamination at the blister occurred at the barrier-substrate interface. Optimisation of electroless film thickness (<20nm) and deposition conditions resulted in a blister free process. D. Electrical characterization: via yield enhancement To show the effect of electroless seed enhancement on the electrical performance of dual damascene copper vias and lines, the resistance of 0.25µm wide via chains containing links was measured as shown in figure 3. When the PVD seed thickness is reduced from 100nm (control) to 10nm, the via chain yield reduces from nearly 80% to 40% both measured at after M2 CMP. The application of 6nm electroless seed enhancement on M2 level test structures with 10nm PVD seed resulted in a via chain yield of nearly 80% at M2, which is comparable to the 100nm PVD control split. Furthermore, all wafers with PVD only seed layers exhibited a drop in yield between the post CMP readout (M2) and the measurement after final passivation (final) of approximately 10-20%. The wafers with enhancement did not exhibit such drop, which may be due to the conformal nature of electroless Cu. D. Barrier material interactions To show the effect of electroless Cu on via resistance with various barrier metals, the resistance distributions of µm via chains are shown for Ta, TaN, bilayers of Ta/TaN, and TiSiN in figure 4. The resistance per contact increased significantly when using electroless Cu for certain barrier choices: in the case of Ta, seed enhancement on 10nm PVD Cu led to increase in median resistance of approximately 0.25Ω compared to the 100nm PVD Cu control group. When TaN was used, the difference between 10nm PVD Cu with enhancement and 100nm without was on the other

4 E1.4.4 hand only ~0.05Ω. The bilayer samples showed an intermediate shift of roughly 0.1Ω independent of the layer order (Ta or TaN first). In the case of 5nm thick TiSIN, the contact resistance distribution of wafers with 100nm PVD seed and no enhancement and 10nm PVD seed with enhancement was not different. The via chain result for 10nm PVD on TiSiN seed with no enhancement is also shown in figure 4. The yield was in this case lower than 5% indicating significant voiding due to seed failure during ECD Cu fill. The resistance shifts for Ta, and the lack of it for TaN and TiSiN can be explained by chemical attack of the barrier by hydrogen intrusion. Hydrogen, diffused into the barrier at the via bottom during electroless deposition can form TaH if enough metallic Ta is available. TaN and TiSiN are chemically more inert and not attacked. This is substantiated by the observation that bilayers show an intermediate resistance shift and the fact that the shift is independent of the Ta/TaN order. This suggests that the total amount of Ta vs. TaN in the film is more important than the impact of electroless on one of the barrier/cu interfaces. E. Reliability: electromigration testing Figure 5a shows median electromigration (EM) lifetime for samples with 10nm PVD seed and enhancement was approximately half that of the control samples. The distribution widths, however, were not significantly different. Figures 5b and c show portions of a seed enhanced sample after test. Both, the cathode side void (5b) and the anode side extrusion (5c) are located at the upper Si 3 N 4 dielectric barrier. This is a typical EM failure mode and occurred in similar fashion on control samples. The impact of seed enhancement on electromigration is not fully understood at this point. Conclusions Electroless copper films were integrated into a dual damascene metallization sequence to enhance PVD seed. In terms of via chain yield, with seed enhancement PVD Cu seed thickness could be reduced to from 100nm to 10nm without penalty. Features with sizes that will be used for 45nm technology and potentially beyond were filled void free. A potential threat is the spontaneous formation of blisters, which is believed to be caused by hydrogen incorporation in the copper during deposition, which can be avoided by careful choice of process conditions. The barrier materials tested showed different contact resistance responses to seed enhancement. The results suggest that, in contrast to Ta, TaN and TiSiN are chemically inert to hydrogen attack. This may limit applicability of this seed enhancement technique with regard to barrier selection. The electromigration test results do not indicate that the failure mode alters substantially with the use of seed enhancement. References (1) International Technology Roadmap for Semiconductors 2001 Edition, Interconnect, SIA, San Jose, CA, 2001, (2) C. Witt, A. Frank, E. Webb, J. Reid, K. Pfeifer, Proc. Of the IITC conf (3) T. Andryuschenko and J. Reid, Proc. Of the IITC conf (4) T. Ritzdorf, D. Fulton, L. Chen, Advanced Metallization Conference Proc., p. 101, M. Gross et al. Eds., MRS, 1999 (5)T.Moffat,J.E.Bonevich,W.H.Hiber,A.Stanishevsky,D.R.Kelly,G.R.Stafford,andD. Josell, J. Electrochem. Soc., 147, p (2000) (6) S. Nakahara and Y. Okinaka, Acta metall. 31, No.5, pp , 1982 (7) Y. Shacham-Diamand et.al, Thin Solid Films 262, pp , 1995 (8) S. Nakahara, Acta metall. 36, No. 7, pp ,1988 (9) M. Paunovic in Electrochemistry in Transition, O. J. Murphy et al. Eds. Plenum Press, New York 1992

E1.4.5 discontinuous PVD film b Ta + 10nm PVD Cu d Ta + 40nm PVD Cu a HAADF - STEM 0.

Morphology and fill effect of electroless Cu: (a) TEM close-up of (b) discontinuous PVD seed in

12 µm diameter by 1 µm deep vias are shown without (d) and with seed enhancement (e) and

Ta+10nm PVD Cu + 6nm EL c Ta + 40nm PVD Cu + 6nm EL e a H2 partial pressure (torr) 1.E-05 1.

E-07 1µm plated Cu Cu w/ electroless 0 25 50 75 100 125 150 175 Temperature ( C) Cu c b H2

E-07 Ta barrier after Cu removal bare Ta w/ electroless bare Ta 0 25 50 75 100 125 150 175

5 E1.4.5 discontinuous PVD film b Ta + 10nm PVD Cu d Ta + 40nm PVD Cu a HAADF - STEM 0.2 µm 20 nm Figure 1. Morphology and fill effect of electroless Cu: (a) TEM close-up of (b) discontinuous PVD seed in 0.18x1µm vias, (c) SEM of after 6nm electroless deposition µm diameter by 1 µm deep vias are shown without (d) and with seed enhancement (e) and subsequent ECD Cu fill. Ta+10nm PVD Cu + 6nm EL c Ta + 40nm PVD Cu + 6nm EL e a H2 partial pressure (torr) 1.E-05 1.E-06 1.E-07 1µm plated Cu Cu w/ electroless Temperature ( C) Cu c b H2 partial pressure (torr) 1.E-05 1.E-06 1.E-07 Ta barrier after Cu removal bare Ta w/ electroless bare Ta Figure 2. Thermal hydrogen desorption upon temperature: The hydrogen partial pressure in the residual gas (right axis) is shown for a) 1 µm ECD copper film on 10nm copper seed and 1µm ECD copper on 12nm electroless on 10nm PVD seed. b) shows hydrogen desorption of the Ta barrier of 2 similar samples where the Cu has been stripped before the temperature cycle. c) shows a blister in a 1µm ECD film with 12nm electroless Cu under it. Temperature ( C)

E1.4.6 90 80 70 60 50 40 30 Figure 3. Yield of 360k 0.25µm via chains for 100nm and 10nm PVD copper seed. The yield of wafers with seed enhancement on 10nm PVD seed is also shown.

20 10 0 100 nm PVD control 10 nm PVD 10 nm PVD 6nm Electroless M2 = post CMP final = post final processing 100 TiSiN 100 Cu w/o SR Ta 100 Cu control TaN 100 Cu w/o SR Probability Distribution (%) 90

6 E Figure 3. Yield of 360k 0.25µm via chains for 100nm and 10nm PVD copper seed. The yield of wafers with seed enhancement on 10nm PVD seed is also shown. Yield is shown for both, after CMP and at final test. Yield criterion was 1 Ω per link nm PVD control 10 nm PVD 10 nm PVD 6nm Electroless M2 = post CMP final = post final processing 100 TiSiN 100 Cu w/o SR Ta 100 Cu control TaN 100 Cu w/o SR Probability Distribution (%) TiSiN 10 Cu w/o SR TaN/Ta Ta/TaN Ta Figure 4. Via chain readouts for various barriers with and with out seed enhancement. Thickness values for the PVD Cu seed films in the annotations are given in nm. Ta, TaN refer to 25nm thickness, Ta/TaN and TaN/Ta refer to 12.5/12.5nm bilayers. All TiSiN films were 5nm thick Units (OHMS) % a b Cumulative Probability 90% 80% 70% 60% 50% 40% 30% 20% 10% PVD 10 w/ enhancement PVD 1000control c 1% 1 10 TTF (hrs) Figure 5. Electromigration lifetimes (a) and FIB cross section of a damaged cathode end (b) and anode end (c).

Development of different copper seed layers with respect to the copper electroplating process

Microelectronic Engineering 50 (2000) 433 440 www.elsevier.nl/ locate/ mee Development of different copper seed layers with respect to the copper electroplating process a, a a b b b K. Weiss *, S. Riedel,