Chip Warpage Damage Model for ACA Film Type Electronic Packages

Transcription

1 Key Engineering Materials Vols (25) pp online at 25 Trans Tech Publications, Switzerland Chip Warpage Damage Model for ACA Film Type Electronic Packages Se Young Yang 1,a, Woon Seong Kwon 2,b, Soon Bok Lee 1,c and Kyoung Wook Paik 2,d 1 Department of Mechanical Engineering, Korea Advanced Institute of Science and Technology, Daejeon, Korea 2 Department of Material Science and Engineering, Korea Advanced Institute of Science and Technology, Daejeon, Korea a confinme@kaist.ac.kr, b wskwon@kaist.ac.kr, c sblee@kaist.ac.kr, d kwpaik@kaist.ac.kr Keywords: Chip warpage, Damage model, Delamination, Anisotropic conductive film, Moiré interferometry, Twyman-Green interferometry. Abstract. The use of anisotropically conductive adhesives (ACA) for the direct interconnection of flipped silicon chips to printed circuits (flip chip packaging), offers numerous advantages such as reduced thickness, improved environmental compatibility, lowered assembly process temperature, increased metallization options, cut downed cost, and decreased equipment needs. Despite numerous benefits, ACA film type packages bare several reliability problems. The most critical issue among them is their electrical performance deterioration upon consecutive thermal cycles attributed to gradual delamination growth through chip and adhesive film interface induced by CTE mismatch driven shear and peel stresses. In this study, warpage of the chip is monitored by real time moiré interferometer during 5 o C to +125 o C temperature range. Moreover, reduction in chip warpage due to increase in delamination length is obtained as in function of thermal fatigue cycles. Finally, a new model to predict damage level of ACA package and remained life is proposed and developed. Introduction The use of anisotropically conductive adhesive (ACA) for the direct interconnection of flipped silicon chips to printed circuits (flip chip packaging), offers numerous advantages such as reduced thickness, improved environmental compatibility, lowered assembly process temperature, increased metallization options, cut downed cost, and decreased equipment needs [1, 2]. Its wide application to glass displays through chip on glass (COG) process [1, 3-5] has accelerated interest in using this technology on rigid/flexible substrates [6-8] or even on paper substrates [9] as novel ACA s are being developed. ACF mainly consist of an adhesive polymer matrix and fine conductive fillers of metallic, or metal-coated polymer, particles. Electrical conduction is provided by these fillers when trapped between the interconnection areas in the z-axis of the adhesives, i.e., perpendicular to the plane of board, while electrical isolation is provided in the plane of the adhesive layer [1]. Despite numerous benefits and its increasing role in the electronic packaging field, ACA film type packages bare several reliability problems. There are concerns about their low conductivity, low yield in some applications as well as electrical performance deterioration upon consecutive thermal cycles. Connection deterioration mechanism for an ACF connection had not been clarified, thus, predicting life of an ACF connection was difficult [11]. To cope with these problems, there have been efforts to study the bonding quality and reliability of ACA flip-chips by conducting various environmental [1, 4-9, 11-16] and mechanical tests [6, 13, 17-19] and discussing its major failure mechanisms [6, 7, 11-13, 19, 2] and suggesting several processing control parameters [1, 3-6, 11, 12, 14, 16] to enhance the reliability. For further assessment of reliability at early design stage, i.e. for predictive reliability design, one should be able to define and extract a mechanical parameter which can represent the failure mode and Licensed to Korea Advanced Institute of Science and Technology KAIST - Daejeon - Korea South All rights reserved. No part of the contents of this paper may be reproduced or transmitted in any form or by any means without the written permission of the publisher: Trans Tech Publications Ltd, Switzerland, (ID: /1/6,4:57:17)

2 888 Advances in Fracture and Strength the status of damage at a given condition. Mechanical parameters used to estimate state of damage of a surface mount package can be mainly obtained by finite element analysis, the only method, today, that can handle details of the geometry and the intricate mechanical behavior of various materials used in them [21]. For ACF film type packages, its relatively simple geometry of tri-layered structure enables analytical approach, though it is limited to elastic assumption, in a closed form solution [21-26]. However, in order to acquire accurate parameter from numerical simulation, it requires time consuming endeavor to clearly characterize time/temperature dependent behavior of various non-linearly behaving materials in ACF package including the adhesives film, FR-4 PCB, and so on. Consequently, it is not too pessimistic to conclude that it is quite unattainable to verify exact properties of different materials under accelerating testing conditions where temperature varies from 5 o C to +125 o C and time rate effect cannot be neglected. Situation becomes even worse when the size effect of materials are considered [27]. As for analytical solutions, it is found that many of the sundry assumptions made by various authors could affect certain parameters, for example, adhesive peel stress by as much as 3% [28]. In this respect, a critical need for experimental verification arises and optical measurement techniques have been used as a feasible method to investigate deformation behavior of electronic packaging materials. Flip-chips using ACF are vulnerable to high local CTE mismatch [8, 11] between chip and adhesive film which result in propagation of unstable interfacial delamination or crack [2, 16, 19, 29], one of the major and common among various proposed [7, 2] failure modes and mechanisms. As the delamination propagates with increasing number of cycles it will finally reach or affect the electrical interconnections and cause failure to the entire device. The delamination length can be designated as amount of damage in ACF flip-chips under operation. Several experimental studies had been performed with similar concept. Algan [3] subjected adhsive bonds to flexural fatigue. Fatigue-induced defects in adhesive bonds were monitored by the means of ultrasonic C-scanning and thermal wave imaging. A direct correlation of the ratio of the debonded area to the initial adhesive joint area, A/A, with the percent fatigue lifetime of the adhesive joints, was tentatively established. Gladkov and Bar-Cohen [19] observed monotonic decrease in effective modulus of adhesives with test cycles and suggested that the loss of bond integrity is associated with progressive delamination in the bond layer. The need for a damage model which can be interpreted by experimentally obtainable parameter for electronic packages stems from the fact that FEM based calculations hold certain limitations as mentioned above. Thus, in this study, a new damage model utilizing a geometric parameter, the chip warpage, which can represent the state of damage and be measured by experiment in-situ is proposed and developed. Warpage of the chip is monitored by real time moiré and Twyman-Green interferometer during 5 o C to +125 o C temperature range. Reduction in chip warpage due to increase in delamination length is obtained as in function of thermal fatigue cycles. Finally, a new model to predict damage level of ACA package and remained life is proposed and developed. Chip Warpage Damage Model Background. The use of adhesive interconnection techniques implies different failure mechanisms compared to that of the traditional solder connections. A great deal of work has been done to understand the failure mechanisms in the adhesive joints and thereby increase the reliability [31] and the works are well summarized by Vries [7] and Jagt [2]. Basically, reduction in contact area between the particles and the pad interface is the fundamental cause of failure. There are two mechanisms that can decrease the contact. The first is the formation of a nonconductive barrier between the pad and the particles which can result from oxidation or corrosion [2, 6, 2]. The second is through the loss of compressive force which is obtained by cure shrinkage [5, 7, 1, 13, 14, 16, 18, 31-33] of the adhesive and the external pressure during the curing process. The thermal expansion of

3 Key Engineering Materials Vols the adhesive and its swelling due to humidity [7, 15] as well as mechanical stress from the environment will tend to diminish this compressive force [31, 32] and occasionally lead to complete loss of electrical contact. The humidity is also closely related to the first mechanism in such a way that it accelerates the formation of oxidation layer. Either of above mechanisms will result in loss of adhesion and form an interfacial delamination or crack [2, 16, 29], which are defined as damage in this study. The chip warpage damage model, as it is implied in its name, begins with the assumption that the presence of delamination or damage will affect the warpage of the chip. The other motivation stems from the evolution of optical measurement technique. Specimen and Measurement Setups. Fig. 1 shows the manufacturing process for flip-chip using ACF (Anisotropic Conductive Film) specimen and its cross section image. The dimension of the silicon chips with plated gold bumps is 1.mm 1.mm.6mm. The dimension of gold bump is µm3 and the bump pitch is 25 µm. The organic substrate used in this work is 1.mm thick FR-4 substrate and the area of substrate is 3 3mm2. The metal pads on the organic substrate are made of nickel-gold plated copper. The thickness of adhesive layer was about 5µm after flip-chip bonding. The specimen is daisy chained in order to monitor electrical connectivity. Si chip in a flip-chip assembly warps or deflects during thermal excursions and it can be measured by both in-plane and out-of-plane measurement techniques. Two optical methods, in-plane moiré and out-of-plane Twyman-Green interferometer, are adopted in this study which are one of well suited applications for experimental analysis of electronic packages [34]. Fig. 2 and Fig. 3 illustrate the moiré interferometer and Twyman-Green setup, respectively, connected to an optical environmental chamber (EC1A, Sun Systems). CCD Camera Beam splitter Optical Chamber IC chip CCD Camera Bump Optical chamber 32 Magnified Substrate Chip.5 Electrode Pressure and Heat IC chip PCB (mm) Substrate PEMI - 5oC +23oC +5oC +75oC +1oC +1 C Fig. 2. Moiré Interferometer Fig. 3. Twyman-Green setup 8 Chip Warpage (deflection) (µm) Fig. 1. ACF specimen 6 1th cycle Linear elastic region o Temperature ( C) Fig. 4. Chip warpage(deflection) data obtained during 1th cycle by moiré experiment

4 89 Advances in Fracture and Strength Verification. Prior to development of such model, investigation was performed to observe whether the warpage of the chip would represent the damage effectively. Fig. 4 shows the chip warpage (deflection) calculated from V-field (y-directional displacement field) moiré data obtained during the 1 th cycle (-5 o C to +125 o C; 5 o C/min). According to Fig. 4, warpage behaves elastically or linearly from 5 o C to +1 o C, i.e. dw, which represents the rate of change of warpage with respect to temperature, remains constant. Thus, elastic FEM analysis using ABAQUS 6.1 is performed only at corresponding temperature range in order to avoid visco-elastic behavior above 1 o C. Fig. 5 reveals that warpage behavior below 1 o C is well-predicted by simple elastic FEM analysis. Artificial delamination is modeled in FEM at chip/adhesive interface and the warpage variation is predicted via delamination length. The existence of 1µm long delamination length which is postulated to be the critical length for interconnection failure have resulted in about 18% change in cyclic warpage behavior, dw (Fig. 6). It could be concluded that alteration in chip warpage is large enough to be monitored by optical methodologies. Delaminated FEM Mesh Delamination Length 8 Chip Warpage (deflection) (µm) ACF 1th FEM No Delamination Temperature( o C) Fig. 5. Chip deflection data comparison; experiment vs. elastic finite element analysis Chip Warpage (deflection) (µm) Temperature( o C) no delamination 5µm delamination 5µm delamination 1µm delamination Fig. 6. Chip deflection behavior vs. delamination length Results and Discussions From aforementioned FEM analysis verified by experimental data, variation of dw is obtained with respect to delamination length as in Fig. 7. In addition, dw of a real ACF specimen is measured subjected to consecutive thermal cycles (Fig. 8). It clearly reveals the reduction in package compliance, dw, via no. of cycles, similar to the results of previous works [19, 35]. It appears reasonable to assume that within experimental error the adhesive joint compliance reduction can be accounted for as being the almost entirely to interface crack propagation or debond length, with a probably minor contribution being attributable to changes in the stiffness of the adhesive itself [35]. Apart from the warpage measurement, resistance of the daisy chain is also investigated. Fig. 9 shows gradual increase in resistance with respect to thermal cycles implying gradual propagation of interfacial delamination. As a result, delamination vs. life relation is achieved which can be utilized to predict the amount of damage and remained life (Fig. 1). The failure criterion should be defined as Eq. (1),

5 Key Engineering Materials Vols a = a c (1) where failure occurs when delamination length, a reaches critical length, a c. The critical length is set to be 1µm in present investigation, the distance from chip edge to electrical interconnection. The specimen did not failed up to 2867 cycles and the test is still on going. dw The parameter is not affected by visco-elastic nature of the adhesives below 1 o C, i.e., it is ramp rate independent. Time constants for ACF adhesive below 1 o C are quite large, in orders of 1 4 seconds. If it is not for extremely slow rate it won t be altered. The relationship obtained in Fig. 1 should be effectively normalized so that the model can be applied to various sets of materials and geometries. This work will be provided in near future dw/ (µm/ o C) dw/ (µm/ o C) Delamination length (µm) Fig. 7. delamination vs. dw No. of cycles Fig. 8. No. of cycles vs. dw Resistance (Ω) Delamination length (µm) No. of cycles Fig.9. Increase in resistance upon thermal cycling No. of cycles Fig.1. Chip warpage damage model Summary A new chip warpage damage model is developed for ACA film type flip chips which can predict the amount of damage at a given state and predict the reliability in terms of remained life. The chip warpage model excludes the ambiguity of FEM analysis and adopts an experimentally measurable dw warpage parameter,. It embraces the common failure mechansim for such package, the interfacial delamination or crack propagation. References [1] A.M. Lyons et al.: IEEE Trans. on Comp. Pack. & Manuf. Tech. Part A Vol. 19 (1996), p. 5 [2] J. Liu: Int. J. of Adhesion and Adhesives Vol. 16 (1996), p. 219 [3] M.J. Yim and K.W. Paik: IEEE Trans. on CPMT Part A Vol. 21 (1998), p. 226

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