Qualification Report. March 1996, QTP# 96056, Version 1.0. CY7B8392 (Ethernet Coax Transceiver Interface)

Transcription

1 Qualification Report March 1996, QT# 96056, Version 1.0 CY7B8392 (Ethernet Coax Transceiver Interface)

2 RODUCT DESCRITION (for qualification) Information provided in this document is intended for generic qualification and technically describes the Cypress part supplied: Marketing art #: ackage: Device Description: Cypress Division: CY7B pin lastic Leaded Chip Carrier (LCC) 16-pin, 300-mil lastic DI (DI) Ethernet Coax Transceiver Interface Cypress Semiconductor Corporation - DCD Division Overall Die (or Mask) REV Level (pre-requisite for qualification): Rev. A Die Size (stepping): 75 mils x 77 mils What ID markings on Die: 7B9392 TECHNOLOGY/FAB ROCESS DESCRITION - SM1 Number of Metal Layers: 2 Metal Composition: Metal 1: 500A Ti, 1,200A TiW, 6,000A Al, 500A Ti Metal 2: 1,500A Ti, 10,000A Al assivation Type and Materials: 3,000A TEOS + 15,000A Oxynitride Free hosphorus contents in top glass layer(%): Die Coating(s), if used: N/A 0% SG Generic rocess Technology/Design Rule (µ-drawn): BiCMOS, Single oly, Double Metal /0.8 µm Gate Oxide Material/Thickness (MOS): Name/Location of Die Fab (prime) Facility: Die Fab Line ID/Wafer rocess ID: SiO2 / 195 A Cypress Semiconductor - Round Rock, TX Fab2/SM1

3 AGE 3 CYRESS ackage Outline, Type, or Name: Mold Compound Name/Manufacturer: Lead Frame material: Lead Finish, composition: Die Attach Area lating: LASTIC ACKAGE/ASSEMBLY DESCRITION Copper 28-pin lastic Leaded Chip Carrier (LCC) 16-pin, 300-mil lastic DI (DI) Sumitomo EME-6300H(R) Solder lated, 85%Sn, 15%b Silver Spot Die Attach Method: aste Die Attach Material: Silver Epoxy Wire Bond Method: Thermosonic Wire Material/Size: Gold / 1.3 mil JESD22-A112 Moisture Sensitivity Level: Level 1 Name/Location of Assembly (prime) facility: Omedata, Indonesia (DI) Anam, Korea (LCC) Note: lease contact a Cypress Representative for other package availability.

4 AGE 4 CYRESS RELIABILITY TESTS ERFORMED Stress/Test High Temperature Operating Life Early Failure Rate High Temperature Operating Life Latent Failure Rate Test Condition (Temp/Bias) Dynamic Operating Condition, Vcc = 10.5V, 125 C Dynamic Operating Condition, Vcc = 10.5V, 125 C Result /F Read and Record Life Test Dynamic Operating Condition, Vcc = 5.75V, 125 C High Temperature Steady State Life Static Operating Condition, Vcc = 9.0V, 150 C High Accelerated Saturation Test (HAST) 140 C, 5.5V recondition: 168 Hrs Moisture 85 C/85%RH Temperature Cycle MIL-STD-883C, Method 1010, Condition C, -65 C to 150 C recondition: 168 Hrs Moisture 85 C/85%RH Electrostatic Discharge Human Body Model (ESD-HBM) Electrostatic Discharge Charge Device Model (ESD-CDM) MIL-STD-883, Method Cypress Spec ,400V 2,000V Latchup Sensitivity In accordance with JEDEC 17. Cypress Spec

5 AGE 5 CYRESS RELIABILITY FAILURE RATE SUMMARY Stress/Test Device Tested/ Device Hours # Fails Activation Energy Acceleration Factor 4 Failure Rate High Temperature Operating Life Early Failure Rate High Temperature Operating Life 1,2 Long Term Failure Rate 1026 Devices 0 N/A N/A 0 M 67,500 DHRs FIT 3 based 1 Assuming an ambient temperature of 55 C and a junction temperature rise of 15 C. 2 Chi-squared 60% estimations used to calculate the failure rate. 3 Note: The high FIT rate is solely a function of the limit sample size. The BiCMOS technology had a 3.8 FIT rate on 1994 reliability data (1995 Cypress Semiconductor Reliability report). 4 Thermal Acceleration Factor is calculated from the Arrhenius equation AF = exp E k A 1 T T 1 where: EA =The Activation Energy of the defect mechanism. k = Boltzmann's constant = 8.62x10-5 ev/kelvin. T1 is the junction temperature of the device under stress and T2 is the junction temperature of the device at use conditions.

6 AGE 6 CYRESS RELIABILITY TEST DATA QT#: DEVICE ASSY-LOC FABLOT# ASSYLOT# DURATION S/S REJ FAIL MODE ==================== ======== ======== ============== ======== ==== === ================================ STRESS: HIGH TEM DYNAMIC OERATING LIFE-EARLY FAILURE RATE (125C, 10.5V) CY7B8392-C INDNS-O STRESS: HI-ACCEL SATURATION TEST (140C, 5.5V), RECOND. 168 HRS 85C/85%RH CY7B8392-JC KOREA-A STRESS: HIGH TEM STEADY STATE LIFE TEST (150C, 9.0V) CY7B8392-C INDNS-O CY7B8392-C INDNS-O STRESS: HIGH TEM DYNAMIC OERATING LIFE-LATENT FAILURE RATE (125C, 10.5V) CY7B8392-C INDNS-O CY7B8392-C INDNS-O STRESS: READ & RECORD LIFE TEST (125C, 5.75V) CY7B8392-C INDNS-O CY7B8392-C INDNS-O STRESS: TEM CYCLE, COND. C, -65 TO 150C, RECOND. 168 HRS 85C/85%RH CY7B8392-JC KOREA-A