Fabrication of MEMS Devices: Fundamentals and State of the Art

Transcription

1 Fabrication of MEMS Devices: Fundamentals and State of the Art Bill Mansfield Bell Labs Lucent Technology 1

2 I. OUTLINE MEMS Basics II. MEMS Fabrication Fundamentals III. MEMS Fabrication Processes and Examples A. Bulk Micro-machining Processes 1. Non silicon based HAR 2. Silicon based B. Hybrid Processes C. Surface Micro-machining Processes D. Soft MEMS Processes 2

3 Micro and Nano Machines: Many Different Types of Motion 3

4 Motion Actuation Methods Voltage Needs Switching Speed Current consumption Electrostatic High High Low (none) Magnetic Low High High Thermal Low Slow high Others: piezoelectric, stress relaxation, surface tension,... 4

5 MEMS and NEMS: In-plane motion V 20 µm Electrostatic actuation 5

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7 MEMS FABRICATION BASICS 1. Film Deposition 2. Lithography 3. Pattern transfer 4. Cleaning 5. Metrology 6. Chemical Mechanical Polishing 7. Structure release 7

8 MEMS FABRICATION BASICS: Deposition Critical Characteristics for MEMS 1. Film stress 2. Deposited film gap fill considerations 3. Thermal budget considerations 8

9 Controlling Stress in a single layer of poly-si: Thermal annealing 200 o Stress (MPa) C o 615 C o C o Annealing Temperature ( C) Annealing in N2 at 1050c for 2 hours will reduce the stress to <5MPa/um 9

10 Controlling Stress and Gradient Stress with multilayer design Compressive Tensile Compressive Tensile Compressive Out-of-plane Stress gradient ~ 2 Mpa/um can be reached. No annealing is needed. This also allows structural design to be customized to compressive or tensile and by varying the layer thickness, a desired stress can be achieved. 10

11 Film stress pattern and process dependencies 11

12 Gap Fill Considerations Greater the surface mobility of deposited atoms better the fill. 12

13 MEMS FABRICATION BASICS: Lithography Critical Issues for MEMS 1. Wafer flatness thick stressed films distort wafers resulting in loading and chucking problems. 2. Depth of focus thick films result in extreme topography over which fine feature resolution cannot be maintained. 3. Level to level alignment thick films can result in attenuated or no alignment mark signal compromising alignment capability. 4. Resist material etch selectivity- resist materials for advanced lithography are designed for thin films pattern transfer and may not have sufficient selectivity for dry etch pattern transfer to thick films. 13

14 MEMS FABRICATION BASICS: Pattern Transfer Vertical Comb Drive Etch Process 0.25 um wide, 12um deep fingers, about a factor of 3 more than our initial design target in both width and depth. 14

15 MEMS FABRICATION BASICS: Pattern Transfer High Aspect Ratio (HAR) Deep Silicon Etching Bosch process: deposition/etch alternation C4F8 deposition precursor / silicon etch SF6 and O2. 50um wide features etched 250um deep with standard Bosch process 50um wide features etched 240um deep with modified Bosch process 15

16 MEMS FABRICATION BASICS: Pattern Transfer Etch Rate versus feature size Profile control-angle and texture Etch mask and etch stop layers Etch rate versus area considerations (loading) Etch uniformity 16

17 MEMS FABRICATION BASICS: Pattern Transfer Si Etch Rate Etch Rate versus feature size 2 Etch rate (micron/min) _5_2 5_5_2 5_5_1 5_6_1 5_7_ Trench width (micron) 17

18 MEMS FABRICATION BASICS: Pattern Transfer Side Wall Profile Profile control 90.4 Side wall angle (deg) _5_2 90 5_5_ _5_ _6_ _7_ Tre nch width (micron) 18

19 MEMS FABRICATION BASICS: Pattern Transfer Etch mask Etch residues Etched features Feature undercut Etch stop layer substrate Etch uniformity, etch stop layers, loading, and etch mask layers 19

20 MEMS FABRICATION BASICS: Pattern Transfer Silicon sidewall Bosch etch with resist etch mask 20

21 MEMS FABRICATION BASICS: Chemical Mechanical Polishing Surface Micromachining Process Poly 0 Nitride Poly 1 1st Oxide 1.5 µm Si Si 2 µm PSG 2nd Oxide Metal 0.5 µm Au, on Cr adhesion layer 0.75 µm PSG 2 µm Poly µm Si 0.6 µm Si nitride Silicon Substrate Multi-User MEMS Processes (MUMPS) Introduction and Design Rules,rev. 4, 7/15/96, MCNC MEMS Technology Applications Center, Research Triangle Park, NC 27709

22 Chemical Mechanical Polishing Slurry Feed Holder Slurry Carrier Side View Top View Wafer Polishing Pad Platen Pad Slurry Oxide 2 z z = oxide topography t = polish time p = pressure v = velocity ρ(x,y,z) = pattern density KP = Preston constant K = Constant 22

23 Patten Density Effects As Deposited Topography CMP: Local Planarity Oxide 2 Oxide 2 Metal Metal Oxide 1 Oxide 1 Reverse Tone: Litho Global Non-Planarity Resist Oxide 2 Metal Oxide 1 Reverse Tone: Etch Dummy Fill Pattern Oxide 2 Oxide 2 Metal Metal Oxide 1 Oxide 1 CMP: Global Planarity CMP: Global Planarity Oxide 2 Oxide 2 Metal Oxide 1 Metal Oxide 1 23

24 MEMS FABRICATION BASICS: Release Layers of structural materials, sacrificial layers, and interconnects or electrodes are deposited and patterned. The sacrificial layers are selectively removed, releasing the moving parts. Some micromachines selfassemble during release. 24

25 MEMS FABRICATION BASICS: Release Structural Material Sacrificial Material Release Agent silicon silicon/germanium silicon dioxide Aqueos HF HF Gas PAD Etch* protected silicon silicon Xenon difluoride gas* silicon/germanium germanium Hydrogen peroxide* Germanium silicon dioxide Aqueos HF HF Gas * Will not attack Aluminum metallization Post wet release processing usually entails rinse with DI water then solvent or critical CO2 dry. 25

26 MEMS FABRICATION BASICS: Release Stiction after release No stiction 26

27 BULK MICROMACHINING: Non-silicon High Aspect Ratio(HAR) MEMS 27

28 LIGA Nickel High Aspect Ratio (HAR) Micromachining (Lithographie, Galvanoformung, Abformung (LIGA)) Gold Mask E. W. Becker etal., ), Microelectron. Eng., vol. 4, pp , X-Ray Radiation PMMA 1. Expose PMMA to Synchrotron radiation 2. Develop PMMA into mold 1. Electroplate into mold and remove mold material. Feature lengths and widths as small as 20um Feature heights are from um Aspect Ratios > 10 28

29 UV-LIGA High Aspect Ratio (HAR) Micro-machining 22umgap,24um line feature Profiles in 290xm thick SU-8 film with nonoptimized process. Optical absorption of SU-8 (A) as compared to a diazo type resist system (B) and Dupont RISTON dry film (C) * Reference: N. LaBianca, and J. Delorme, "High aspect ratio resist for thick film applications", in Proc. SPIE vol. 2438, SPIE, (1995) 29

30 BULK MICROMACHINING: Silicon Dry Etch Based Bulk machined parts in 300um silicon using Modified Bosch process. 30

31 BULK MICROMACHINING: SOI Lucent Lambda Router Mirrors ( Bishop etal.) 31

32 BULK MICROMACHINING Pattern Front-side of SOI ( Silicon on Insulator) wafer with Mirror Array Pattern: High Throughput, High Resolution, High alignment precision step and repeat exposure tool Thin resist Silicon Hard Mask Material oxide Silicon 32

33 BULK MICROMACHINING Pattern Transfer Resist Pattern into Hard Mask Material with Dry Etch Strip and clean residual resist Silicon oxide Silicon 33

34 BULK MICROMACHINING Pattern Transfer Resist Pattern into Hard Mask Material with Dry Etch Strip and clean residual resist Silicon oxide Silicon 34

35 BULK MICROMACHINING Protective Coat Patterned Front-side Coating can also act to balance stress for High yield release Silicon oxide Silicon 35

36 BULK MICROMACHINING Handle wafer thinning Wafer wet cleaning Backside lithography with contact printer Silicon oxide Silicon 36

37 BULK MICROMACHINING Backside Cavity Deep Reactive Ion Etch Silicon oxide Silicon 37

38 BULK MICROMACHINING Backside resist strip and clean Wafer wet release in HF Mirror Coat at Chip Scale Silicon oxide Silicon 38

39 Single-Crystal Silicon Micromirrors 1296 mirror array (36x36) Mirror Gimbal Torsion spring Contact Spacer M ir r o r C h ip E le c t r o d e C h i p s o ld e r b u m p s 39

40 HYBRID MICROMACHINING PROCESS AND EXAMPLE 40

41 Monolithic Fringing-Field 1xN Switch Electrode springs Mirror Greywall, Pai etal. Bell Labs NJNC Lucent Technology. 41

42 Monolithic Fringing Field Process SOI wafer: Si on 0.4 um buried oxide on substrate SOI Lithography: Pattern resist on hard-mask 0.4 um/0.4 um L/S with DUV step and repeat system. SOI Etch: etch hard-mask, resist strip & clean, Si etch. 42

43 Monolithic Fringing Field Process Plasma enhanced Dielectric Deposition: PETEOS/PE-BPTEOS Total Thickness = 0.7um Dielectric flow: 1000 C 1 min N2 W1 Lithography with DUV step and repeat system: 5 um contact size Photo resist dispense optimized for topography coverage W1 Etch: contacts to SOI and substrate, plasma strip resist and wet clean wafers 43

44 Monolithic Fringing Field Process Poly 1 Deposition: 10 um Boron doped * ohm-cm Align mark open: 1. PR mask lithography, and etch. 44

45 Monolithic Fringing Field Process Poly1 Lithography: 3 um/3 um L/S Poly 1 Etch: etch 10 um poly, stopping on oxide 45

46 Monolithic Fringing Field Process (5/16/02) Protective Deposition: 0.2 um PETEOS Backgrind to 285 um Cavity Opening: etch ~270 um backside Si, stopping on BOX 46

47 Monolithic Fringing Field Process (5/16/02) Full Wafer Release: HF 10:1 40 min Scribe & Break Al Metalization: 500A mirror front & back, 6000A bond pads 47

48 SURFACE MICROMACHINING 48

49 Surface Micromachining Material Systems: High Temperature: poly-silicon structural and conductor, silicon dioxide sacrificial layer. Wet and dry release systems available. Low Temperature: poly-silicon germaniun structural and conductor,germanium sacrificial. To date, wet release systems only. Advantages: Single side processing eliminates need for special tools and chucking. Single side processing opens door to foundry fabrication. Can be scaled to sub-micron using already available tools with some exceptions. Holds possibility (low temp) for modular integration with optimized CMOS. Disadvantages: New low temperature materials and fabrication processes must be developed and optimized. 49

50 SURFACE MICROMACHINING MEMS Electronics Integration MOS MOS MEMS-on-top MEMS MOS Low cost CMOS foundry Low temp MEMS process Minimize interconnect length MEMS-MOS Separate MEMS Inside MOS MEMS Interconnect number More capital investment Interconnect characteristics Separate process optimization High temp MEMS only Minimize interconnect length Low cost CMOS foundry Complicates packaging MEMS MEMS MOS MEMS-Mixed Processing compromises for both More capital investment High temp polysilicon based can be used 50

51 SOFT MEMS: Position and Shape control of small droplets of condensed matter through surface patterning and electrowetting Tom Krupenkin, Ashley Taylor, Tobias Schneider, Shu Yang, Avi Kornblit Bell Labs, NJNC Lucent Tech. 51

52 Contact angle Definition of the contact angle θ Surface tension dominates d ~ µm liquid Contact angle θ is determined by the interfacial tensions γ: cosθ = γ Solid-Vapor γ γ θ Solid-Liquid Liquid-Vapor solid d 52

53 Liquids on nanostructured surfaces Superhydrophobic liquid solid θ0 θ0 >> 90 Wetting liquid solid θ0 << 90 Surface tension adjustment Electrowetting 53

54 Nanostructured surfaces Typical examples of the structures currently available for us liquid A1 3 µm 3 µm 3 µm solid Ashley Taylor (NJNC, 2002) cosθ γ 3.75 µm A2 4 µm Ashley Taylor (NJNC, 2002) Eric Mazur et. al (Harvard, 2001) = γ Solid-Liquid = f γ f = A1 / A 2 Solid-Vapor γ γ Soid-Liquid Liquid-Vapor γ S-L 1 f L-V Cassie & Baxter (1944) 54

55 Nanostructured surfaces Droplet transport: Molten salt*, γ = 62 mn/m * 1-ethyl-3-methyl-1 H-imidazolium tetrafluoroborate df = γlv (cosθf cosθr)dy cosθf cosθr = (ff fr)(cosθ0 + 1) ff > fr f = A1 / A 2 cosθf pitch 1.05 µm contact spot cosθr pitch 4 µm 55

56 Electrowetting θ can be reversibly changed using electrowetting conducting liquid V γ Example: Water droplet on Cytop surface γ L=72 mn/m ε L θ [º] θ θ V=0 =112 d=1 μm d d=0.5 μm d=0.1 μm conductive electrode insulating layer, thickness d, dielectric constant ε r cosθ r =2.1 V =cosθ V=0 ε 0ε 2dγ L r 2 V V [V ] 56

57 Nanostructured surfaces Electrowetting f1 isolator V=0 low-energy coating f2 >> f1 cosθ ~ f f2 V 0 conductor potentially strongly nonlinear effect contact angle control contact angle hysteresis control potentially very low voltage 57

58 Nanostructured surfaces Microscopic picture rolling ball no penetration sticky droplet electrowetted droplet complete penetration complete penetration 58

59 Electrically induced transitions cosθ pitch 4.0 µm pitch 1.05 µm planar substrate -0.8 (planar) -0.2 cosθ (nanostructured) Rolling ball - Sticky droplet transition Voltage Squared (V2) 59

60 Other Applications Controllable transport networks Chemical and bio-sensors Optics, bio-inspired optics Dynamic wavelength selective filters λ1 λ2 ε2 ε1 60

61 Acknowlegements: NJNC Staff and Management D.J. Bishop J.V. Gates T. Craddock S. Ross D.M. Tennant R. Cirelli L. Fetter S. Pau P. Watson E. Bower E. Ferry W. Y-C. Lai D. Lopez C.S. Pai T. Sorsch S. Arney H. Shea V.K. Aksyuk C.A. Bolle D. Greywall F. Pardo M. Simon B. Frahm A. Gasparyan R. Papazian 61

62 MEMS FABRICATION BASICS: Deposition Critical Issues for MEMS Currently available materials ( polysilicon and single crystal Silicon) are either not possible at low temperatures.(<600c) or cannot be made low stress at low temperature. Low temperature, low stress materials such as poly Si-Ge are currently being developed but they have not been rigorously tested for reliability for long term reliability. 62

63 >10 degrees of continuous tilt 10 µm to 200 µm mirrors actuation voltage < 100V high speed high fill factor (0.3 µm gap btw mirrors) no electromechanical crosstalk surface-micromachined 63

64 64

65 Angle amplification The transmission mechanism increases work produced by the actuator: larger area can be used actuator gap can be decreased, while maintaining the required range of motion 65

66 Process Flow Si-Rich Nitride 0.5um PolySilicon 1.0um PolySilicon 0.5um Pad Metal 0.6um Sacrificial Si Oxide 4.0um Mirror Metal 0.04um 66

67 BULK MICROMACHINING: 67

68 Overview Superhydrophobic microfabricated surfaces + Electrowetting Control droplet movement and wetting 68

69 Dry Release of Protected Silicon Structures XeF2 Etch Oxide-protected PolySi Si Wafer Active Membrane Grid HF Etch Si Wafer 69

70 Superhydrophobic Surfaces Sin (α) Mobility Droplet volume (m3) Joonwon Kim & CJ Kim (UCLA, 2002) 70

71 Applications: Micro and Nano-fluidics High mobility and super-repellency based no slip V Liquid- solid contact angle complete slip tunable microfluidic mixer V 3 µm 3 µm 3 µm 71

72 STRESS RELIEF BORDER No Border 100um Border-100um space 72

73 SU-8 290um thick,coded 25um gap, 22um feature 73

74 Droplet Movement df = γlv (cosθf cosθr)dy cosθf cosθr Electrostatic cosθf cosθr = K(Vf2 Vr2) Vf2> Vr2 Area density cosθf cosθr = (ff fr)(cosθ0 + 1) ff > fr f = A1 / A 2 74

75 MEMS FABRICATION Premise: as with semiconductor fabrication the need for increasing functionality of MEMS devices in time will lead to a need for more, smaller components on individual devices. This in turn will necessitate the need for advanced fabrication equipment and processes and integration of control electronics and MEMS on a single substrate. 75