Materials Perspective on Interconnects

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1 Materials Perspective on Interconnects David R. Clarke Materials Department, College of Engineering University of California, Santa Barbara

2 Interconnects are Communication Networks Latency vs Line Length Latency is product of three factors 1 H T τ = ε [ ] [ ] 2 ρ L Material properties Geometry Interconnect Length H = metal height T = dielectric thickness

3 Insight Provided by Distribution Functions Applying Rent s rule and conservation of interconnects R = k N p Power law Data on Intel processor Source: Meindl et al.

4 Hierarchical Scaling Leads to Interconnect Levels Source: IBM 2001 Hierarchical wiring system allows RC delay to be scaled with improved device performance. NB. Tungsten at lowest level instead of copper Source: NEC

5 Effect of Scaling and Materials on Number of Levels NB. Imagine shrinking all transistors and wires by factor 1/s. Rw increases as s but Cw decreases as 1/s so RwCw remains constant But Rt remains constant, Ct decreases as 1/s thus RtCt deceases as 1/s 6 layers 0.25 um Impact of perfect conductors Each generation lengths scale as s=1/(2) 1/2 s Source: Theis, IBM 2001

6 Hierarchical Scaling Leads to New Interconnect Levels

7 Materials for Interconnects Recall: Latency given by 1 2 [ ρ ] [ L ] τ = ε H T The only better electrical conductors than Al are: Copper, Silver, Carbon nanotubes (SWCNT) Al Au Cu Ag CNT ρ o λ nm Very few materials available!! Intel 130 nm / SiOF

8 Carbon Nanotubes for Interconnects Resistance of perfect SWCNT is fixed at 6.45 kω. In practice higher Therefore must be used in bundles Current density capability is very high Electron mean free path is ~ 1.0 microns so can span local levels What is the appropriate contact metallurgy? How do we apply contacts? How do we position individual CNTs? How do we create high density bundles of CNTs?

9 Carbon Nanotubes as Vias and Interconnects Can denser bundles be grown directly inside multiple-level connects? Source: Kreupl et al.

10 Carbon Nanotubes as Vias and Interconnects Good electrical contact and high density of SWCNT in bundle are essential.but.. capacitance of a bundle is larger than copper Source: Srivastava and Banerjee

11 What limits future use of copper interconnects? Size Dependent Resistivity of Copper Lines Source: Intel Source: Infineon

12 Temperature dependence follows that of bulk copper Resistivity size effect is independent of temperature Source: Steinhogl et al

13 What controls resistivity of narrow lines? Interface scattering (Fuchs-Sondheimer) ρ ρ 3 λ = 1 + ( 1 p) (approx. d > λ) 4 bulk d width Grain boundary scattering (Mayadas-Shatzkes) ρ ρ bulk 1 α 2 3 = 3 + α α log α 3 2 ( 1+ 1/ ) α = λ d grains R 1 R

14 Combined Surface and Grain Boundary Scattering Controls Resistivity Grain boundary scattering dominates resistivity size effect. Solution is to make single crystal copper interconnects. Source: Steinhogl et al

15 Grain Boundaries in Intel s 130nm Cu Interconnect (Yr 2001) Contrast is due to grain structure of interconnect

16 Decreasing Resistivity of Blanket Films by Grain Growth Resistivity decreases on annealing with an activation energy associated with grain growth. But are the kinetics for a blanket film relevant to interconnects?

17 Source: Jiang and Thomas Decreasing Resistivity in Lines by Grain Growth

18 What limits grain growth? Source: Jiang and Thomas

19 What about the dielectrics? Why have actual performance improvements been slower than anticipated?

20 Function of the Dielectric Recall 1 2 [ ρ ] [ L ] τ = ε H T Also, must provide: resistance to electric breakdown mechanical support for metal interconnects provide barrier to diffusion of moisture

21 Physical Consequences of Low K Dielectrics and Air Gaps SiO2 Air Typical Polymer Decreasing dielectric constant drastically decreases thermal conductivity. Decreasing dielectric constant reduces mechanical stiffness and ability to resist thermal expansion mismatch with underlying silicon. Eair = 0 GPa, ESiO2 = 70 GPa, ESilk ~ 4 GPa

22 Time Dependent Dielectric Breakdown NB. TDDB is a thermally activated and field assisted, time dependent diffusion process. Will dielectric breakdown limit use of air-gaps and low K dielectrics?

23 Summary and Conclusions Although the electron mean free path of perfect, metallic SWCNTs is ~ 1.0 microns, there seems to be little overall advantage of using SWCNT as interconnects at local level since capacitance is larger than copper. Primary advantage is at the upper level where spacings are larger Questions remain: What is the appropriate contact metallurgy and how can they be applied How do we position individual SWCNT? How do we create high density bundles of SWCNT? How do we prevent oxidation of SWCNT during processing with oxide dielectrics? CNTs can be metallic, semiconducting, defective how do we select / separate / grow them selectively? Control of grain growth in copper interconnects is necessary to reduce resistivity-size effect. Choice of new materials for interconnects is extremely limited. Wiring distribution function will not be radically altered by positional uncertainties associated with self-assembly of devices since distributions are power law/fractal distributions almost indistinguishable from power-law functions (such as Rent s rule).