Module 1 and 2 Report

Transcription

1 Module 1 and 2 Report Interdisciplinary Microelectronics Processing Lab Group D Jaimie Stevens, Erich P. Meinig, Adam Longoria, Emily Makoutz, Ben Timmer Date: February 10, 2015 Abstract This report details the experiment procedure, results, and analysis for Modules 1 and 2. It is found that the oxidation layers for both wet and dry oxidation are close to the Deal-Grove calculated values for 900 C and 1100 C. The intermediate temperatures were not as close to the model. The photoresist thicknesses were only slightly lower than the predicted values for 3000, 4000, and 5000 RPM. For 2000 RPM, only one data point was collected, and was much lower than the predicted value. This report also details the characterization of the plasma etch rate, which is dependent on the power used for the etching. 1

2 1 Introduction This report focuses on the concepts and procedures behind oxidation of silicon wafers and the spinning and etching of photoresist. These processes are very important when it comes to integrated circuit processing and the fabrication of semiconductor devices, which are necessary for most of the technology we have today, including computers and cell phones. Thermal oxidation is used to produce a layer of oxide (usually SiO 2 ) on the surface of the silicon wafer [1]. In integrated circuits, oxide layers are used as an insulator (or passivation layer) between two conducting layers [2]. Silicon dioxide has a very high resistivity, making it a very good insulator, and has high chemical stability [3]. This report will investigate two thermal oxidation techniques, wet and dry, to determine how the resulting oxidation layer thickness depends on temperature. Plasma etching is used to remove material on the wafer. Different gases are used to etch different materials, and this experiment is done using an oxygen gas to ash the photoresist. Plasmas are formed by gases being ionized to form reactive ions and free electrons [4]. The free electrons bombard the surface of the material, removing atoms from the wafer. The rate at which this process happens is investigated in this report. This report also introduces the characterization equipment used to determine the thickness of materials deposited on the siliconwafer. The profilometer is used to find the amount of material removed after an etch, and the ellipsometer is used to determine the thickness of photoresist and oxide layers on the silicon wafer. Overall, the main objectives being investigated in this report are the correlation between the spin speed and photoresist thickness, the etching rate of the plasma etcher, and the growth of silicon oxide on a silicon wafer as a function of temperature. 2 Equipment, Procedure, and Modeling 2.1 RCA Clean A bare silicon wafer that is exposed to the ambient air has planes of atoms with dangling bonds that easily attach to many different materials. In order to examine the unique electrical and optical properties of materials, it is essential to prevent any contaminants from deforming the crystal and electronic structure. For example, contaminants on the surfaces of a silicon wafer disrupt the epitaxial growth of thin films and are likely to cause defects and dislocations [5]. Defects and dislocations in crystal structures draw in impurities, produce vacancies, and impede diffusion of charge carriers. To prevent contaminants from interrupting the unique electronic and optical properties within our devices, the Radio Corporation 2

3 of America (RCA) developed the standard cleaning procedure that is still used today. The RCA clean procedure involves a series three chemical baths in which the silicon wafers are submerged and then rinsed. Each bath is designed to attack impurities while leaving the silicon crystal relatively unmolested. The first bath contains a mixture of five parts water, one part hydrogen peroxide, and one part ammonium hydroxide forming an oxidation reduction reaction to help break apart organic compounds such as photoresist. Each sample was submerged in the heated organic clean solution and followed by a deionized (DI) water rinse. The second bath is an oxide strip solution containing 20 parts water and one part hydrofluoric acid to remove any native oxide layer. Finally, the samples are then placed into a bath of an ionic clean solution containing six parts water, one part hydrogen peroxide, and one part hydrochloric acid to remove any remaining heavy ions and cations. The ionic solution was heated to 75 C and the samples were submerged and rinsed in a DI water bath. The remaining water must be removed by a stream of inert gas such as nitrogen before undergoing thermal oxidation. After the RCA clean procedure, we can be confident that we have prevented a significant amount of impurities from diffusing further into the silicon wafer during the thermal oxidation process. 2.2 Wet and Dry Oxidation A critical step in the fabrication of MOSFETs is the thermal oxidation step. Thermal oxidation of silicon creates a controllable thin film of silicon dioxide on the surface of the wafer that acts as an insulator in transistor gates. Native oxide layers can form spontaneously in air by a phenomena known as electron tunneling, which allows electrons to tunnel through the oxide layer to ionize adsorbed oxygen or water at the oxide-silicon interface. However, as the oxide increases in size, electron tunneling becomes much slower. To increase throughput, high temperature oxidation environments are created to drive the diffusion of oxygen in the oxide layer. The diffusion of oxygen in SiO 2 is modeled using Ficks law of diffusion, assuming the diffusion of O 2 in SiO 2 is much faster than the diffusion of Si in SiO 2, indicating the reaction occurs at the interface of the Si SiO 2 [5]. The diffusion of oxygen can be separated into three separate fluxes. The first is the diffusion of oxygen in the boundary layer above the oxide. The second is the diffusion of oxygen across a growing oxide film, and the third is the rate of oxygen reacting with excess silicon. Combining the three fluxes, and assuming Henrys law, the oxygen flux can be modeled as equation 1 [5]. J = Hk s P g 1 + ks + kstox h D 3 (1)

4 In equation 1, k s is the chemical rate constant, H is Henrys gas constant, D is the diffusion coefficient of oxygen in silicon dioxide, and h is Planks constant. By dividing equation 1 by N 1, you get the rate of oxide formation, equation 2. R = Hk s P ( g N k s ) (2) h + kstox D The solution ( of the ) differential equation showed in equation 2 is given by equation 3, where 1 A = 2D k s + 1, B = 2DHPg h N 1, and τ = τ 0 2+Aτ 0. B τ 2 ox + Aτ ox = B(t + τ) (3) A, B, and τ are generally given for specified temperatures, and equation 3 is known as the Deal-Grove model of oxidation. Using experimentally determined A, B, and tau coefficients for both wet and dry oxidations, an approximate thickness is found. The thermal oxidation process is done using n-type, ph-doped, 100 mm wafers that have been cleaned using the RCA cleaning procedure described above. The cleaning procedure is important not only to create pure samples, but to keep the ovens contaminant-free as well. The ovens used to do the thermal oxidation are programmed to maintain the specified temperature for the specified length. For this lab, the temperature was set to 1100 C, and ran for one hour. Other groups varied the temperature, but all had the same time of one hour. Oxygen gas is pumped into the chamber of the oven to maintain exposure of the silicon wafer to the oxygen it needs to oxidize. The flow rate is set such that the chamber can be completely filled with oxygen three times per minute. This ensures there is enough oxygen available for oxidization. The wet oxidation procedure is the same as the dry oxidation procedure described above, except for the introduction of steam being mixed in with the oxygen gas. This provides a humid, wet atmosphere for the oxidation, and produces thicker growth than in dry atmospheres. 2.3 Degreasing and Applying Photoresist One useful technique in semiconductor fabrication is the application of photoresist to a semiconductor substrate. Photoresist is a light sensitive material used to form patterned coatings on the surface. There are two types of photoresist: positive and negative. For positive photoresist, the photoresist that is exposed to UV light will change chemical structure and 4

5 become more soluble. Negative photoresist is the opposite, the photoresist that is exposed to UV light is polymerized and remains after etching [5]. Before applying photoresist, the silicon wafers must be degreased in order to remove organic contaminants and moisture to promote uniform spreading and adhesion of the photoresist. Degreasing is a process of rinsing the wafer with acetone, methanol, and isopropanol (in that order), for about 30s per rinse. Isopropanol evaporates quickly, so directly after the isopropanol rinse the wafer must be dried with nitrogen. If streaks occur, repeat the isopropanol rinse and dry with nitrogen. To ensure the wafer is completely dry, the wafer undergoes a softbake on the hotplate for 90s at 115 C. The photoresist, Shipley S1813 undyed positive photoresist, is applied with the use of a spin coater. The spin coater must be programmed and set up for a two-spin process. For the purpose of this experiment, the first spin was set to 500RPM and was accelerated at 100RPM/s for 9s. The second spin was varied from RPM (depending on the group) for 40s and was accelerated by 1000RPM/s. The wafer is then centered in the spin coater. During the 9s spin-up stage the photoresist is dispensed onto the spinning wafer via a disposable pipette, covering roughly 90 percent of the wafer. After the spin procedure completes, the wafer is transferred to the hotplate to softbake on the hotplate for 90s at 115 C. The wafer is now ready for ellipsometry and profilometry, discussed below, to determine the thickness of the photoresist layer. 2.4 Plasma Etcher After the application of the photoresist onto the wafer and the characterization of its thickness, the wafer is then placed into the plasma etcher. The plasma etcher (or reactive ion etching, abbreviated as RIE) is commonly used to remove thin films.to etch, the wafer rests on a platter which is electrically isolated between two electrodes inside a chamber. A strong RF field ( W) is used to ionize a gas (commonly O 2, CHF 3, SF 6 ) inside the chamber, creating pasma. Because the two electrodes create a voltage difference, an electric field is created which accelerates the plasma onto the wafer platter. The plasma then collides with the wafer which chemically reacts with the thin films. In addition, the plasma can also transfer its kinetic energy and knock off (i.e. sputter) some of the thin films [4]. The rate of etching for photoresist for the plasma etcher used in this experiment was unknown. To find the etching rate, a quartered spin-coated wafer was placed inside the chamber with slide glass placed on part of the wafer. The glass slide prevents etching of the covered part and creates a step profile after etching. With the chamber pumped down to a pressure of 400 mtorr of O 2, the wafer was etched with a power of 200W. Different quarters of the wafer were etched for different times. Profilometry was used to find the vertical difference between the unetched photoresist layer and etched photoresist layer. 5

6 2.5 Characterization using Ellipsometry and Profilometry In this experiment, two pieces of equipment are used to characterize the thickness of materials on the silicon wafer: an ellipsometer and a profilometer. The ellipsometer is good for measuring thin film growth on a wafer (like an oxidation layer) and the profilometer uses height differences to find out how much material is removed or added to an existing substrate. The ellipsometer uses a laser pointed toward the sample (at an angle) and a detector at the same angle. The detector measures intensity and phase of the reflected beam, and this can be converted into a thickness of the thin film using a model. The model produces a list of several possible results, with the displayed value being what the model considers to be the actual thickness. Sometimes, the model does not correctly choose the correct thickness, so the list of all possible results must be consulted to find the proper value. This could lead to some inaccuracies in the determination of the thickness of the photoresist and the oxide layers. The benefit of the ellipsometer is that there is no contact with the film that is being characterized, so there is no risk of damaging the film by scratching or peeling. The profilometer is fundamentally different from the ellipsometer. Instead of using laser amplitude and phase to calculate a thickness, the profilometer uses a probe to measure the profile of the sample. This allows the profilometer to be used in many different ways: to measure the smoothness of a substrate, to characterize a surface, and to profile features on a wafer. After the sample is loaded, the probe will drop down and measure a relative height for each location along its path. To determine the vertical difference between an etched and unetched photoresist layer, the probe is moved over the boundary and the difference in the height is shown. Because the profilometer is not leveled, the raw profile tilts upward as the probe moves. This is corrected using the level function on the profilometer, and the user can make the profile flat. This could lead to error if the leveling is not done near the area of interest (the boundary), so it is best to choose the section to level to be close to (but not on) the boundary. 3 Data Collected and Analysis The data described in this lab report was collected using the equipment and procedure described in the section above. 3.1 Oxidation Thicknesses Tables 1 and 2 summarize the Deal-Grove calculated thicknesses at various temperatures, compared with experimental data. The experimental data was obtained using the procedure described above, and averaged over all of the wafers in the furnace (each group had two wafers in an oven). 6

7 Temperature Ellipsometery (nm) Color Deal-Grove (nm) Dark Blue Dark/Matalic Blue Brown + Dark Violet Royal Blue Table 1: comparison of dry oxidation Deal-Grove model with experimentally obtained data Temperature Ellipsometery (nm) Color Deal-Grove (nm) Gold/Light blue Tan/green Table 2: comparison of wet oxidation Deal-Grove model with experimentally obtained data Based on the data in tables 1 and 2, there are clear issues with the ellipsometer measurements. The Deal-Grove model parallels the data well for the dry oxidation temperatures of 950 C and 1100 C, but appears to be off at the intermediate temperatures. Similar is true for the wet oxidation temperatures, but data for 950 C and 1000 C were not obtained. The discrepancy between the model and the the experimentally obtained data is most likely due to the difficulty in obtaining measurements using the ellipsometer. Although the dry oxidation temperatures of 950 C and 1100 C are the closest to the Deal- Grove model, they are a bit lower, indicating possible inefficiencies with the furnaces. In addition, the color of the silicon wafers also provides information about the approximate oxide thickness. For example, at the 1100 C dry oxidation temperature, the color was royal blue, which corresponds with an oxide thickness of 120 nm. This is fairly close to the measured value of 124 nm, and the Deal-Grove prediction of 131 nm. Also, at 1100 C, the wet oxide wafer was yellow-green corresponding to an oxide thickness of 540 nm, which also matches nicely with the measured value of 564 nm. The color of the intermediate temperature wafers appears to correspond with the measured results, but do not compare favorably with the Deal-Grove model. This could be due to the subjective nature of identifying colors. The dry oxidation samples always appeared identical in color and the ellipsometer data that was shared verified their similar thicknesses. The two samples from the the wet oxidation furnace had distinctly different colors by eye and the ellipsometer data verifies that the thickness of the two samples were not similar, or uniform across the surface of any one sample. 3.2 Photoresist Thickness The photoresist data collected by each team is shown below in tables 3, 4, 5, and 6. 7

8 Spin Speed (RPM) PR Thickness (Å) Table 3: photoresist thickness reported by team A Spin Speed (RPM) PR Thickness (Å) Table 4: photoresist thickness reported by team B Spin Speed (RPM) PR Thickness (Å) Table 5: photoresist thickness reported by team C Spin Speed (RPM) PR Thickness (Å) Table 6: photoresist thickness reported by team D The data for this module varies quite a bit; this is due to experimental errors in the procedure. Possible factors that led to errors include; degreasing not removing contaminants and moisture from the wafers, over/under coating the wafer with photoresist, and accuracy of measurements using the profilometer or ellipsometer both from the user and machine. Nonetheless, the exponential trend line showing the average of the points collected is similar to that shown in the data sheet for S1813 photoresist (figure 1). The accepted value from the data sheet for each spin speed is shown below in table 7, compared with the average value obtained for each spin speed experimentally. 8

9 Figure 1: Photoresist Thickness data from all teams Spin Speed (RPM) Average Experimental Thickness (Å) Thickness from Data Sheet (Å) Table 7: experimental and accepted values for each spin speed From table 7, it can be seen that the values obtained for photoresist thickness are, on average, slightly lower than the accepted value. The 2000 RPM average was obtained using only one data point, so there is a large difference between the experimentally obtained and accepted value. 3.3 Etching Rate After etching different quarters of the silicon wafer at different times with O 2 plasma at 400 mtorr (other teams used different power for the RF field), the step profile was characterized 9

10 with the profilometer to find the vertical difference between the uneteched photoresist layer and the etched photoresist layer(see tables 8, 9, 10, and 11). Etch Time (s) PR Removed (nm) Table 8: The height difference between the unetched photoresist layer and etched layer after various etch times at 200W (Team D) Etch Time (s) PR Removed (nm) Table 9: The height difference between the unetched photoresist layer and etched layer after various etch times at 125W (Team A) Etch Time (s) PR Removed (nm) Table 10: The height difference between the unetched photoresist layer and etched layer after various etch times at 175W(Team B) Etch Time (s) PR Removed (nm) Table 11: The height difference between the unetched photoresist layer and etched layer after various etch times at 150W (Team C) With the PR removal values known at different times, it is possible to calculate the etch rate via linear regression. 10

11 Figure 2: The xy scatter plots of data obtained from other teams. Team Power (W) Etch Rate( nm/s) R 2 A B C D Table 12: The various etch rates obtained via linear regression from For team B, a negative etch rate was obtained, however the plasma etcher was not working properly when the experiment was performed. The other etch rates that were obtained are much more reasonable with a positive correlation between the power of the RF field and the etch rate of the plasma. 4 Conclusion and Discussion In Module 1, we learned the standard RCA clean procedure to prepare silicon wafers for oxide growth. Two RCA cleaned samples from four teams were placed into each of the wet and dry furnaces at temperatures ranging from C. The oxidation thickness appeared to increase with temperature,which is what we expected from the Deal-Grove Model. The 11

12 apparent color of the oxide sample changed depending on the number of layers and thickness of the oxide. The colors and corresponding thicknesses seemed agree with the data shown within the dry thermal oxidation, but was varied from that predicted by the model. The dry oxidation samples always appeared identical in color and the ellipsometer data recorded by all groups verified their similar thicknesses. The two samples from the wet oxidation furnace had distinctly different colors by eye and the ellipsometer data verifies that the thickness of the two samples were not similar, nor uniform across the surface of any one sample. As a result, we have found that the wet thermal oxidation furnace needs to be further investigated for sources of a pressure or temperature gradient where our samples experienced a gradient of oxidation growth thickness. In Module 2, the photoresist thickness as a function of spin speed was characterized by compiling the recorded thicknesses and spin speeds as measured independently by four different groups. Despite having followed a similar procedure, the thickness were shown to be highly variable. This could be due to a number of factors such as incomplete degreasing and cleaning processes preventing the photoresist from properly adhering to the surface of the silicon. The average measured thicknesses across all groups are systematically lower than the reported values by the manufacturer. After further investigation, it has been found that due to the drop in pressure at elevations, the photoresist film tends to have slightly thinner thickness than that measured at sea level with the same RPM. For reasons such as this, it is good practice to do a photoresist thickness characterization as a function of spin speed despite having the manufacturer s data. The etch rates of the photoresist were then investigated by all four groups at different power ratings. As expected, the etch rates were found to increase with higher power between groups A and D at 125 W and 200W, respectively. 4.1 Contributions Abstract and Introduction: Jaimie Stevens RCA Clean: Emily Makoutz Wet/Dry Oxidation: Ben Timmer Photoresist Application/Degreasing: Adam Longoria Plasma Etcher: Erich Meinig Ellipsometer and Profilometer: Jaimie Stevens Oxidation Thickness: Ben Timmer Spin Speed and Photoresist Thickness: Adam Longoria Plasma Etch Rate: Erich Meinig Conclusion: Emily Makoutz Editing: Jaimie Stevents Revisions: Emily Makoutz LaTeX formatting: Jaimie Stevens 12

13 References [1] Semiconductors/Silicon Device Manufacturing/Device Fabrication-Oxidation. OSHA. Web. 06 Feb < [2] IC History. Phgn/chen/mlgn 435/535: Interdisciplinary Silicon Processing Laboratory: Colorado School of Mines. Web. 06 Feb. 15. [3] Silicon Dioxide. Silicon Dioxide. Georgia Tech. Web. 06 Feb < [4] Verdonck, Patrick. Plasma Etching. V Oficina De Microeletrnica. Web. 06 Feb. 15. < [5] Campbell, Stephen A. Fabrication Engineering at the Micro- and Nanoscale. 4th ed. N.p.: Oxford UP, Print. 13