PECVD SiO 2 SACRIFICIAL LAYERS FOR FABRICATION OF FREE - STANDING POLYSILICON FILAMENTS

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1 PECVD SiO 2 SACRIFICIAL LAYERS FOR FABRICATION OF FREE - STANDING POLYSILICON FILAMENTS Eliphas W. Simões 1, Rogério Furlan 2, Nilton I. Morimoto 3, Olivier Bonnaud 4*, Ana N. R. da Silva 5, Maria L. P. da Silva 6 Laboratório de Sistemas Integráveis (LSI) Escola Politécnica da Universidade de São Paulo São Paulo, SP, Brazil, Tel , Fax *GMV - University of Rennes - France eliphas@lsi.usp.br 1, furlan@lsi.usp.br 2, morimoto@lsi.usp.br 3 Olivier.Bonnaud@univ-rennes1.fr 4, neilde@lsi.usp.br 5, malu@lsi.usp.br 6 Abstract The use of PECVD SiO 2 as a sacrificial layer in the fabrication of free-standing in situ phosphorous doped polysilicon filaments was investigated. Different TEOS/O 2 flow ratios (40/100, 40/200, 40/300, and 40/400) were used for comparison. We observed that the maximum silicon dioxide thickness has to be limited to approximately 0.7 µm, in order to avoid both cracks and film peeling. Despite a non homogeneous vertical etch rate, the films deposited with less dilution of TEOS in oxygen (40/100, 40/200) etch faster and can present less shrinkage after annealing. The time necessary to release filaments was determined by monitoring I x V curves extracted after the lateral etching in BHF. The lateral etch rate of the PECVD SiO 2 sacrificial layer (0.3 µm) resulted 0.2 µm/min.. All released beams presented no significant deformation, as observed by SEM. Introduction Surface micromachining has allowed the development of several types of freestanding microstructures [1][2], including electrostatic actuators, microvalves, resonant microbeam sensors, filaments, etc. A sacrificial layer (typically silicon oxide) and a structural layer (typically polysilicon) are sequentially deposited and defined. A wet etching removes the sacrificial layer, releasing the final free-standing structure. Low Pressure Chemical Vapor Deposition (LPCVD) phosphosilicate glass (PSG) is generally used as a sacrificial layer, in this technology, because of its low deposition temperature and high etch rate [3]. In this work, we investigate the fabrication of free-standing polysilicon beams to be used as thermal isolated microfilaments [4], aiming at their integration in microfluidic devices for gas flow control [5-8]. Undoped silicon oxide layers obtained by Plasma Enhanced Chemical Vapor Deposition (PECVD) were analyzed as sacrificial layers. In order to improve the deposition rate of these silicon oxides, we explored the use of a Tetra-Ethyl-Ortho-Silicate (TEOS) flow higher than that we normally use to obtain films for microelectronics

2 applications. The microfilaments were built by using in situ LPCVD phosphorous doped polysilicon films. The obtained structures were analyzed with respect to its electrical and mechanical characteristics. Experimental PECVD SiO 2 layers were deposited on silicon wafers (2 or 3 inches, p type, <100>, (10-20 Ωcm) in a home made cluster tool [9] with the following conditions: substrate temperature = 340 C, deposition pressure = 2.5 torr, RF power = 400 W, ambient: TEOS and Oxigen. Different TEOS/O 2 flow ratios were used initially for comparison: 40/100, 40/200, 40/300, and 40/400. Annealing of the silicon oxide films was performed in a Rapid Thermal Processing system (RTP) with halogen lamps. The annealing conditions in argon atmosphere were 800 C and 60 s. Silicon oxide etches were performed with BHF (6 NH 4 F - 40% + 1 HF - 48%) at room temperature. The silicon oxide films were analyzed with an ellipsometer and a Fourier Transform Infra Red Spectroscopy (FTIRS) equipment. Filament structures 10 µm wide and with lengths multiples of 100 µm, up to 500 µm, were built with the following process sequence: a) Sacrificial layer deposition: PECVD silicon dioxide (0.3 µm) on silicon wafers (2 inches, p type, <100>, Ωcm), substrate temperature = 340 C, deposition pressure = 2.5 torr, RF power = 400 W, TEOS/O 2 flow ratio = 40/100, process time = 40 s. b) Sacrificial layer annealing: RTP: 800 C, 60 s, argon atmosphere. c) Sacrificial layer definition: first optical lithography and etching in BHF at room temperature. d) Electrical insulator deposition: LPCVD silicon nitride (Si 3 N 4 ), temperature = 720 C, deposition pressure = 0.5 torr, NH 3 /SiH 2 Cl 2 flow ratio = 16 sccm, process time = 78 min., and thickness = 0.1 µm. e) Structural layer deposition: In situ phosphorus doped LPCVD polysilicon (phosphine/silane flow ratio = 10-4 ) in amorphous state, temperature = 550 C, pressure = 0.68 torr, and thickness = 0.5 µm. f) Crystallization annealing: Thermal process with duration of 12 h (600 C) were performed in a conventional furnace, in nitrogen atmosphere. g) Sacrificial layer lateral etching: BHF solution at room temperature. In order to avoid stiction problems the samples were dried with alcohol vapor.

3 The aspect of released structures was analysed with Scanning Electron Microscopy (SEM). Electrical characterizations were performed with a 4-point probe equipment and with a I x V (HP4145B) system. Results and Discussion Table 1 summarizes results of deposition rate and shrinkage after anneal as a function of TEOS/O 2 flow ratios. Table 1 - Deposition rate and shrinkage after anneal, as a function of TEOS/O 2 ratio. TEOS/O 2 flow ratio Deposition rate (µm/min.) Shrinkage after anneal (%) 40/ / / / Although a very high and approximately constant deposition rate can be obtained for different conditions of TEOS dilution, we observed that the maximum thickness has to be limited to approximately 0.7 µm, in order to avoid both cracks and film peeling. Films with thicknesses of up to 0.6 µm presented good uniformity along the wafer surface (> 98 %). The SiO 2 film present Si-OH bonds, as observed with FTIRS, due to the deposition process. As the shrinkage increases with TEOS dilution, as observed in Table 1, we concluded that these films are porous and structural changes occurs [10]. Thus, to avoid shrinkage of the films, which will be used in mechanical applications, there is no advantage in increasing the O 2 flow for these process conditions. A high vertical etch rate in BHF is observed after deposition. The annealing by RTP decreases the etch rate by a factor of ~2. Figure 1 depicts the etching behavior after annealing. These results reveal that for TEOS/O 2 flow ratios of 40/100 and 40/200 the films are non homogeneous and probably present a passivation layer on top. This passivation layer can be formed due to the deposition and/or RTP process, or induced by the BHF solution. We can speculate that this effect is caused by the RTP process, because the high temperature annealing can promote the formation of a non stoichiometric silicon oxide layer. For TEOS/O 2 flow ratios of 40/300 and 40/400 the films seem to be homogeneous and present an etch rate in BHF of ~ 2.1 nm/s that is approximately 1.6 times faster than that of a wet thermal oxide. Thus, the obtained silicon oxide films satisfy the requirements to be used as sacrificial layers, with the exception of a maximum thickness limitation. Despite a non homogeneous vertical etch rate, the films deposited with less dilution of TEOS in oxygen etch faster and can present less shrinkage after annealing. These facts led us to adopt a TEOS/O 2 flow ratio of 40/100 in the fabrication of the polysilicon filaments.

4 Fig.1 - Results of etching in BHF after annealing of films of Table 1. The time necessary to release filaments was determined by monitoring I x V curves extracted after the lateral etching in BHF. Figure 2 presents typical curves observed before (BHF time = 20 min.) and after (BHF time = 25 min.) the filament is completely released. When it is released, the linear shape of the curve is altered, as it is heated up to very high temperatures. For a filament 10 µm wide and 500 µm long, as the one analyzed in Figure 2, the released beam becomes incandescent (red color) when the applied voltage reaches ~14 V. The I x V curve resulted unaltered even after several voltage cycles (more than 120). These results permit us to establish that the lateral etch rate of the PECVD SiO 2 sacrificial layer (0.3 µm) is 0.2 µm/min.. All released beams presented no significant deformation (up or down deflection). This fact can be observed in the SEM image displayed in Figure 3, which shows the entire freestanding part of a structure that is 10 µm wide and 100 µm long. It has to be pointed out that a silicon platform is formed on the substrate under the region covered with the sacrificial layer. It occurs due to the fact that the plasma etching used to define the polysilicon and silicon nitride layers also removes silicon from the substrate. Thus, the complete fabrication process permit us to obtain free-standing filaments that are easily released and that present satisfactory mechanical characteristics, for applications in surface micromachining.

5 10mA 9mA L = 500 µm e W= 10 µm (BHF etch time = 20 min.) L = 500 µm e W= 10 µm (BHF etch time = 25 min.) 8mA 7mA Current (A) 6mA 5mA 4mA 3mA 2mA 1mA 0A Voltage (V) Figure 2 - I x V curves obtained for filaments 10 µm wide and 500 µm long. Figure 3 - Released polysilicon filament 10 µm wide and 100 µm long: detail of the free-standing part of the structure. Conclusion We observed that the maximum silicon dioxide thickness has to be limited to approximately 0.7 µm, in order to avoid both cracks and film peeling. Despite of a non homogeneous vertical etch rate, the PECVD silicon oxide films deposited with less dilution of TEOS in oxygen etch faster and can present less shrinkage after annealing. The complete fabrication process permit us to obtain free-standing filaments that are easily released (lateral etch 0.2 µm/min. for silicon oxide layers with thickness of 0.3 µm) and that present no deformation (up or down displacements) as observed by SEM images.

6 Acknowledgments We would like to acknowledge the financial support of FINEP/PADCT, FAPESP, and CNPq and the helpful collaboration of Ronaldo Domingues Mansano. References [1]T. ABE, W. C. MESSNER and M. L. REED, Effects of Elevated Temperature Treatments in Microstructure Release Procedures - Journal of Microelectromechanical Systems, vol.4, n.2, p , [2]M. MEHREGANY, K. J. GABRIEL, and W. S. N. TRIMMER, Integrated Fabrication of Polysilicon Mechanisms IEEE Transactions on Electronic Devices, vol.35, n.6, p , [3]D. POENAR, P. J. FRENCH, R. MALLÉE, P. M. SARRO and R. F. WOLFFENBUTTEL, PSG Layers for Surface Micromachining, Sensors and Actuators A, vol.41-42, p , [4]R. FURLAN and J. N. ZEMEL, Fabrication of Free-Sanding Polysilicon Thermal Filaments, XI Conference of the Brazilian Microelectronics Society, p , [5]J. N. ZEMEL and R. FURLAN, Microfluidics Chapter 12 of the "Handbook Of Chemical and Biological Sensors", edited by Richard F. Taylor and por Jerome S. Schultz, Institute of Physics Publishing, Bristol and Philadelphia, ISBN: , pp , [6] R. FURLAN, and J. N. ZEMEL, Controlled Choked Flow in Microfluidic Devices, Proceedings of the Second International Symposium on Microstructures and Microfabricated Systems held at the 188th Meeting of the Electrochemical Society, edited by D. Denton, P. J. Hesketh and H. Hughes, PV 95-27, October, 1995, pp [7]R. FURLAN, and J. N. ZEMEL, Comparison of wall attachment and jet deflection microfluidic amplifiers, Proceedings of the IEEE MEMS-96, San Diego, CA, February, 1996, pp [8] R. FURLAN, and J. N. ZEMEL, Behavior of microfluidic amplifiers, Sensors and Actuators A 51 (1996), pp [9]N. I. MORIMOTO, Desenvolvimento de um sistema multicâmara integrado para deposição e recozimento de filmes de SiO 2 - Tese de Doutorado, Escola Politécnica da Universidade de São Paulo, [10]A. R. CARDOSO, Avaliação das Características Elétricas de Filmes de SiO 2 Obtidos por Deposição Química a Vapor Enriquecida por Plasma, a Partir de Fonte Orgânica TEOS - Tese de Doutorado, Escola Politécnica da Universidade de São Paulo, 1996.