Feature-level Compensation & Control. Workshop April 15, 2004 A UC Discovery Project

Transcription

1 Feature-level Compensation & Control Workshop April 15, 2004 A UC Discovery Project

2 2 Diffusion in Silicon Germanium Alloys UC-DISCOVERY/ Workshop April 15, 2004 Hughes Silvestri, 1,2 Hartmut Bracht, 3 Arne Nylandsted Larsen, 4 and Eugene E. Haller 1,2 1 University of California at Berkeley, 2 Lawrence Berkeley National Laboratory, Berkeley, CA, 3 Univ. Münster, Germany, 4 University of Aarhus, Denmark 4/15/ Integration

3 3 Collaborators Hughes H. Silvestri, Graduate Student Research Assistant, MSE, UC Berkeley and LBNL Chris Liao, Graduate Student Research Assistant, MSE, UC Berkeley and LBNL Ian D. Sharp, Graduate Student Research Assistant, MSE, UC Berkeley and LBNL (Intel R. Noyce Fellowship recipient) Dr. Hartmut A. Bracht, Dept. of Materials Physics, University of Münster, Germany Prof. Arne Nylandsted Larsen, Aarhus U., Denmark 4/15/ Integration

4 4/15/ Integration 4 Motivation Very high frequency performance has been achieved with SiGe HBTs (f cut-off 350 GHz has been reported!). Ultra-shallow source-drain extensions (<20 nm) with high active dopant concentrations (>10 20 cm -3 ) and high lateral abruptness (<3 nm/decade) are needed for the 65 nm node. Advanced modeling and control of diffusion at this scale requires an improved basic understanding of diffusion processes. Knowledge of the diffusion processes in relaxed and strained SiGe alloys is extremely limited. Milestone Year I: Measure silicon (Si) diffusion in germanium (Ge) (complete) and Si and Ge diffusion in isotopically enriched SiGe structures ( nat Si nat Ge/ 28 Si 70 Ge/ nat Si nat Ge) of various compositions.

5 5 Ultra-Abrupt and Highly Doped Junctions Modeling of ultrahighly doped shallow junctions for aggressively scaled CMOS Kennel, H.W.; Cea, S.M.; Lilak, A.D.; Keys, P.H.; Giles, M.D.; Hwang, J.; Sandford, J.S.; Corcoran, S.; Intl. Electron Devices Meeting, IEDM '02. Digest. International, 8-11 Dec. 2002, Page(s): /15/ Integration

6 6 Very High-Frequency SiGe HBT SiGe HBTs with cut-off frequency of 350 GHz 4/15/ Integration Rieh, J.-S.; Jagannathan, B.; Chen, H.; Schonenberg, K.T.; Angell, D.; Chinthakindi, A.; Florkey, J.; Golan, F.; Greenberg, D.; Jeng, S.-J.; Khater, M.; Pagette, F.; Schnabel, C.; Smith, P.; Stricker, A.; Vaed, K.; Volant, R.; Ahlgren, D.; Freeman, G.; Intl. Electron Devices Meeting, IEDM '02. Digest. International, 8-11 Dec. 2002, Page(s):

7 7 Approach Measure silicon diffusion in an undoped MBE grown Ge structure (establishing a baseline). Study Si and Ge self- diffusion in intrinsic isotopically controlled SiGe multilayer structures. Determine simultaneously the diffusivities of silicon and germanium as a function of temperature and Fermi level position. (This requires introduction of dopants without causing transient phenomena. We have achieved this by using a low-temperature MBE-grown amorphous cap layer, implanted at low energies as dopant diffusion source). 4/15/ Integration

8 8 Previous Work: Ge Diff. in SiGe Strohm, et al., (2001) 71 Ge diffusion in SiGe alloys McVay and DuCharme (1975) 71 Ge diffusion in poly-sige alloys I V Si-rich Ge-rich 4/15/ Integration

9 9 Diffusion in SiGe Isotope Structures Diffusion of Si in pure Ge Si and Ge self-diffusion in relaxed Si 1-x Ge x structures Si and Ge self-diffusion in strained Si 1-x Ge x structures Simultaneous Si and Ge self-diffusion and dopant diffusion 4/15/ Integration

10 10 First Experiment: Si Diffusion in Pure Ge Before determination of Si and Ge self-diffusion in SiGe - must determine Si diffusion in Ge and Ge diffusion in Si Large amounts of data on Ge diffusion in Si - used as a tracer for Si selfdiffusion due to longer half-life Very few literature values for Si diffusion in Ge Q Si = 3 ev - similar to Ge self-diffusion MBE grown Ge layer (500 nm thick) 100 nm spike of Si (10 20 cm -3 ) Example: Simulation of Si concentration profile As-grown - black 600 C for 2 days-blue Si Concentration (cm -3 ) /15/ Integration Depth (nm)

11 11 Si Diffusion in Ge: Experimental Results Diffusion profiles measured via SIMS of 28 Si diffusion in Ge at 550 C for 30 days (blue) and 900 C for 8 minutes (red) as-grown Si (cm-3) 550C Si 900C 8min (cm-3) Ge substrate 28 Si Concentration (cm -3 ) Depth (nm) 4/15/ Integration

12 12 Si Diffusion in Ge: Analysis Raisanen (1981) Strohm (2002) Sodervall (1997) Uppal (2003) Profile fit data D Si (cm 2 /s) D Si ( Ge)= 43.5exp 3.32eV cm2 k B T s /T (1/K) Range of Si diffusion coefficient in Ge extended by two orders of magnitude in diffusivity down to 550 C. 4/15/ Integration

13 13 Summary and Future Work Si 1-x Ge x is a group IV semiconductor alloy with attractive properties for very high-frequency devices. Limited knowledge exists for self- and dopant diffusion: Si is interstitial, Ge is vacancy dominated. First experiment focused on Si diffusion in Ge. Si 1-x Ge x isotope superlattices will be used to measure and to model self- and dopant diffusion. Diffusion mechanisms will be determined. 4/15/ Integration

14 14 Future Goals on SiGe Diffusion Year 1: Measure silicon (Si) diffusion in germanium (Ge) (complete) and Si and Ge diffusion in isotopically enriched SiGe structures of various compositions. Year 2: Simultaneous self- and dopant (B, P, As) diffusion in unstrained SiGe isotope multilayer structures Year 3: Self-diffusion in strained isotopically enriched SiGe layers Year 4: Dopant diffusion and segregation in strained isotopically enriched SiGe layers 4/15/ Integration

15 15 GeOI and SiGeOI Substrates PI: Nathan Cheung GSR: Eric Liu Vorrada Loryuenyong 2004 GOAL: Increase bonding strength of Ge/handle substrate to better than 2J/m 2 with plasma surface modification and demonstrate ion-cut transfer for GeOI. Acknowledgement : Intel Corp for Ge wafers (Mohamad Shaheen) 4/15/ Integration

16 16 Why GeOI? Higher electron mobility (2x) and hole mobility (4x) than that of silicon Lower contact resistivity due to smaller band-gap of Ge Higher thermal stability with high-k k gate dielectric (HfO 2 ) Dopant activation temperatures are much lower, easier to form ultra-shallow junctions. 4/15/ Integration

17 17 GeOI Substrate by Low-Temperature Ion-Cut Layer Transfer Process 1. H + Implantation into Ge wafers 2. Wafer Bonding at low temperature 3. Thermal or Mechanical cleavage Hydrogen peak Ge donor wafer H + SiO 2 Si handle wafer GeOI 4/15/ Integration

18 Why Si 3 N 4? Smaller thermal mismatch with Ge; Higher Hamaker Constant for bonding 18 Bonding process for GeOI (a) As start wafers Ge wafer Si wafer (b) LPCVD deposition of Si 3 N 4 on Si wafer T( C) plasma 20 C time One ramp annealing cycle. (d) Direct bonding and ramp annealing 4/15/ Integration (c) O 2 plasma activation of Ge and Si wafer

19 19 Experimental set-up of reflective approach for crack length measurement IR Camera IR Lamp Reflective Infrared Imaging Si Infrared light can not go through bonded Ge-Si wafer pair, reflective infrared imaging is needed. 4/15/ Integration Ge

20 Crack length L of bonded Ge-Si pair by reflective approach L 20 W t B 1 E 1, t w1 Blade edge t B 2 E 2, t w2 Crack opening Boundary L γ = 3(E 1 t B1 t w13 +E 2 t B2 t w23 )/(8L 4 ) BLADE INSERTATION DIRECTION 4/15/ Integration

21 21 Past results: Plasma Assisted Bonding for GeOI Ge-SiO2-Si Bonding Strength As-bonded Annealed γ (J/m 2 ) WC 1 O 2 plasma WC 2 O 2 plasma 4/15/ Integration WC 3 O 2 plasma WC 3

22 22 Current results Ge wafer The change of γ bond and γ cut with Annealing temperature (Y.Cho and N.Cheung, APL,2003) 4/15/ Integration Our current result: The photo of bonded Ge- Si 3 N 4 -Si pair after delamination. 200nm Si 3 N 4 layer on Si wafer is exposed due to the Ge wafer fracture when insert razor blade. The bonding energy is larger than Ge fracture strength of 2J/m2. 1.To realize Ge layer transfer, γ bond > γ cut is needed; 2. With high γ bond, the transferred Ge layer can withstand higher processing T;

23 23 Thermal Stress Simulation of Ge-SiO 2 -Si systems by finite element analysis y Ge (100 nm) SiO 2 (100 nm) (200 C) Annealing Edge region Ge SiO 2 Direct Stress σ xx around the interface (MPa) Si (500 µm) SiO 2 Ge X (cm) Distance from edge Χ 100 (nm) 4/15/ Integration Compressive Tensile Tensile stress is localized in SiO 2 and compressive stress in Ge. Very strong bonding between Ge and SiO 2 is needed. Si

24 24 Accomplishments Establish reflective approach to measure bonding energy by crack opening method Plasma activated processing creates bonding energy of Ge-Si 3 N 4 -Si is larger than 2J/m 2 after 300 C annealing Thermal stress analysis shows high γ is needed for Ge-insulator-Si substrates Task to be performed in 2004 Produce high quality GeOI substrates by ion-cut layer transfer. 4/15/ Integration