Low-k Interlayer Dielectrics for 65 nm-node LSIs GPa Low-k Nano Clustering Silica NCS. Abstract

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1 65 nm LSI Low-k Interlayer Dielectrics for 65 nm-node LSIs 56, 4, 07, nm LSI GPa Low-k Nano Clustering SilicaNCS 1 NCS 2.8 nm NCS65 nm NCS Low-k Cu/NCS Cu NCS NCS LSI Abstract We have developed a novel porous low-k material called Nano-Clustering Silica (NCS) that has a low dielectric constant (k = 2.25) and high film strength (Young s modulus E = 10 GPa). Conventionally, the pore-creation technique, by which holes with a dielectric constant of 1 are created within a film, is very effective for reducing the dielectric constant, but reduces the film strength. On the other hand, NCS, which was developed using an original technology called nano-clustering, has homogeneously distributed pores of 2.8 nm or less. NCS also has good compatibility with 65 nm-node micro-fabrication processes. Fujitsu has advanced the trial production of multi-level interconnects made of NCS and established an NCS-based multi-layer interconnect formation technology. Our Cu/NCS interconnects are reliable enough to prevent damage to Cu interconnects by the mechanical stresses that occur in wire bonding, packaging, and other processes. This paper describes the problems of conventional porous low-k materials and how they are solved using NCS are described. Then, this paper describes the development status of NCS-based LSI multi-layer interconnects. LSIHDD LSI LSI LSI 272 FUJITSU.56, 4, p (07,2005)

2 65 nm LSI 65 nm LSI 2.5 LSI -1 MPU LSI nm nm Low-k LSI LSI LSI LSI 100 nm LSI (1)(3) -1 1 SiN 7.0 SiO2 4.1 HSQ 3.0 BCB 2.7 PAE 2.7-1LSI -2LSI Fig.1-Relationship between LSI dimension and Fig.2-Cross-sectional view of LSI and multilayer delay time. interconnects. FUJITSU.56, 4, (07,2005) 273

3 65 nm LSI 2.5 Low-k 65 nm Low-k LSI GPa Low-k Nano Clustering SilicaNCS 65 nm LSI Low-k NCS NCS LSI 20 nm NCS 2.5 NCS Low-k -5 (4) 1 1 Low-k NCS 1-4 NCS k Fig.3-Relationship between porosity and dielectric constant. -4 Fig.4-Problem of template type porous materials. 274 FUJITSU.56, 4, (07,2005)

4 65 nm LSI -5NCS -7 Fig.5-Material design concept of NCS. Fig.7-Improvements of dielectric constant and elastic modulus. a bncs -6 Low-k TEM Fig.6-Cross-sectional TEM views of porous low-k materials. TEM -6 TEM -8 Low-k CVD NCS Fig.8-Penetration of CVD deposited film into porous low-k materials. X- NCS 2.8 nm 11.2 nm1/ NCS CVD nm NCS 65 nm NCS LSI 2.25 NCS 10 GPa FUJITSU.56, 4, (07,2005) 275

5 65 nm LSI Cu 4 Cu 1.4 NCS 4-9c NCS SiOC 0.2 MV/cm Hybrid A/cm 2 Cu 5 Hybrid 65 nm LSI NCS 1014 ppm/k 17 ppm/k Low-k Hybrid 50 ppm/k NCS/Cu NCS NCS -2 NCS -10 Cu/Low-k 12 TEM NCS Hybrid 6 NCS TEM Cu/NCS Cu/NCS NCS65 nm LSI Cu Cu 1 NCS 7 m 40 m Line/Space100/100 nm a 90 nm 1/ 100 SiOC GPa Cu Cu -9b SiOC NCS -2NCS NCS nm A/cm MV/cm CVD 65 nm GPa 6 10 ppm/k 1014 asioc bncs chybrid -9Low-k Cu Fig.9-Stresses at Cu related to low-k materials (simulation). 276 FUJITSU.56, 4, (07,2005)

6 65 nm LSI nm Cu/Low-k 12 Fig nm-node 12-level Cu/low-k interconnects. -12Cu/NCS Fig.12- Cumulative probability of Cu/NCS leak currents. -13 Fig.13-Results of stress migration test. -11Cu/NCS Fig.11- Cumulative probability of NCS long line resistances. 3 NCS 2.9SiOC 2.25NCS NCS 95 NCS NCS/Cu nm Cu/NCS 0.7 MV/cm 1 NCS Cu FUJITSU.56, 4, (07,2005) 277

7 65 nm LSI 200 1, NCS Cu NCS/Cu 65 nm Cu/NCS LSI NCS 10 GPaNCS 3 1M. T. Bohr et al.interconnect Scaling - The QFPQuad Flat Package Cu/NCS Real Limiter to High Performance ULSITech. Dig IEDM1995p H. Kudo et al. Copper Dual Damascene NCSCu Interconnects with Very Low-k Dielectrics Targeting for 130-nm NodeProc. of 2000 IITC2000p Cu/NCS 3K. Higashi et al.a manufacturable copper/low-k NCS65 nm LSI SiOC/SiCN process technology for 90nm-node high performance edramproc. of 2002 IITC2002 p M. Ikeda et al.a highly reliable nano-clustering 65 nm LSI silica with low dielectric constant (k 2.3) and Low-k highelastic modulus (E10 GPa) for copper damascene NCS NCS processproc. of 2003 IITC2003p FUJITSU.56, 4, (07,2005)