Optimizing Equipment Utilization In Semiconductor Manufacturing

Transcription

1 Optimizing Equipment Utilization In Semiconductor Manufacturing Cheng Siong, Bong Juergen Potoradi Infineon Technologies Batu Berendam FTZ MELAKA 7571, MALAYSIA Keywords: Lot size, semiconductor manufacturing, queuing, simulation, production logistics. ABSTRACT: As the market becomes more competitive and fast-paced, efficient productivity becomes an increasingly important success factor for a high-technology factory, especially in semiconductor manufacturing. Semiconductor manufacturing is a very capital-intensive business with product life-cycles that are continuously compressed. Queuing theory logistics laws and simulation are applied at the Melaka back-end factory, where the concentration is to enhance the efficiency of the production system and to improve capacity with minimal equipment additions. Discrete-event simulation was used at a semiconductor backend site to analyze optimum lot size for the factory based upon the throughput and. The study has demonstrated that a larger lot size is very much desirable in the areas of the factory that are highly utilized. In addition simulation enables managers and planners to carry out what if analysis to plan for the future. 1 Introduction The semiconductor industry is a very capitalintensive business with product life cycles that continue to be compressed. Thus, one of the most prevalent challenges in the semiconductor industry is improving productivity without increasing capital spending. Intense competition has led semiconductor manufacturers to initiate actions to get the highest possible return on expensive capital equipment. Historically, the most common approach in this area was to try to maximize a factory s output rate. However, high utilization and short are conflicting goals. As such, high utilization generally leads to high work-in-progress (WIP) which causes high s according to the Little s law. Queuing theory [Hopp and Spearman, 1996] provides the basis that depends not only on utilization, but also on variability and raw process time (RPT). The latter is largely determined by the lot size in backend operations. Other studies have also indicated that for production systems with reentrant flow, one of the three most influential factors on system performance is lot size [Adachi et. al. 1989]. Optimizing the equipment utilization for semiconductor manufacturing, especially in backend operations, is not a straightforward exercise since the optimal lot size can be varied from pre-assembly to final test process. This paper describes a simulationbased optimization system that has been conceptualized, designed and developed to optimize and asset utilization in the semiconductor manufacturing environment. 2 Semiconductor Backend In general, semiconductor manufacturing consists of four distinct stages. Each of the stages encompasses a separate set of process steps and technology. The four stages are (1) wafer fabrication, (2) wafer sort or test, (3) packaging or assembly and (4) functional (electrical) test and pack before being inventoried for shipment to customers. Wafer fabrication and wafer testing are usually known as the frontend operation. Assembly, test and packing are referred to as backend operations and are carried out in a separate location- Figure 1 shows typical a semiconductor backend manufacturing flow. Front end Pre-Assembly Assembly End of Line Final Test Mark/Scan/Pack Ship Figure 1: A Simplified Semiconductor Backend Flow Semiconductor backend manufacturing has become an extremely capital-intensive venture. The backend operations comprised of three main facilities, namely the pre-assembly, assembly/end of line and test/pack operations. After leaving wafer sort, the wafer is mechanically ground or thinned in pre-assembly in order to fit in the required package. The backside is then covered with a thin metal to allow attachment of the die to the package. The wafer is then scribed and separated into dies. The non-inked dies or the good chips (electrically functioning) are selected and sent to the assembly operation. At the first assembly step, the chip is soldered or glued in the lead frames. Contacts on the dies are then wire-bonded to the leads. The thin gold or aluminum wires used are typically 2.5 microns in diameter, and the package can be varied from eight to several hundred leads. The bonded chips are encapsulated in ceramic or

2 mold compound (End of Line process) to hermetically protect the die. Finally, these individual units are given a series of electrical tests similar to the wafer sort test to ensure they meet complex specifications. They are then marked with part numbers, date and origin codes and packed in tubes, reels or trays before deliver to the customer. 3 Analytical Methodology 3.1 Cycle Time and Lot Size When looking at the influence of the lot size on a given type of backend equipment, one might encounter a curve of the shape shown in Figure Lot size Figure 2: Cycle Time This curve shows the relationship of and lot size for a trim/form tool, but is indicative of many factory equipment types. What these types of equipment all have in common is a certain time that is needed for loading and unloading of a lot. That means there is a fixed amount of time that has to be spent for each lot, independent of the lot size. For every type of equipment where the processing time of a lot consists of a fixed time for overhead and a time slice for each unit, the curve has this askew U shape. It can be said that the lot size has an influence on the utilization and on the service time. Accordingly the dependency on the lot size is a function of both utilization and service time dependency. This can be seen from the curve in Figure 2. The left part of the curve in Figure 2 is influenced by the utilization. The right part of this curve reflects the linear increase of the service time. For a more detailed investigation of this topic with the application of queuing theory formulas see also Potoradi et. al Throughput, Operating Curves Since people on the production floor are very throughput oriented, the question might arise of what lot size will give maximum throughput for a given cycle time. In this case we apply queuing formulas (see Potoradi et. al. 1999) to calculate, for different lot sizes, the number of units that can be released in order to achieve a certain cycle-time target. Figure 3 shows the throughput for lot sizes between 1 and 8 and for a target of 3.5 hours. This curve has an inverted U shape with an optimum lot size at the maximum throughput. The explanation of the U shape is again found in the steep utilization change for smaller lots and the increasing service time for larger lots. throughput Lot size Figure 3: Throughput that gives a of 3.5 hours for all lot-sizes A summary of the various curves discussed thus far is given in Figure 4, showing the relationship between and throughput (Hopp and Spearman, 1996). At Infineon Technologies, this is referred to as the operating curve. In Figure 4 the operating curves for five selected lot-sizes are shown lot size 5 lot size 1 lot size 3 lot size 5 lot size arrival rate Figure 4: Operating Curves for different lot-sizes The curve shown in Figure 3 can be viewed as a horizontal section at 3.5. Note that the curve for a 3-unit lot size crosses the line furthest to the right, showing again that for a of 3.5 hours, 3 is the lot size that gives maximum throughput. The curve in Figure 2 can be viewed as a vertical section at the arrival rate.21. The application of queuing formulas is more complex for systems with more than one piece of equipment, several consecutive process steps, variable down times, setups, and other additional parameters. Nevertheless, these simple curves and formulas are very useful to explain simulated cycle-time curves of these complex systems. The simulated curves for a multi-step system consist more or less of superimposed curves of the single steps. 4. Simulation Modeling and Analysis The models were built, validated, and used for analysis by a team of process engineers from the specific production areas, in partnership with a simulation expert. This team structure, as well as regular meetings with production people and management, ensured that the simulation results met expectations and requirements. A comprehensive

3 details of this project management approach can be found in Chance, Robinson, and Fowler [1996]. 4.1 Modeling Resources Modeling a manufacturing system requires a great deal of customization. The selected simulation software, Factory Explorer from Wright Williams and Kelly [Chance, 1996] enables the devices to be modeled as products and linked to processes. The tool provides a data-driven approach for simulation model building and a user access feature for customization. Data from the planning department was used as the core input data for the simulation models. The static planning data such as lot size and lot arrival can be extracted from the manufacturing execution system (MES) and other standard factory reporting systems. However, data about equipment states and process times was gathered manually and was restricted to the average values (more sophisticated CIM online data collection systems are not installed in this factory). The customization feature of the simulation tool enables external prioritization and optimization of the lots and allows the simulation to specify the various degrees of priority using Dispatch rules. For any missing data, triangular distributions were estimated [Law and Kelton, 1991]. The basic inputs to the simulation model were entered into a generic template. 4.2 Modeling Randomness The following are some sources of randomness in simulated manufacturing systems: Individual operation processing times Arrivals of raw materials Operator load/unload times Machine repair and down times Setup times Processing lotsize In general, each source of system randomness needs to be modeled by an appropriate probability distribution, not what is perceived to be the mean value. Note that sources of randomness encountered in practice are seldom distributed normally. A detail of simulation input modeling is given in Law and Kelton Chapter 6 (1999). Because of the random nature of simulation input, a simulation run produces a statistical estimate of the (true) performance measure not the measure itself. In order for an estimate to be statistically precise (have a small variance) and free of bias, the appropriate ranges were specified in the following: Warm up duration Length of simulation runs Number of independent runs In most of the manufacturing systems, the long-run (or steady state) behavior of the system is desired, i.e. its behavior when operating in a normal manner. Simulations of these kinds of systems generally begin with the system in an empty and idle state. This results in the output data from the beginning of the simulation run not being representative of the desired normal behavior of the system. As a result, simulations are often run for a certain amount of warm-up time, before the output data are actually used to estimate the desired performance measure. Use of the warm-up-period data would bias the estimated performance measure. The details of simulation output-data analysis can be found in Law and Kelton (1999). 4.3 Modeling Process A definition of products and their process steps are essential to build the model. The process steps principally describe how the resources are used to assemble the raw materials and test the final products. In a typical backend operation the same devices may be processed using different steps due to the fact that a single device may correspond to multiple products. In addition a fraction of products may have alternative operation routes. The resources gathered for an operation are filled in the appropriate fields which are pre-defined in the generic template for steps and process time. The resource requirements for the test operation are specified differently due to the more complex process flow. In semiconductor backend manufacturing, the typical testing process requires multiple resources such as tester, handler, test board and other hardware. Operators have not been included in the model as they were not seen as critical constraints. In the test operation, it is normal to use alternative combinations of the above resources. For example, at the same tester and handler, a different load board may be used to execute the test job and hence this flexibility allows the total processing time to be varied between testing time and indexing time. Machine down times are the events that cause the tool to be unavailable for processing for a period of time. The down times commonly defined in models included failures, preventive maintenance (PM) and engineering time. These machine-unavailability features of the simulation tool allows the frequency and duration to be varied over a long simulation run. In order to answer questions for the Melaka backend, two different models where built: one for the combined assembly/end-of-line areas and one for the burn-in/test area. For the pre-assembly area, lots arrive from the previous production department in a predetermined size. The overhead time is negligible in the mark/scan/pack area, so lot size is not so important. Therefore these two areas are not considered in this analysis. 4.4 Model Validation For a successful simulation project, two conditions are critical: models must be valid the model and the output must be trusted The model validation was done by comparing model output to actual historical data for a given period. We used and OEE (Overall Equipment Efficiency) output charts for the comparison. By

4 comparing these parameters we ensured that the variability in our model was comparable to the actual system. The is a function of utilization and variability [Hopp and Spearman, 1996]. Therefore, if we compare the utilization (OEE chart) and the cycle time, we can infer a match of the variability. Only the factory managers using simulation output in their decision-making process evidence proof that results from a simulation study are trusted. Simulation for simulation s sake is of no value in a production environment. The team structure and the regular meetings contributed significantly to meeting this goal. 4.5 Result and Analysis The simulation output is translated into operating curves where the horizontal line is included as the targeted and the planned throughput line is plotted vertically. The relationship between the cycle time and throughput as shown in operating curves is illustrated in section 3. Several curves are sketched from different lot sizes that were simulated. In general, the result demonstrates the impact of lot sizes in optimizing equipment utilization and meeting the targeted simultaneously. Fowler and Robinson (1995) define cycle-timeconstrained capacity as the maximum throughput rate sustainable for the factory for a given product mix, line yield, and equipment set, and a constraint on the average. lot size 3.5K lot size 5.5K lot size 7.5K lot size 9.5K of 95 and higher. See also Figure 3 in section 3.2, where the maximum throughput is decreasing for lot sizes larger than the optimum. Figure 6 shows operating curves for different lot sizes for the burn-in/test area and the result is analyzed. 3 is the minimum lot-size for the planned throughput. In short, both the assembly and test models lead clearly to a conclusion that any small lot-size will result in an unstable system. The minimum along the vertical planned throughput can be achieved with a lot size of 55 and less. The throughput gain of 8.5% is expected with a change from 3 lot-size to 95 lot-size with the still below the target. Likewise, the main reasons for relatively small changes with lots larger than 95, are the same as in the assembly/end-ofline analysis. That is the increasing flatness of the utilization curve for increasing lot-sizes. This is also due to the change of the bottleneck at lot-sizes around 55 from a lot-size sensitive tool to a non lot-size sensitive one. lot size 3k lot size 5.5K lot size 6.8K lot size 9.5K lot size 11.5K + 8.5% + 14% Throughput Figure 6: Operating Curves for Burn-In/Test Throughput Figure 5: Operating Curves for Assembly/End-of-Line The operating curves for the assembly/end-of-line area are shown in Figure 5. The analysis is summarized in the following: 35 is the minimum lot-size for the planned throughput. From the Factory Explorer s static calculation, a lot size of 3 and below will lead to an unstable model for the planned throughput. Along the cycle-time-target line, the highest throughput can be achieved with a lot size of 75. The 14% gain of throughput by going from 35 lot-size to 75 lot-size and still meeting the cycletime target is due to the decreasing utilization for increasing lot sizes as discussed in section 3. The insignificant throughput improvement from 55 lot-size to 75 lot-size is attributed to the flat utilization curve for the larger lots. To retain the cycle-time target, the result shows that the throughput is declined less with a lot size A further increase of the lot size to 115 and above will not increase the throughput at the defined target. In burn-in/test area, the maximum throughput lies around 95 lot-size. See also Figure 3 in section 3.2, where the maximum throughput is decreasing for lots bigger than the optimum. 5. Conclusion For this modeled factory, the optimum lot size is 75 for the assembly area and 95 for the burn-in/test area. This allows the factory to maximize its throughput in each manufacturing area while still meeting the established goal. However, an additional operational consideration is that the factory operates the MTX ovens on a full-batch loading policy. The maximum batch-size for these ovens is 68, so for the burn-in area this would be considered a locally optimum size for effective production operations. Comparing the 68 lot-size to the optimum lot sizes for assembly/end-of-line (75) and burn-in/test (95), the simulation results show relatively minor differences in the throughput. Therefore, for the overall production

5 area the recommended lot size is 68. This finding reinforces the fact that simulation should be used to analyze not only local improvements, but also the overall impact on the factory as one entity. This study reinforces the importance of applying queuing theory and simulation together as one unified approach. Used separately, the Operating Curve Management (OCM) approach (using queuing theory) simply indicated the benefit of increasing the lot size at specific tools. Only after applying simulation in partnership with OCM was the team able to fix an upper bound on the optimum lot-size. A general observation can be made concerning lot sizes. For areas of the factory that are highly utilized, a larger lot-size is required to meet throughput. For areas less utilized, a smaller lot-size can be implemented to minimize. This analysis demonstrates that simulation models can be rapidly built and effectively maintained to provide quick updates and recommendations as the factory changes. With part-time simulation analysts, the Malacca factory is able to easily provide continuous simulation results for managerial decision-making. 6. References 1. Hopp, W. J., and M. L. Spearman. Factory Physics: Foundation of Manufacturing Management. Irwin/McGraw Hill (1996). 2. Adachi, T., J. J. Talavage, and C. L. Moodie. A Rule-based Control Method for A Multi-loop Production System. Artificial Intelligence in Engineering, Vol. 4, No. 3, pp (1989). 3. Chance, F.. Factory Explorer users guide (1996). 4. Fowler, J. W. and J. K. Robinson. Measurement and Improvement of Manufacturing Capacity (MIMAC) Designed Experiment Report, SEMATECH Technology transfer # A- TR. (1995). 5. Domaschke, J., S. Brown, J. K. Robinson, and F. Leibl. Effective Implementation of Cycle Time Reduction Strategies for Semiconductor Backend Manufacturing. In: Proceedings of the 1998 Winter Simulation Conference, ed. D. J. Medeiros, E. F. Watson, J. S. Carson, and M. S. Manivannan, pp Institute of Electrical and Electronics Engineers, Piscataway, New Jersey. (1996). 6. Law, A. M., and W. D. Kelton. Simulation Modeling & Analysis. Chicago: McGraw Hill (1991). 7. Law, A. M., and W. D. Kelton. Simulation Modeling & Analysis. 3d ed. New York: McGraw Hill (1999). 8. Chance, F., J. K. Robinson, and J. W. Fowler. Supporting Manufacturing With Simulation: Model Design, Development, and Deployment. In: Proceedings of the 1996 Winter Simulation Conference, ed. J. M. Charnes, D. J. Morrice, D. T. Brunner, and J. J. Swain, pp Institute of Electrical and Electronics Engineers, Piscataway, New Jersey. (1996). 9. Potoradi, J., G. Winz and W. K. Lee. Determining optimal lot-size for a semiconductor back-end factory In: Proceedings of the 1999 Winter Simulation Conference, ed. P.A. Farrington, H. B. Nembhard, D. T. Sturrock, and G. W. Evans, pp (1999). 1. Sivakumar, A. I.. Optimization of Cycle Time and Utilization in Semiconductor Test Manufacturing Using Simulation based, On-line, Near-real-time Scheduling System. In: Proceedings of the 1999 Winter Simulation Conference, ed. P.A. Farrington, H. B. Nembhard, D. T. Sturrock, and G. W. Evans, pp (1999). 11. Law, A. M. and M. G. McComas. Simulation of Manufacturing Systems. In: Proceedings of the 1999 Winter Simulation Conference, ed. P.A. Farrington, H. B. Nembhard, D. T. Sturrock, and G. W. Evans, pp (1999). 12. Winz, G, J. Potoradi and P. T. Lim. Improvement of Production Logistics for Backend Manufacturing. In: Conference Proceedings of the IEEE International Symposium on Semiconductor Manufacturing, pp (1999) Acknowledgements The authors gratefully acknowledge the editorial assistance of Mr. Steven Brown, Infineon Technologies. The authors would also like to thank the working group from Melaka factory for their active participation. Special thanks to Neo, Mohan, KG, Khoo and Melvin. 7. Author Biographies CHENG SIONG, BONG received his B.S. degree in Electrical Engineering from Michigan Technological University. He has been at Infineon Technologies (formerly Siemens Semiconductor Division) since He is responsible for implementing Operating Curve Management (OCM) and Simulation projects. Prior to the production improvement activities, he was a Product Failure Analyst of Memory Business unit. He is currently doing his MBA. His address is chengsiong.bong@infineon.com. JUERGEN POTORADI is a Factory Modeling and Simulation analyst and project leader with Infineon Technologies (formerly Siemens Semiconductor Division). He is currently responsible for implementing simulation techniques and methodologies in the Asian backend factories: Singapore and Malaysia. Mr. Potoradi received his undergraduate and graduate degrees in Computer Science from the University of Wuerzburg in Germany. He has extensive experience in simulation analysis of semiconductor wafer fab and back-end production operations. His address is juergen.potoradi@infineon.com.