Statement of Work (SOW) inemi Board Assembly TIG High-Speed Signaling Connector Metrology Project

Transcription

1 Statement f Wrk (SOW) inemi Bard Assembly TIG High-Speed Signaling Cnnectr Metrlgy Prject Versin #3.1 Date: May 22, 2014 Prject Leader: Zhicha Zhang (Intel) C-Prject Leader: TBD inemi Staff: David Gdlewski Summary The High-Speed Signaling Cnnectr Metrlgy Prject will cnsist f tw phases. Phase 1 prject grup plans t survey the industry in current existing methds fr scket/cnnectr HSIO measurements. The survey will prvide a benchmark OEM and suppliers scket and cnnectr electrical parameters using predefined test bards and sample units, leading t the develpment f a standard frmat (template) fr presentatin f test results fr use by industry. In additin, Phase 1 utput will be the verificatin f Phase 2 tasks as prpsed in this dcument. Basic Prject Infrmatin Backgrund/Cntext On high-speed signaling cnnectr perfrmance characterizatin, a lt f wrk has already been dne by majr cnnectr manufacturers n things like sckets, backplane cnnectrs and high speed IO cnnectrs. This is dne thrugh varius mdeling and simulatin tls. Sme manufacturers (such as Mlex, TE, FCI, Samtec and thers) publish Spice mdels fr use by custmers nline. The current state-f-art in high-speed cnnectrs includes: 10-25Gbps backplane, 10-40GbE, 10Gbps Thunderblt, 4.8 ging t 9.6Gbps USB and f curse fiber ptic slutins. Higher intercnnect signaling speeds & bandwidth requirements are driving the need fr characterizing signal integrity f sckets and cnnectrs and the need fr cnsistent measurement methdlgies. This prject grup plans t characterize and measure scket & cnnectr electrical parameters as t define: Metrlgy requirements fr time and frequency dmain. Crss-cmpany crrelatin f scket and cnnectr electrical parameters using predefined test bards and sample units. Drive cmmn database/data frmats f test results fr custmers t use. Page 1 f 7

2 Scpe f Wrk 1. Develp Industry Survey Survey f current existing methds fr scket/cnnectr HSIO measurements. Benchmark OEM and suppliers scket and cnnectr electrical parameters using predefined test bards and sample units. 2. Develp a standard frmat (template) fr presentatin f test results fr use by industry. Purpse f Prject This prject grup plans t characterize and measure scket and cnnectr electrical parameters as t define: Metrlgy requirements fr time and frequency dmain. Crss-cmpany crrelatin f scket and cnnectr electrical parameters using predefined test bards and sample units. Drive cmmn database/data frmats f test results fr custmers t use. NOTE: All changes t SOW must be apprved by the Technical Cmmittee fr versin cntrl Page 2 f 7

3 IS / IS NOT Analysis This Prject IS: This Prject IS NOT: High-Speed Signaling Cnnectr Metrlgy Prject Define the need fr characterizing signal integrity perfrmance f sckets and cnnectrs Define the metrlgy requirements fr time and frequency dmain Definitin f and agreement n key metrics & parameters scket/cnnectr HSIO measurements: Frequency dmain: S-parameters, insertin/return lss, crss-talk, frequency range f interest, singleended/differential, etc. Time dmain: Time dmain reflectmetry (TDR), time dmain transmissin (TDT), crss-talk, rise time range f interest, singleended/differential, etc. Survey f currently existing methds fr scket/cnnectr HSIO measurements Benchmark OEM and suppliers scket and cnnectr electrical parameters using predefined test bards and sample units Develpment f a specific standard(s) Repeat f prir r existing wrk Biased twards specific suppliers, gegraphies, r market segments Develp a standard frmat (template) fr presentatin f test results fr use by custmers Summary f equipment required fr measurement f agreed upn metrics and parameters (multi-prt PNA, etc.) Based n interest, participatin, and validated capabilities, crss-cmpany matching f scket/cnnectr HSIO data using pre-defined test bards, sample units and metrics Output: Publish a white paper n the metrlgy requirements fr time and frequency dmain f high-speed signaling sckets and cnnectrs. Present the results f the benchmark using the prpsed test result template Reprt-ut f key findings & recmmendatins NOTE: All changes t SOW must be apprved by the Technical Cmmittee fr versin cntrl Page 3 f 7

4 Business Impact Understand the business needs and industrial capabilities n characterizing the high-speed signaling (signal integrity) perfrmance f sckets and cnnectrs. Prvide a cmmn platfrm fr participants t crss-crrelate the high-speed signaling cnnectr metrlgy with pre-defined testing units. Develp and publish a standard frmat/template n metrlgy including equipment, metrics, result presentatin frmat fr industrial use. Participating Organizatins inemi member cmpanies Industry as a whle Prject Frmatin Team Participants: Alcatel-lucent Amphenl Cisc Cntech Research FCI i3 Electrnics IBM Intel Materin Mlex Outcme f Prject Understand the business needs and industrial capabilities n characterizing the high-speed signaling (signal integrity) perfrmance f sckets and cnnectrs. Prvide a cmmn platfrm fr participants t crss-crrelate the high-speed signaling cnnectr metrlgy with pre-defined testing units. Develp and publish a standard frmat/template n metrlgy including equipment, metrics, result presentatin frmat fr industrial use. Previus Related Wrk Mdeling, measurement, calibratin techniques by all participating cmpanies (detail t be filled ut based n survey data). Prspective Participants (details t be added after final participants are defined) Cmpnent and SOC cmpanies System and platfrm OEMs Scket, cnnectr and bard OEMs EDA cmpanies Miscellaneus NOTE: All changes t SOW must be apprved by the Technical Cmmittee fr versin cntrl Page 4 f 7

5 Prject Plan Schedule with Milestnes Phase 1 1. Develp survey Q1 Q2 Q3 Q4 Q5 Q6 Q7 Q8 2. Survey distributin/feedback 3. Survey results review 4. Analysis and share f survey results 5. Dcumentatin f survey results 6. Definitin f test strategy 7. Test feature design 8. Plan definitin fr Phase 2 9. End-f-Prject Webinar 10. White Paper Phase 2 1. Testing readiness (part manufacturing, resurce allcatin) 2. Test data cllectin and pst prcessing 3. Test data reprt ut and crsscmpany crrelatin 4. Summary f crsscmpany crrelatin and definitin f reprt ut frmat (metric, frmat, equipment, etc.) 5. Dcumentatin f verall results 6. End-f-Prject Webinar 7. White Paper Q1 Q2 Q3 Q4 Q5 Q6 Q7 Q8 NOTE: All changes t SOW must be apprved by the Technical Cmmittee fr versin cntrl Page 5 f 7

6 Phase 1 Detailed Infrmatin Task 1 Develp Survey Resurces Representatives frm participant cmpanies and their wrk peers. Materials and Prcesses Prject leader and c-leader(s) will draft the survey by incrprating the feedback frm all participants. The cntents f the survey shuld include representative s bi, cmpany s main prducts, frequency f interest, equipment and measurement capability, general frmat f interpreting cnnectr electrical parameters, de-embedding capability, apprximate cntributing bandwidth, preferred meeting time. Task 2 Survey Distributin Resurces inemi crdinatr, representatives frm participant cmpanies and their wrk peers. Materials and Prcesses inemi crdinatr will create and distribute the survey with Survey Mnkey in an interactive manner. Representatives frm participant cmpanies are respnsible fr prviding feedback t the prject leader in time based n their wn cmpany s situatins. Task 3 Survey Results Review Materials and Prcesses inemi crdinatr will summarize the survey feedback in Survey Mnkey frm all participants and exchange pinins. Task 4 Analysis and Share f Survey Results Resurces Representatives frm participant cmpanies and their wrk peers. Materials and Prcesses Prject leader and c-leaders will send the survey results t all participants t cllect feedback n the cnslidated infrmatin. Task 5 Dcumentatin f Survey Results Materials and Prcesses Prject leader and c-leaders will dcument the cnslidated survey results and distribute them t all participants. Task 6 Definitin f Test Strategy Resurces Representatives frm participant cmpanies and their wrk peers. Materials and Prcesses Prject leader and c-leaders will lead the effrts t define the test scpe and strategy. The test scpe needs include 1-2 cnnectr candidates that represent the majr interest and prducts f the participants, data t be cllected (frequency r time dmain, befre r after de-embedding, etc.). Decide whether there is any pssibility t re-use existing test feature frm any participant r design new test feature. NOTE: All changes t SOW must be apprved by the Technical Cmmittee fr versin cntrl Page 6 f 7

7 Task 7 Test Feature Design Resurces Representatives frm participant cmpanies and their wrk peers. Materials and Prcesses Prject leader and c-leaders will lead the effrts t define the test feature. Distribute the test feature infrmatin amng all participants based n the decisin f reuse r develping new test features. The test feature will include the cnnectr candidate, assciated test features (e.g. test bards) and mechanical/thermal features (lading fixtures). Decide the test feature design frmat and what help can be btained frm each participant depending n their expertise. Mnitr the design prgress and quality. Sync-up and facilitate cmmunicatins. Task 8 Plan Definitin fr Phase 2 Resurces Representatives frm participant cmpanies and their wrk peers. Materials and Prcesses Prject leader and c-leaders will lead the effrts t define the Phase 2 plan. The verall target fr Phase 1 is t cmplete survey and test fixture design. Use Phase 2 fr testing and crrelatin executin. Based n the prgress up t this stage, make adjustment n prjected Phase 2 plan (e.g., scpe, timeline, etc.). Task 9 End-f-Prject Webinar Resurces Representatives frm participant cmpanies and their wrk peers. Materials and Prcesses Prject leader and c-leaders will hst the necessary meetings with all participants and key inemi crdinatrs/fficials t reprt ut the prject status in inemi required frmats. Task 10 White Paper Resurces Representatives frm participant cmpanies and their wrk peers. Materials and Prcesses Prject leader and c-leaders will lead the effrts t dcument all the prgress in Phase 1 by including the survey data, prject directins and testing features design status. General and Administrative Guidelines fr this prject and all ther inemi Prjects are dcumented at NOTE: All changes t SOW must be apprved by the Technical Cmmittee fr versin cntrl Page 7 f 7