Quarterly Report EPRI Agreement W

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1 Quarterly Report EPRI Agreement W PI: S.J. Pearton, University of Florida (Co-investigators F. Ren, C.R. Abernathy, R.K. Singh, P.H. Holloway, T.J. Anderson, M. Berding, A. Sher, S. Krishnimurthy, D. Palmer, G.E. McGuire) Prepared for: Jerry Melcher Date: 9/2/98 The first reporting period was a highly productive one for the consortium. The University of Florida fabricated the world s first GaN MOSFET, a key component in an eventual high power inverter. Critical process modules such as dry etching, high-temperature stable ohmic contacts and high temperature activation of implanted dopants were also developed. SRI did initial calculations of electron drift velocity in GaN, and produced results that will enable optimized design of ultra-high power devices. MCNC commenced an analysis of the best approach for thermal management of devices operating at 2 ka, 25 kv. There will be close collaboration with Sandia National Laboratories on packaging issues and on the device fabrication. (a) GaN MOSFET DEVELOPMENT In order to fabricate the enhancement lateral GaN MOSFETs, shown in Figure 1, there are several key process modules that need to be developed, such as gate oxide etching, p-n junction formation by ion implantation, ohmic contact, and device passivation. Gate Dielectric p-well Contact Source Contact Gate Contact Drain Contact n + -Source p n + -Drain p-well 10 µm GaN n - -Layer Sapphire Substrate Figure 1. Cross-sectional view of a high breakdown voltage enhancement-mode lateral GaN MOSFET. Implanted p-n junctions are one of the key process steps in the fabrication of the lateral MOSFET. As shown in Figure 2, we have demonstrated a p-n junction by implantation Si in to Mg-doped p-gan. The Mg-doping level is 5x10 17 cm -3 and around 5000 Å thick. The implant dose and energy are 2x10 14 cm -2 and 120 kev, respectively. The implantation activation was 1

2 achieved with an annealing under N 2 at 1200 ºC for 2 min. The junction ideality factor is around 2 and the breakdown voltage is 13 V at A/cm Junction Current (µa) Junction Voltage (V) Figure 2. GaN p-n junction formed by implanting Si into Mg-doped p-gan. The proposed GaN devices are expected to be operated at elevated temperatures. Therefore, we investigated the measurement temperature effect on the parasitic resistances. Au/Ti metallization was used for n-type ohmic contacts on n-gan. As illustrated in Figure 3, the sheet resistance increased as the measurement chuck temperature was elevated due to the phonon scattering reducing electron mobility Figure 3. Sheet Resistance (ohm/sq) GaN/Ti/Au Annealed at 450 C Chuck Temperature (C) Sheet resistance n-gan as a function of measurement temperature. 2

3 However, the specific contact resistivity decreased in the beginning as the chuck temperature increased and reached at a minimum around 250ºC, then increased as the chuck temperature reached 300ºC, as shown in Figure Spec. Contact Resistivity (ohm-cm 2 ) 1E-3 1E-4 n-gan/ti/au Annealed at 450 C 1E Chuck Temperature (C) Figure 4. The specific contact resistivity of Ti/Au metal contact on n-gan as a function of measurement temperature. A model was developed to explain this phenomenon. Total specific contact resistivity, R, is the sum of ohmic contact metallization resistance, R m, and contact resistance between ohmic metal to GaN, R c. For the thermionic emission case R = R c + R m R c = [K/(α*T)]exp[(qΦ B )/KT)] where K is the Boltzmann constant, α* is the Richardson constant, T is the absolute temperature, q is the magnitude of the electrical charge, and Φ B is the Schottky barrier height. The metal resistance can be expressed R m = AT 3 where A is a constant. As the sample temperature increased, the thermionic emission current increased, therefore the specific contact resistivity was reduced. However, as the sample temperature further increased, the resistance from the metallization increased and became the dominant component and caused an increase in the total resistance. As shown in Figure 5, if we plot RT versus 1/T, a linear region is obtained in the low temperature region (<200 C). The current transport is dominant by the thermionic emission and the resistance is governed by the metal resistance at higher temperature (>250 C). From the proposed model and curve fitting, the Φ B of Ti/Au contact on n-gan is estimated around 0.3 ev. 3

4 0.01 R x T (ohm-cm 2 -K) n-gan/ti/au Annealed at 450C /T Figure 5. Total specific contact resistivity multiplied by the temperature as a function of 1/T. We also investigated the temperature effect of gate diode (dia.=500 µm) characteristics. As shown in Figure 6, Pt Schottky gate diode started to have significant gate leakage current at around 100 C and oxide gate still maintained fairly low gate leakage current at 200 C. 1E-4 1E-5 Gate Current (A) 1E-6 1E-7 1E-8 1E-9 1E-10 T 27 C 50 C 75 C 100 C 150 C 200 C Pt/GaN 1E Gate Voltage (V) 4

5 Diode Crrent (A) 1E-4 1E-5 1E-6 1E-7 1E-8 1E-9 1E C 50 C 75 C 100 C 150 C 200 C T Pt/Ga 2 O 3 (Gd 2 O 3 )/GaN 1E Diode Voltage (V) Figure 6. The gate characteristics as a function of measurement temperature (top) Pt/GaN (bottom) Pt/Ga 2 O 3 (Gd 2 O 3 )/GaN. In order to investigate the MOS-gate breakdown voltage and the breakdown field distribution between gate oxide and GaN, a depletion-mode GaN MOSFET was fabricated. This is the first demonstration of a GaN MOSFET. The gate oxide is deposited by electron beam deposition from a single crystal source Ga 5 Gd 3 O 12 and the oxide thickness is around 200 Å. X- ray reflectivity was used to study the interfaces of oxide/gan and oxide/metal and extremely smooth interfaces were obtained, as illustrated in Figure Ga 2 O 3 (Gd 2 O 3 )/GaN 0.01 Reflectivity 1E-3 1E-4 1E-5 1E-6 1E Angle (Degree) Figure 7. X-ray reflectivity data for oxide/gan structure. The slopes of the x-ray reflectivity at different x-ray incident angles can determine the roughness of the Ga 2 O 3 (Gd 2 O 3 )/GaN interface as well as the air/ga 2 O 3 (Gd 2 O 3 ) interface and the oxide thickness is a function of the width of x-ray reflectivity oscillation period. The root mean 5

6 square roughness of the Ga 2 O 3 (Gd 2 O 3 )/GaN and air/ga 2 O 3 (Gd 2 O 3 ) interfaces were estimated to be 3 Å and 10 Å, respectively. This atomic level (3 Å) smoothness for the Ga 2 O 3 (Gd 2 O 3 )/GaN interface can provide a high carrier mobility and the smoothness of both interfaces can prevent local high breakdown field. From our earlier C-V measurement, the dielectric constant is around 14.6 which is much higher than that of GaN(9). The breakdown field distribution is reversed proportional to the ratio of dielectric constants of gate oxide and semiconductor. In this material system, the breakdown field distribution between GaN and Ga 2 O 3 (Gd 2 O 3 ) are 1 to Therefore, the gate breakdown voltage of MOSFET should be higher than Schottky gate. From our depletion MOSFET result, a MOS-gate of > 35V was demonstrated which is superior to 16V of a Pt Schottky gate on the same GaN epi-layer. The MOSFET device isolation was achieved with Cl 2 /Ar discharge in a Plasma Therm ICP system. Ti/Al/Pt/Au and Pt/Ti/Pt/Au were used as ohmic and gate contacts, respectively. Figure 8 (top) shows drain I-V characteristics of 1 50 µm 2 gate dimension GaN MOSFET. The device shows an extrinsic transconductance of 5 ms/mm. The high parasitic resistance in the low drain bias region is result of the ohmic contact not being alloyed yet. The extrinsic device shows an unity gain cut-off frequency of 3.1 GHz and 9.1 GHz of maximum oscillation frequency and the rf data were measured at V ds = 25 V and V g = -20V. Figure 8 (bottom) shows the same device operates at 400 C and the parasitic resistance in the low drain bias region reduced significantly which is consistence with our ohmic contact temperature studies. 6

7 Figure 8. Drain I-V characteristics of a GaN MOSFET; (top) measured at room temperature (bottom) measured at 400 C. (b) DEVICE FABRICATION PROCESSES (i) Ohmic Contacts The annealing temperature ( o C) and measurement temperature ( o C) dependencies of current-voltage characteristics of W and WSi 0.45 contacts on p-gan have been compared to the more common Ni/Au metallization. At 25 o C, slightly rectifying characteristics were obtained for all three types of contact, but at 300 o C specific contact resistances in the 10-2 Ωcm -2 range were obtained for WSi 0.45 and Ni/Au. This is due to an increase in Mg acceptor ionization efficiency (from 10% at 25 o C to 57% at 300 o C) and more efficient thermionic hole emission across the metal-gan interface. Both WSi 0.45 and W contacts retained featureless 7

8 surface morphology for annealing at >900 o C, whereas Ni/Au showed substantial islanding at 700 o C. On n-gan, contact resistance ~10-6 Ω cm 2 was obtained for WSi x on Si-implanted material, after annealing at 900 o C to produce the W 2 N phase. (ii) Plasma Etching Two new plasma chemistries for selective etching of nitrides were developed, namely BBr 3 and BI 3. Figure 9 shows etch rates of the three binary nitrides as a function of source power in ICP BI 3 /Ar discharges. These results are replotted as selectivity data in Figure 10 values as high as 100:1 for InN over both GaN and AlN are achieved. This new process will be extremely useful in fabrication of electronic devices, since InGaN will probably be necessary as an ohmic contact material on these structures Etch Rate (Å/min) AlN GaN InN dc Bias dc Bias (-V) ICP Source Power (W) Figure 9. discharges. Etch rates of nitrides in 4BI 3 /6Ar, 150 W rf chuck power, 750 W source power 8

9 100 4BI 3 /6Ar 150W rf 750W ICP Selectivity 10 InN/AlN InN/GaN ICP Source Power (W) Figure 10. Etch selectivity for InN over GaN and AlN in BI 3 /Ar discharges. We also developed a high resolution dry etch process for GaN based on Cl 2 /BCl 3 /Ar ICP discharges. The quality of the pattern transfer is a strong function of the dc chuck bias, as shown in Figure 11. If the bias is too high the photoresist mask becomes rough and this transferred into the GaN sidewall (right), and if it is too low (left) then the anisotropy is compromised. -50V -150V -300V Figure 11. SEM micrographs of features etched into GaN using Cl 2 /BCl 3 /Ar plasmas with different voltages on the sample chuck 9

10 Implant Doping and Activation We developed a process for annealing GaN at temperatures up to 1500 o C, using AlN encapsulation layers and a new furnace with novel heating elements (molydisilicide). We are able to quickly ramp the sample temperature to high temperatures, hold for a dwell-time of ~10 secs and rapidly cool to room temperature. The key results from these studies are as follows: (a) n-type doping levels of 5x10 20 cm -3 are achieved by annealing Siimplanted material at 1400 o C. This produces extremely good contact resiliences. (b) p-type doping levels are limited to cm -3 using Mg implantation. Use of C or Be did not produce p-type doping. (c) N-type doping levels with S or Te implants are limited to the 5x10 18 cm -3 level. (d) Diffusivities of all implanted dopants are 2x10-13 cm 2 sec -1 at 1450 o C. (e) Annealing at 1400 o C lowers the defect density in Si-implanted material by over an order of magnitude relative to the more conventional 1100 o C annealing, as determined by TEM. (c) THEORY OF HIGH FIELD TRANSPORT SRI now has their wurtzite GaN code operational. Preliminary results show that electron drift velocity rises with field to about 30 kv cm -1 where it reaches a peak of 3x10 7 cm sec -1. It then falls to a value of 5x10 6 cm sec -1 by a field of 300 kv cm -1. Even at a field of 500 kv cm -1 the velocity is still falling. If this trend continues, there will not be a saturated drift velocity in this system. In the ideal case in n-type material, there would be no intrinsic breakdown mechanism. However impurity-assisted processes will eventually lead to breakdown. In the next report, we will show extensive curves of the velocity-field distribution in GaN. GOALS FOR NEXT REPORTING PERIOD (i) (ii) (iii) (iv) (v) rf performance of GaN MOSFET. fabrication of AlGaN/GaN HBT. investigation of new plasma etch chemistries for GaN and SiC. velocity-field curves for GaN. preliminary status report on thermal management/packaging issues. 10