L5: Micromachining processes 1/7 01/22/02

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1 L5: Micromachining processes 1/7 01/22/02 5: Micromachining technology Top-down approaches to building large (relative to an atom or even a transistor) structures. 5.1 Bulk Micromachining A bulk micromachined sensor is formed by etching a large, generally single-crystal substrate. Thin films are also deposited on the substrate for electrical or transducer functions. Bulk micromachining techniques have been around for many (30?) years and commercial diaphragm pressure sensor and cantilever beam accelerometers are fabricated using this technique, which is probably still the most popular. Complex structures such as capacitors may require bonding of several etched wafers together to form the structure. Several wafer bonding techniques are available, but generally difficulty in wafer alignment and the requirement of extremely clean surfaces makes wafer bonding challenging. Most common bulk micromachining substrates are silicon and amorphous glass, but gallium arsenide and quartz are occasionally used. There are a few reports of more exotic materials such as diamond. Single crystal silicon is the most popular substrate. It is widely available in high purity with low cost. ***Mechanical properties are well controlled, resulting in reproducible sensor characteristics. Silicon is stronger than steel, although more brittle - high yield strength, hard, similar E, light weight Electrical properties are sensitive to temperature, magnetic fields, and radiation, permitting design of a variety of sensors.

2 L5: Micromachining processes 2/7 01/22/02 Piezoresistivity is the most widely used property for mechanical sensors. A number of anisotropic etchants are available that selectively etch certain crystal planes and allow precise definition of dimensions. Glass substrates are often used by bonding to other (silicon) substrates to form sealed cavities. Sodium rich glasses (soda-lime glass) are often used since the mobile sodium leads to a high strength anodic bond. It is generally desirable to match thermal expansion coefficients of substrates to reduce stress variations. Corning 7740 is closely matched to Si and widely used. Most glasses have a low melting point (relative to Si) which limits processing temperatures. Quartz can be anisotropically etched like Si. It is a good structural material and has a significant piezoelectric effect. As a result, resonators are often micromachined in Quartz. Crystalline quartz is quite brittle and requires careful handling. GaAs has been used as a substrate for optical devices, and other sensors Anisotropic Silicon Etching also used for GaAs, Diamond, other crystalline materials. Our focus is Si. - etch simulator, also design.caltech.edu/research/mems This is the most widely used technique, yet the mechanisms are not well understood. However, the ability to selectively etch some crystal planes of crystalline silicon is extremely useful for precisely defining three dimensional structures. Most anisotropic etching of silicon is based on liquid-phase chemical reactions, although vapour phase and plasma etching are also used. Most common etchants are alkaline solutions, which generally exhibit the slowest etch rate in the <111> direction and the fastest in the <100> and <110> directions. Selectivity is the rate in the desired direction divided by the rate in the undesired direction, often given as a polar plot, and measured using an etch star pattern. Some etchants show a reduced etch rate in silicon heavily doped with boron, which can then act as an etch stop (thickness control). An applied potential on a p-n junction can be used to influence the etch rate at the junction (electrochemical etch stop). Most etchants have a low etch rate on silicon dioxide or silicon nitride, making these suitable for masking layers and stops. Examples p.44

3 L5: Micromachining processes 3/7 01/22/02 Si mask stop Si mask stop (100) silicon: Sidewalls of an etched cavity form an angle of degrees with the surface, and form rectangular etch cavity - requires a large die area! To take advantage of the dimensional control possible with this technique, masking patterns need to be aligned to <111> directions. Misalignment results in oversized openings. Note that it is difficult to form convex corners, but corner compensation techniques have been developed for this. Multiple masking steps, and two sided etching can create complicated structures. (110) silicon: Four planes form sidewalls at degrees from the surface, while two planes are at right angles to the surface. The six planes form a hexagonal cavity. Parallel trenches with vertical walls, or shallow v grooves can be formed. Alkaline etchants and masks Etch selectivity depends strongly on etchant composition, additives, temperature, and even age of the etchant. EDP: Probably the best known silicon anisotropic wet etchant is a mixture of ethylenediamine, pyrocatechol, and water (EDP or EPW). A small amount of pyrazine is often added to increase etch rate and selectivity. Composition is tailored for specific effects (rate, surface quality). Composition should be maintained by using a reflux system, temp. controlled bath, and stirrer. A nitrogen purge is sometimes used to prevent oxidation. Usually temperature is set high (115C) to keep rate high, but selectivity suffers (100:110:111) = (30:30:1) at 115C or (100:150:1) at 50C. Even at high temperature a 500 µm thick wafer will take 5-10 hours to etch through.

4 L5: Micromachining processes 4/7 01/22/02 Selectivity over other materials can be high. EDP etches SiO 2 very slowly, and Si 3 N 4 almost not at all. Many metals are resistant to EDP (not Al) and boron doped Si makes a good stop.!! Dark brown toxic goo!! KOH: Also popular, in concentrations of 10 to 50 %, with Isopropyl Alcohol often added to improve selectivity. Selectivity of {110} over {111} planes can be very high (500) Selectivity over SiO 2 is lower, although Si 3 N 4 can be a good mask. Boron doped etch stop is not as effective as with EDP. Low concentration, high rate solutions tend to leave very rough surfaces. *** Potassium is risky with MOS devices *** TMAH: Tetra methyl ammonium hydroxide and water behaves in a similar manner to KOH, but is less aggressive on SiO 2 masking layers. metal free developer -> proven MOS compatible. NO ALKALI METALS, but lower rate and rougher surface than other materials. Several other alkaline etchants have been used, the most popular was probably hydrazine. Vapor Phase etching: Recently XeF 2 has become popular for etching Si due to good selectivity to Al and relatively simple equipment requirements. Sublimates from a solid. Silicon sample in the vapour path is isotropically etched. A complicated system might use a chamber and vacuum pump to control the environment. Acidic Etchants Isotropic etching may be an option if you don t need well controlled shape and size. A well know Si etchant system that is not selective to specific crystal planes is hydroflouric, nitric, and acetic acid (HNA = HF, HNO 3, and CH 3 COOH). In certain concentrations it will etch heavily doped regions much faster than lightly doped ones. For heavily doped (> 5x10 18 cm -3 ) Si the etch rate at room temperature is 50 to 200 um/hr, and selectivity over lightly doped regions (<10 17 cm -3 ) is about 150. SiO 2 is etched around 2 µm/h, limiting the use of this as a mask. Si 3 N 4 or Au are more commonly used. Etch characteristics (rate, surface finish) depend strongly on composition. Electrochemical etch stops

5 L5: Micromachining processes 5/7 01/22/02 This is an alternative to using boron doping as a stop. The high boron concentrations required can cause compressive stress in the silicon which can cause performance variations or mechanical failure. In this technique a n-type region is diffused or grown on a p substrate. The diode is then reverse biased slightly by applying V to the n layer. A platinum counter electrode is immersed in the etching solution, and often a reference electrode is placed in the solution. The p silicon etches normally, but the etching will stop when it reaches the n silicon. The mechanism is likely accelerated anodic oxidation of the silicon, forming a passivating layer. The p and n layers can be reversed, provided bias is applied so that the diode does not forward bias. Photo-assisted etch stop Instead of bias, illumination on one side of the wafer can generate the carriers necessary to accelerate oxidation. 5.2 Wafer bonding Techniques are required for sealing microsensors and for building complicated structures from several substrates. Anodic bonding, metallic sealing, low temperature glass bonding, and fusion bonding are the most common techniques. Anodic Bonding This technique requires a conductive substrate and an ion rich (sodium) glass substrate. The substrate surfaces have to be brought in intimate contact, which requires flat and clean surfaces. The assembly is heated to C to make the ions more mobile. A voltage of V is applied with the glass as the anode. Because the ions are mobile the glass-substrate interface becomes depleted to a depth of around 1 um, and a high field is formed in this region. The large field generates large electrostatic pressure which forces the substrate and glass into intimate contact and forms a bond. In Si/glass bonding the bond appears to be due to formation of a thin SiO2 layer at the interface. Because of the large electrostatic forces, the substrates can have some surface irregularities. Since the bond occurs at elevated temperature some attention must be paid to matching thermal expansion coefficients to avoid stresses at room temperature. As mentioned previously, Corning 7740 glass is a good choice for bonding to silicon. Two silicon wafers can be bonded by using an intermediate layer of sputtered glass. Similarly, two glass wafers can be bonded using an intermediate layer of sputtered silicon. The high fields required for this are not compatible with electronic devices.

6 L5: Micromachining processes 6/7 01/22/02 Low temperature glass bonding The bonding interface is coated with a thin layer of low temperature glass. Wafers are brought together under mechanical pressure, and the assembly is heated to create the bond. A number of low temperature glasses have been used, including phosphosilicate (1000C), borosilicate (450C), sputtered (Sodium lead 150C) and spin-on glasses, and (proprietary) frits. In general, lower temperature glasses form weaker bonds. Glass frits are proprietary mixtures of metal oxides in solvent forming a paste. Under pressure the frit forms a planarizing film that fills gaps in rough surfaces, and bonds two surfaces when heated. Temperature can be low ( ) and flatness of the surfaces isn t critical. CTE of frits is about 2-5x Si. Fusion Bonding Wafers are thermally fused in contact at high temperature, without any intermediate adhesion layers. Fusion bonding is one way of fabricating silicon on insulator wafers and pressure sensors. Wafers are thoroughly cleaned and placed in physical contact with each other on a quartz holder. If the surfaces are flat and there are no particles, the wafers stick together due to Van der Waal forces. The assembly is transferred to a high temperature furnace to establish the final bond, which is generally very good, with no visible interface. This method require very high temperatures, and is very sensitive to cleanliness and flatness of the surfaces. Active devices cannot be fabricated before bonding. Reactive metal (eutectic) bonding A thin layer of metal is placed on the surface of one or both wafers. When the surfaces are brought together and heated, the metal alloys with the silicon, forming the bond. In eutectic alloys this occurs at a temperature much lower than the melting point of either component. For example, Au/Si is a frequently used system that alloys at 363C, forming an alloy 97.1% Au and 2.9% Si. This eutectic is generally used for attaching die to packages, but is also used for wafer bonding. Any surface oxide will inhibit the eutectic formation. Organic bonds If elevated temperatures are not possible, wafers can be glued together. Most organic polymers don t stick well to silicon or glass and require primers. Polymers also age, and

7 L5: Micromachining processes 7/7 01/22/02 the bond is plastic. Curing temperatures for expoxies or polyimides can be low, or UV epoxies can be used. Movement is possible, causing performance drift.